KiCad PCB EDA Suite
drc.h File Reference
#include <class_board.h>
#include <class_track.h>
#include <class_marker_pcb.h>
#include <geometry/seg.h>
#include <geometry/shape_poly_set.h>
#include <memory>
#include <vector>
#include <tools/pcb_tool_base.h>

Go to the source code of this file.

Classes

class  DRC
 Design Rule Checker object that performs all the DRC tests. More...
 

Macros

#define OK_DRC   0
 
#define BAD_DRC   1
 

Enumerations

enum  PCB_DRC_CODE {
  DRCE_FIRST = 1, DRCE_UNCONNECTED_ITEMS = DRCE_FIRST, DRCE_TRACK_NEAR_THROUGH_HOLE, DRCE_TRACK_NEAR_PAD,
  DRCE_TRACK_NEAR_VIA, DRCE_VIA_NEAR_VIA, DRCE_VIA_NEAR_TRACK, DRCE_TRACK_ENDS,
  DRCE_TRACK_SEGMENTS_TOO_CLOSE, DRCE_TRACKS_CROSSING, DRCE_PAD_NEAR_PAD1, DRCE_VIA_HOLE_BIGGER,
  DRCE_MICRO_VIA_INCORRECT_LAYER_PAIR, DRCE_ZONES_INTERSECT, DRCE_ZONES_TOO_CLOSE, DRCE_SUSPICIOUS_NET_FOR_ZONE_OUTLINE,
  DRCE_HOLE_NEAR_PAD, DRCE_HOLE_NEAR_TRACK, DRCE_TOO_SMALL_TRACK_WIDTH, DRCE_TOO_SMALL_VIA,
  DRCE_TOO_SMALL_MICROVIA, DRCE_TOO_SMALL_VIA_DRILL, DRCE_TOO_SMALL_MICROVIA_DRILL, DRCE_NETCLASS_TRACKWIDTH,
  DRCE_NETCLASS_CLEARANCE, DRCE_NETCLASS_VIASIZE, DRCE_NETCLASS_VIADRILLSIZE, DRCE_NETCLASS_uVIASIZE,
  DRCE_NETCLASS_uVIADRILLSIZE, DRCE_VIA_INSIDE_KEEPOUT, DRCE_TRACK_INSIDE_KEEPOUT, DRCE_PAD_INSIDE_KEEPOUT,
  DRCE_TRACK_NEAR_COPPER, DRCE_VIA_NEAR_COPPER, DRCE_PAD_NEAR_COPPER, DRCE_TRACK_NEAR_ZONE,
  DRCE_OVERLAPPING_FOOTPRINTS, DRCE_MISSING_COURTYARD_IN_FOOTPRINT, DRCE_MALFORMED_COURTYARD_IN_FOOTPRINT, DRCE_MICRO_VIA_NOT_ALLOWED,
  DRCE_BURIED_VIA_NOT_ALLOWED, DRCE_DISABLED_LAYER_ITEM, DRCE_DRILLED_HOLES_TOO_CLOSE, DRCE_TRACK_NEAR_EDGE,
  DRCE_INVALID_OUTLINE, DRCE_MISSING_FOOTPRINT, DRCE_DUPLICATE_FOOTPRINT, DRCE_EXTRA_FOOTPRINT,
  DRCE_SHORT, DRCE_REDUNDANT_VIA, DRCE_DUPLICATE_TRACK, DRCE_MERGE_TRACKS,
  DRCE_DANGLING_TRACK, DRCE_DANGLING_VIA, DRCE_ZERO_LENGTH_TRACK, DRCE_TRACK_IN_PAD,
  DRCE_LAST = DRCE_TRACK_IN_PAD
}
 DRC error codes: More...
 

Macro Definition Documentation

◆ BAD_DRC

#define BAD_DRC   1

Definition at line 38 of file drc.h.

◆ OK_DRC

#define OK_DRC   0

Definition at line 37 of file drc.h.

Enumeration Type Documentation

◆ PCB_DRC_CODE

DRC error codes:

Enumerator
DRCE_FIRST 
DRCE_UNCONNECTED_ITEMS 

items are unconnected

DRCE_TRACK_NEAR_THROUGH_HOLE 

thru hole is too close to track

DRCE_TRACK_NEAR_PAD 

pad too close to track

DRCE_TRACK_NEAR_VIA 

track too close to via

DRCE_VIA_NEAR_VIA 

via too close to via

DRCE_VIA_NEAR_TRACK 

via too close to track

DRCE_TRACK_ENDS 

track ends are too close

DRCE_TRACK_SEGMENTS_TOO_CLOSE 

2 parallel track segments too close: segm ends between segref ends

DRCE_TRACKS_CROSSING 

tracks are crossing

DRCE_PAD_NEAR_PAD1 

pad too close to pad

DRCE_VIA_HOLE_BIGGER 

via's hole is bigger than its diameter

DRCE_MICRO_VIA_INCORRECT_LAYER_PAIR 

micro via's layer pair incorrect (layers must be adjacent)

DRCE_ZONES_INTERSECT 

copper area outlines intersect

DRCE_ZONES_TOO_CLOSE 

copper area outlines are too close

DRCE_SUSPICIOUS_NET_FOR_ZONE_OUTLINE 

copper area has a net but no pads in nets, which is suspicious

DRCE_HOLE_NEAR_PAD 

hole too close to pad

DRCE_HOLE_NEAR_TRACK 

hole too close to track

DRCE_TOO_SMALL_TRACK_WIDTH 

Too small track width.

DRCE_TOO_SMALL_VIA 

Too small via size.

DRCE_TOO_SMALL_MICROVIA 

Too small micro via size.

DRCE_TOO_SMALL_VIA_DRILL 

Too small via drill.

DRCE_TOO_SMALL_MICROVIA_DRILL 

Too small micro via drill.

DRCE_NETCLASS_TRACKWIDTH 

netclass has TrackWidth < board.m_designSettings->m_TrackMinWidth

DRCE_NETCLASS_CLEARANCE 

netclass has Clearance < board.m_designSettings->m_TrackClearance

DRCE_NETCLASS_VIASIZE 

netclass has ViaSize < board.m_designSettings->m_ViasMinSize

DRCE_NETCLASS_VIADRILLSIZE 

netclass has ViaDrillSize < board.m_designSettings->m_ViasMinDrill

DRCE_NETCLASS_uVIASIZE 

netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize

DRCE_NETCLASS_uVIADRILLSIZE 

netclass has ViaSize < board.m_designSettings->m_MicroViasMinDrill

DRCE_VIA_INSIDE_KEEPOUT 

Via in inside a keepout area.

DRCE_TRACK_INSIDE_KEEPOUT 

Track in inside a keepout area.

DRCE_PAD_INSIDE_KEEPOUT 

Pad in inside a keepout area.

DRCE_TRACK_NEAR_COPPER 

track & copper graphic collide or are too close

DRCE_VIA_NEAR_COPPER 

via and copper graphic collide or are too close

DRCE_PAD_NEAR_COPPER 

pad and copper graphic collide or are too close

DRCE_TRACK_NEAR_ZONE 

track & zone collide or are too close together

DRCE_OVERLAPPING_FOOTPRINTS 

footprint courtyards overlap

DRCE_MISSING_COURTYARD_IN_FOOTPRINT 

footprint has no courtyard defined

DRCE_MALFORMED_COURTYARD_IN_FOOTPRINT 

footprint has a courtyard but malformed

(not convertible to a closed polygon with holes)

DRCE_MICRO_VIA_NOT_ALLOWED 

micro vias are not allowed

DRCE_BURIED_VIA_NOT_ALLOWED 

buried vias are not allowed

DRCE_DISABLED_LAYER_ITEM 

item on a disabled layer

DRCE_DRILLED_HOLES_TOO_CLOSE 

overlapping drilled holes break drill bits

DRCE_TRACK_NEAR_EDGE 

track too close to board edge

DRCE_INVALID_OUTLINE 

invalid board outline

DRCE_MISSING_FOOTPRINT 

footprint not found for netlist item

DRCE_DUPLICATE_FOOTPRINT 

more than one footprints found for netlist item

DRCE_EXTRA_FOOTPRINT 

netlist item not found for footprint

DRCE_SHORT 
DRCE_REDUNDANT_VIA 
DRCE_DUPLICATE_TRACK 
DRCE_MERGE_TRACKS 
DRCE_DANGLING_TRACK 
DRCE_DANGLING_VIA 
DRCE_ZERO_LENGTH_TRACK 
DRCE_TRACK_IN_PAD 
DRCE_LAST 

Definition at line 43 of file drc.h.

43  {
44  DRCE_FIRST = 1,
93 
94  DRCE_SHORT,
102 
104 };
Definition: drc.h:94
hole too close to track
Definition: drc.h:61
copper area outlines intersect
Definition: drc.h:57
Too small via size.
Definition: drc.h:63
micro vias are not allowed
Definition: drc.h:84
overlapping drilled holes break drill bits
Definition: drc.h:87
track too close to via
Definition: drc.h:48
Via in inside a keepout area.
Definition: drc.h:73
footprint not found for netlist item
Definition: drc.h:90
more than one footprints found for netlist item
Definition: drc.h:91
copper area has a net but no pads in nets, which is suspicious
Definition: drc.h:59
Too small micro via size.
Definition: drc.h:64
via and copper graphic collide or are too close
Definition: drc.h:77
track ends are too close
Definition: drc.h:51
tracks are crossing
Definition: drc.h:53
netclass has Clearance < board.m_designSettings->m_TrackClearance
Definition: drc.h:68
via too close to via
Definition: drc.h:49
2 parallel track segments too close: segm ends between segref ends
Definition: drc.h:52
footprint has no courtyard defined
Definition: drc.h:81
netlist item not found for footprint
Definition: drc.h:92
track too close to board edge
Definition: drc.h:88
Too small track width.
Definition: drc.h:62
Pad in inside a keepout area.
Definition: drc.h:75
Definition: drc.h:103
item on a disabled layer
Definition: drc.h:86
pad too close to track
Definition: drc.h:47
invalid board outline
Definition: drc.h:89
netclass has TrackWidth < board.m_designSettings->m_TrackMinWidth
Definition: drc.h:67
thru hole is too close to track
Definition: drc.h:46
Too small micro via drill.
Definition: drc.h:66
via's hole is bigger than its diameter
Definition: drc.h:55
micro via's layer pair incorrect (layers must be adjacent)
Definition: drc.h:56
Too small via drill.
Definition: drc.h:65
pad and copper graphic collide or are too close
Definition: drc.h:78
netclass has ViaDrillSize < board.m_designSettings->m_ViasMinDrill
Definition: drc.h:70
track & copper graphic collide or are too close
Definition: drc.h:76
Track in inside a keepout area.
Definition: drc.h:74
track & zone collide or are too close together
Definition: drc.h:79
via too close to track
Definition: drc.h:50
items are unconnected
Definition: drc.h:45
hole too close to pad
Definition: drc.h:60
footprint courtyards overlap
Definition: drc.h:80
netclass has ViaSize < board.m_designSettings->m_MicroViasMinDrill
Definition: drc.h:72
Definition: drc.h:44
copper area outlines are too close
Definition: drc.h:58
footprint has a courtyard but malformed
Definition: drc.h:82
buried vias are not allowed
Definition: drc.h:85
pad too close to pad
Definition: drc.h:54
netclass has ViaSize < board.m_designSettings->m_ViasMinSize
Definition: drc.h:69
netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize
Definition: drc.h:71