KiCad PCB EDA Suite
BOARD_DESIGN_SETTINGS Class Reference

BOARD_DESIGN_SETTINGS contains design settings for a BOARD object. More...

#include <board_design_settings.h>

Public Member Functions

 BOARD_DESIGN_SETTINGS ()
 
BOARD_STACKUPGetStackupDescriptor ()
 
NETCLASSPTR GetDefault () const
 Function GetDefault. More...
 
const wxString & GetCurrentNetClassName () const
 Function GetCurrentNetClassName. More...
 
bool UseNetClassTrack () const
 Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track width. More...
 
bool UseNetClassVia () const
 Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size. More...
 
bool UseNetClassDiffPair () const
 Function UseNetClassDiffPair returns true if netclass values should be used to obtain appropriate diff pair dimensions. More...
 
bool SetCurrentNetClass (const wxString &aNetClassName)
 Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter change Initialize vias and tracks values displayed in comb boxes of the auxiliary toolbar and some others parameters (netclass name ....) More...
 
int GetBiggestClearanceValue ()
 Function GetBiggestClearanceValue. More...
 
int GetSmallestClearanceValue ()
 Function GetSmallestClearanceValue. More...
 
int GetCurrentMicroViaSize ()
 Function GetCurrentMicroViaSize. More...
 
int GetCurrentMicroViaDrill ()
 Function GetCurrentMicroViaDrill. More...
 
unsigned GetTrackWidthIndex () const
 Function GetTrackWidthIndex. More...
 
void SetTrackWidthIndex (unsigned aIndex)
 Function SetTrackWidthIndex sets the current track width list index to aIndex. More...
 
int GetCurrentTrackWidth () const
 Function GetCurrentTrackWidth. More...
 
void SetCustomTrackWidth (int aWidth)
 Function SetCustomTrackWidth Sets custom width for track (i.e. More...
 
int GetCustomTrackWidth () const
 Function GetCustomTrackWidth. More...
 
unsigned GetViaSizeIndex () const
 Function GetViaSizeIndex. More...
 
void SetViaSizeIndex (unsigned aIndex)
 Function SetViaSizeIndex sets the current via size list index to aIndex. More...
 
int GetCurrentViaSize () const
 Function GetCurrentViaSize. More...
 
void SetCustomViaSize (int aSize)
 Function SetCustomViaSize Sets custom size for via diameter (i.e. More...
 
int GetCustomViaSize () const
 Function GetCustomViaSize. More...
 
int GetCurrentViaDrill () const
 Function GetCurrentViaDrill. More...
 
void SetCustomViaDrill (int aDrill)
 Function SetCustomViaDrill Sets custom size for via drill (i.e. More...
 
int GetCustomViaDrill () const
 Function GetCustomViaDrill. More...
 
void UseCustomTrackViaSize (bool aEnabled)
 Function UseCustomTrackViaSize Enables/disables custom track/via size settings. More...
 
bool UseCustomTrackViaSize () const
 Function UseCustomTrackViaSize. More...
 
unsigned GetDiffPairIndex () const
 Function GetDiffPairIndex. More...
 
void SetDiffPairIndex (unsigned aIndex)
 Function SetDiffPairIndex. More...
 
void SetCustomDiffPairWidth (int aWidth)
 Function SetCustomDiffPairWidth Sets custom track width for differential pairs (i.e. More...
 
int GetCustomDiffPairWidth ()
 Function GetCustomDiffPairWidth. More...
 
void SetCustomDiffPairGap (int aGap)
 Function SetCustomDiffPairGap Sets custom gap for differential pairs (i.e. More...
 
int GetCustomDiffPairGap ()
 Function GetCustomDiffPairGap. More...
 
void SetCustomDiffPairViaGap (int aGap)
 Function SetCustomDiffPairViaGap Sets custom via gap for differential pairs (i.e. More...
 
int GetCustomDiffPairViaGap ()
 Function GetCustomDiffPairViaGap. More...
 
void UseCustomDiffPairDimensions (bool aEnabled)
 Function UseCustomDiffPairDimensions Enables/disables custom differential pair dimensions. More...
 
bool UseCustomDiffPairDimensions () const
 Function UseCustomDiffPairDimensions. More...
 
int GetCurrentDiffPairWidth () const
 Function GetCurrentDiffPairWidth. More...
 
int GetCurrentDiffPairGap () const
 Function GetCurrentDiffPairGap. More...
 
int GetCurrentDiffPairViaGap () const
 Function GetCurrentDiffPairViaGap. More...
 
void SetMinHoleSeparation (int aDistance)
 Function SetMinHoleSeparation. More...
 
void SetCopperEdgeClearance (int aDistance)
 Function SetCopperEdgeClearance. More...
 
void SetRequireCourtyardDefinitions (bool aRequire)
 Function SetRequireCourtyardDefinitions. More...
 
void SetProhibitOverlappingCourtyards (bool aProhibit)
 Function SetProhibitOverlappingCourtyards. More...
 
LSET GetVisibleLayers () const
 Function GetVisibleLayers returns a bit-mask of all the layers that are visible. More...
 
void SetVisibleAlls ()
 Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers. More...
 
void SetVisibleLayers (LSET aMask)
 Function SetVisibleLayers changes the bit-mask of visible layers. More...
 
bool IsLayerVisible (PCB_LAYER_ID aLayerId) const
 Function IsLayerVisible tests whether a given layer is visible. More...
 
void SetLayerVisibility (PCB_LAYER_ID aLayerId, bool aNewState)
 Function SetLayerVisibility changes the visibility of a given layer. More...
 
int GetVisibleElements () const
 Function GetVisibleElements returns a bit-mask of all the element categories that are visible. More...
 
void SetVisibleElements (int aMask)
 Function SetVisibleElements changes the bit-mask of visible element categories. More...
 
bool IsElementVisible (GAL_LAYER_ID aElementCategory) const
 Function IsElementVisible tests whether a given element category is visible. More...
 
void SetElementVisibility (GAL_LAYER_ID aElementCategory, bool aNewState)
 Function SetElementVisibility changes the visibility of an element category. More...
 
LSET GetEnabledLayers () const
 Function GetEnabledLayers returns a bit-mask of all the layers that are enabled. More...
 
void SetEnabledLayers (LSET aMask)
 Function SetEnabledLayers changes the bit-mask of enabled layers. More...
 
bool IsLayerEnabled (PCB_LAYER_ID aLayerId) const
 Function IsLayerEnabled tests whether a given layer is enabled. More...
 
int GetCopperLayerCount () const
 Function GetCopperLayerCount. More...
 
void SetCopperLayerCount (int aNewLayerCount)
 Function SetCopperLayerCount do what its name says... More...
 
void AppendConfigs (BOARD *aBoard, std::vector< PARAM_CFG * > *aResult)
 Function AppendConfigs appends to aResult the configuration setting accessors which will later allow reading or writing of configuration file information directly into this object. More...
 
int GetBoardThickness () const
 
void SetBoardThickness (int aThickness)
 
int GetLineThickness (PCB_LAYER_ID aLayer) const
 Function GetLineThickness Returns the default graphic segment thickness from the layer class for the given layer. More...
 
wxSize GetTextSize (PCB_LAYER_ID aLayer) const
 Function GetTextSize Returns the default text size from the layer class for the given layer. More...
 
int GetTextThickness (PCB_LAYER_ID aLayer) const
 Function GetTextThickness Returns the default text thickness from the layer class for the given layer. More...
 
bool GetTextItalic (PCB_LAYER_ID aLayer) const
 
bool GetTextUpright (PCB_LAYER_ID aLayer) const
 
int GetLayerClass (PCB_LAYER_ID aLayer) const
 

Public Attributes

std::vector< int > m_TrackWidthList
 
std::vector< VIA_DIMENSIONm_ViasDimensionsList
 
std::vector< DIFF_PAIR_DIMENSIONm_DiffPairDimensionsList
 
NETCLASSES m_NetClasses
 
bool m_MicroViasAllowed
 true to allow micro vias More...
 
bool m_BlindBuriedViaAllowed
 true to allow blind/buried vias More...
 
VIATYPE m_CurrentViaType
 (VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA) More...
 
bool m_RequireCourtyards
 require courtyard definitions in footprints More...
 
bool m_ProhibitOverlappingCourtyards
 check for overlapping courtyards in DRC More...
 
bool m_UseConnectedTrackWidth
 
int m_TrackMinWidth
 track min value for width ((min copper size value More...
 
int m_ViasMinSize
 vias (not micro vias) min diameter More...
 
int m_ViasMinDrill
 vias (not micro vias) min drill diameter More...
 
int m_MicroViasMinSize
 micro vias (not vias) min diameter More...
 
int m_MicroViasMinDrill
 micro vias (not vias) min drill diameter More...
 
int m_CopperEdgeClearance
 
bool m_ZoneUseNoOutlineInFill
 Option to handle filled polygons in zones: the "legacy" option is using thick outlines around filled polygons: give the best shape the "new" option is using only filled polygons (no outline: give the faster redraw time moreover when exporting zone filled areas, the excatct shape is exported. More...
 
int m_MaxError
 
int m_SolderMaskMargin
 Solder mask margin. More...
 
int m_SolderMaskMinWidth
 Solder mask min width. More...
 
int m_SolderPasteMargin
 Solder paste margin absolute value. More...
 
double m_SolderPasteMarginRatio
 Solder pask margin ratio value of pad size The final margin is the sum of these 2 values. More...
 
int m_HoleToHoleMin
 Min width of peninsula between two drilled holes. More...
 
int m_LineThickness [LAYER_CLASS_COUNT]
 
wxSize m_TextSize [LAYER_CLASS_COUNT]
 
int m_TextThickness [LAYER_CLASS_COUNT]
 
bool m_TextItalic [LAYER_CLASS_COUNT]
 
bool m_TextUpright [LAYER_CLASS_COUNT]
 
int m_DimensionUnits
 
int m_DimensionPrecision
 
wxString m_RefDefaultText
 Default ref text on fp creation. More...
 
bool m_RefDefaultVisibility
 Default ref text visibility on fp creation. More...
 
int m_RefDefaultlayer
 Default ref text layer on fp creation. More...
 
wxString m_ValueDefaultText
 Default value text on fp creation. More...
 
bool m_ValueDefaultVisibility
 Default value text visibility on fp creation. More...
 
int m_ValueDefaultlayer
 Default value text layer on fp creation. More...
 
wxPoint m_AuxOrigin
 origin for plot exports More...
 
wxPoint m_GridOrigin
 origin for grid offsets More...
 
D_PAD m_Pad_Master
 A dummy pad to store all default parameters. More...
 
bool m_HasStackup
 Set to true if the board has a stackup management. More...
 

Private Member Functions

void formatNetClass (NETCLASS *aNetClass, OUTPUTFORMATTER *aFormatter, int aNestLevel, int aControlBits) const
 

Private Attributes

unsigned m_trackWidthIndex
 
unsigned m_viaSizeIndex
 
unsigned m_diffPairIndex
 
bool m_useCustomTrackVia
 
int m_customTrackWidth
 
VIA_DIMENSION m_customViaSize
 
bool m_useCustomDiffPair
 
DIFF_PAIR_DIMENSION m_customDiffPair
 
int m_copperLayerCount
 Number of copper layers for this design. More...
 
LSET m_enabledLayers
 Bit-mask for layer enabling. More...
 
LSET m_visibleLayers
 Bit-mask for layer visibility. More...
 
int m_visibleElements
 Bit-mask for element category visibility. More...
 
int m_boardThickness
 Board thickness for 3D viewer. More...
 
wxString m_currentNetClassName
 Current net class name used to display netclass info. More...
 
BOARD_STACKUP m_stackup
 the description of layers stackup, for board fabrication only physical layers are in layers stackup. More...
 

Detailed Description

BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.

Definition at line 175 of file board_design_settings.h.

Constructor & Destructor Documentation

◆ BOARD_DESIGN_SETTINGS()

BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS ( )

Definition at line 423 of file board_design_settings.cpp.

423  :
424  m_Pad_Master( NULL )
425 {
426  m_HasStackup = false; // no stackup defined by default
427 
428  LSET all_set = LSET().set();
429  m_enabledLayers = all_set; // All layers enabled at first.
430  // SetCopperLayerCount() will adjust this.
431  SetVisibleLayers( all_set );
432 
433  // set all but hidden text as visible.
435 
436  SetCopperLayerCount( 2 ); // Default design is a double sided board
438 
439  // if true, when creating a new track starting on an existing track, use this track width
440  m_UseConnectedTrackWidth = false;
441 
442  m_BlindBuriedViaAllowed = false;
443  m_MicroViasAllowed = false;
444 
446  m_TextSize[ LAYER_CLASS_SILK ] = wxSize( Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ),
447  Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ) );
449  m_TextItalic[ LAYER_CLASS_SILK ] = false;
450  m_TextUpright[ LAYER_CLASS_SILK ] = false;
451 
453  m_TextSize[ LAYER_CLASS_COPPER ] = wxSize( Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ),
454  Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ) );
456  m_TextItalic[ LAYER_CLASS_COPPER ] = false;
458 
459  // Edges & Courtyards; text properties aren't used but better to have them holding
460  // reasonable values than not.
462  m_TextSize[ LAYER_CLASS_EDGES ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
463  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
465  m_TextItalic[ LAYER_CLASS_EDGES ] = false;
466  m_TextUpright[ LAYER_CLASS_EDGES ] = false;
467 
469  m_TextSize[ LAYER_CLASS_COURTYARD ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
470  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
474 
476  m_TextSize[ LAYER_CLASS_OTHERS ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
477  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
479  m_TextItalic[ LAYER_CLASS_OTHERS ] = false;
481 
482  m_DimensionUnits = 0; // Inches
483  m_DimensionPrecision = 1; // 0.001mm / 0.1 mil
484 
485  m_useCustomTrackVia = false;
486  m_customTrackWidth = Millimeter2iu( DEFAULT_CUSTOMTRACKWIDTH );
488  m_customViaSize.m_Drill = Millimeter2iu( DEFAULT_VIASMINDRILL );
489 
490  m_useCustomDiffPair = false;
492  m_customDiffPair.m_Gap = Millimeter2iu( DEFAULT_CUSTOMDPAIRGAP );
494 
495  m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH );
496  m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE );
497  m_ViasMinDrill = Millimeter2iu( DEFAULT_VIASMINDRILL );
498  m_MicroViasMinSize = Millimeter2iu( DEFAULT_MICROVIASMINSIZE );
501  m_HoleToHoleMin = Millimeter2iu( DEFAULT_HOLETOHOLEMIN );
502 
503  m_MaxError = ARC_HIGH_DEF;
504  m_ZoneUseNoOutlineInFill = false; // Use compatibility mode by default
505 
506  // Global mask margins:
509  m_SolderPasteMargin = 0; // Solder paste margin absolute value
510  m_SolderPasteMarginRatio = 0.0; // Solder paste margin as a ratio of pad size
511  // The final margin is the sum of these 2 values
512  // Usually < 0 because the mask is smaller than pad
513  // Layer thickness for 3D viewer
514  m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );
515 
516  m_viaSizeIndex = 0;
517  m_trackWidthIndex = 0;
518  m_diffPairIndex = 0;
519 
520  // Courtyard defaults
521  m_RequireCourtyards = false;
523 
524  // Default ref text on fp creation. If empty, use footprint name as default
525  m_RefDefaultText = wxT( "REF**" );
526  m_RefDefaultVisibility = true;
527  m_RefDefaultlayer = int( F_SilkS );
528  // Default value text on fp creation. If empty, use footprint name as default
529  m_ValueDefaultText = wxEmptyString;
531  m_ValueDefaultlayer = int( F_Fab );
532 }
#define DEFAULT_EDGE_WIDTH
#define DEFAULT_SILK_TEXT_WIDTH
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
#define DEFAULT_TRACKMINWIDTH
#define DEFAULT_COURTYARD_WIDTH
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
int m_SolderPasteMargin
Solder paste margin absolute value.
#define DEFAULT_VIASMINSIZE
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
#define DEFAULT_BOARD_THICKNESS_MM
#define DEFAULT_LINE_WIDTH
#define DEFAULT_COPPER_LINE_WIDTH
#define DEFAULT_HOLETOHOLEMIN
int m_ValueDefaultlayer
Default value text layer on fp creation.
DIFF_PAIR_DIMENSION m_customDiffPair
#define DEFAULT_CUSTOMDPAIRGAP
VIATYPE m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
#define DEFAULT_CUSTOMDPAIRVIAGAP
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
#define DEFAULT_CUSTOMDPAIRWIDTH
#define DEFAULT_SILK_TEXT_SIZE
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
LSET is a set of PCB_LAYER_IDs.
#define DEFAULT_SILK_LINE_WIDTH
#define NULL
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
#define DEFAULT_MICROVIASMINSIZE
wxString m_ValueDefaultText
Default value text on fp creation.
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
#define DEFAULT_COPPEREDGECLEARANCE
int m_visibleElements
Bit-mask for element category visibility.
bool m_RequireCourtyards
require courtyard definitions in footprints
bool m_ZoneUseNoOutlineInFill
Option to handle filled polygons in zones: the "legacy" option is using thick outlines around filled ...
D_PAD m_Pad_Master
A dummy pad to store all default parameters.
int m_RefDefaultlayer
Default ref text layer on fp creation.
#define DEFAULT_COPPER_TEXT_WIDTH
#define DEFAULT_CUSTOMTRACKWIDTH
#define DEFAULT_SOLDERMASK_CLEARANCE
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
bool m_HasStackup
Set to true if the board has a stackup management.
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values.
#define DEFAULT_TEXT_SIZE
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
#define DEFAULT_VIASMINDRILL
int m_boardThickness
Board thickness for 3D viewer.
bool m_TextUpright[LAYER_CLASS_COUNT]
int m_SolderMaskMinWidth
Solder mask min width.

References DEFAULT_BOARD_THICKNESS_MM, DEFAULT_COPPER_LINE_WIDTH, DEFAULT_COPPER_TEXT_SIZE, DEFAULT_COPPER_TEXT_WIDTH, DEFAULT_COPPEREDGECLEARANCE, DEFAULT_COURTYARD_WIDTH, DEFAULT_CUSTOMDPAIRGAP, DEFAULT_CUSTOMDPAIRVIAGAP, DEFAULT_CUSTOMDPAIRWIDTH, DEFAULT_CUSTOMTRACKWIDTH, DEFAULT_EDGE_WIDTH, DEFAULT_HOLETOHOLEMIN, DEFAULT_LINE_WIDTH, DEFAULT_MICROVIASMINDRILL, DEFAULT_MICROVIASMINSIZE, DEFAULT_SILK_LINE_WIDTH, DEFAULT_SILK_TEXT_SIZE, DEFAULT_SILK_TEXT_WIDTH, DEFAULT_SOLDERMASK_CLEARANCE, DEFAULT_SOLDERMASK_MIN_WIDTH, DEFAULT_TEXT_SIZE, DEFAULT_TEXT_WIDTH, DEFAULT_TRACKMINWIDTH, DEFAULT_VIASMINDRILL, DEFAULT_VIASMINSIZE, F_Fab, F_SilkS, GAL_LAYER_INDEX, LAYER_CLASS_COPPER, LAYER_CLASS_COURTYARD, LAYER_CLASS_EDGES, LAYER_CLASS_OTHERS, LAYER_CLASS_SILK, LAYER_MOD_TEXT_INVISIBLE, m_BlindBuriedViaAllowed, m_boardThickness, m_CopperEdgeClearance, m_CurrentViaType, m_customDiffPair, m_customTrackWidth, m_customViaSize, VIA_DIMENSION::m_Diameter, m_diffPairIndex, m_DimensionPrecision, m_DimensionUnits, VIA_DIMENSION::m_Drill, m_enabledLayers, DIFF_PAIR_DIMENSION::m_Gap, m_HasStackup, m_HoleToHoleMin, m_LineThickness, m_MaxError, m_MicroViasAllowed, m_MicroViasMinDrill, m_MicroViasMinSize, m_ProhibitOverlappingCourtyards, m_RefDefaultlayer, m_RefDefaultText, m_RefDefaultVisibility, m_RequireCourtyards, m_SolderMaskMargin, m_SolderMaskMinWidth, m_SolderPasteMargin, m_SolderPasteMarginRatio, m_TextItalic, m_TextSize, m_TextThickness, m_TextUpright, m_TrackMinWidth, m_trackWidthIndex, m_UseConnectedTrackWidth, m_useCustomDiffPair, m_useCustomTrackVia, m_ValueDefaultlayer, m_ValueDefaultText, m_ValueDefaultVisibility, DIFF_PAIR_DIMENSION::m_ViaGap, m_viaSizeIndex, m_ViasMinDrill, m_ViasMinSize, m_visibleElements, DIFF_PAIR_DIMENSION::m_Width, m_ZoneUseNoOutlineInFill, SetCopperLayerCount(), SetVisibleLayers(), and THROUGH.

Member Function Documentation

◆ AppendConfigs()

void BOARD_DESIGN_SETTINGS::AppendConfigs ( BOARD aBoard,
std::vector< PARAM_CFG * > *  aResult 
)

Function AppendConfigs appends to aResult the configuration setting accessors which will later allow reading or writing of configuration file information directly into this object.

Definition at line 536 of file board_design_settings.cpp.

537 {
538  aResult->push_back( new PARAM_CFG_LAYERS( aBoard ) );
539 
540  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowMicroVias" ),
541  &m_MicroViasAllowed, false ) );
542 
543  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowBlindVias" ),
544  &m_BlindBuriedViaAllowed, false ) );
545 
546  aResult->push_back( new PARAM_CFG_BOOL( wxT( "RequireCourtyardDefinitions" ),
547  &m_RequireCourtyards, false ) );
548 
549  aResult->push_back( new PARAM_CFG_BOOL( wxT( "ProhibitOverlappingCourtyards" ),
551 
552  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinTrackWidth" ),
554  Millimeter2iu( DEFAULT_TRACKMINWIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
555  nullptr, MM_PER_IU ) );
556 
557  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDiameter" ),
558  &m_ViasMinSize,
559  Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
560  nullptr, MM_PER_IU ) );
561 
562  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDrill" ),
564  Millimeter2iu( DEFAULT_VIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
565  nullptr, MM_PER_IU ) );
566 
567  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDiameter" ),
569  Millimeter2iu( DEFAULT_MICROVIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
570  nullptr, MM_PER_IU ) );
571 
572  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDrill" ),
574  Millimeter2iu( DEFAULT_MICROVIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
575  nullptr, MM_PER_IU ) );
576 
577  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinHoleToHole" ),
579  Millimeter2iu( DEFAULT_HOLETOHOLEMIN ), Millimeter2iu( 0.0 ), Millimeter2iu( 10.0 ),
580  nullptr, MM_PER_IU ) );
581 
582  // Note: a clearance of -0.01 is a flag indicating we should use the legacy (pre-6.0) method
583  // based on the edge cut thicknesses.
584  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperEdgeClearance" ),
586  Millimeter2iu( LEGACY_COPPEREDGECLEARANCE ), Millimeter2iu( -0.01 ), Millimeter2iu( 25.0 ),
587  nullptr, MM_PER_IU ) );
588 
589  aResult->push_back( new PARAM_CFG_TRACKWIDTHS( &m_TrackWidthList ) );
590  aResult->push_back( new PARAM_CFG_VIADIMENSIONS( &m_ViasDimensionsList ) );
591  aResult->push_back( new PARAM_CFG_DIFFPAIRDIMENSIONS( &m_DiffPairDimensionsList ) );
592 
593  aResult->push_back( new PARAM_CFG_NETCLASSES( wxT( "Netclasses" ), &m_NetClasses ) );
594 
595  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkLineWidth" ),
597  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
598  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
599 
600  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeV" ),
603  nullptr, MM_PER_IU, wxT( "ModuleTextSizeV" ) ) );
604 
605  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeH" ),
608  nullptr, MM_PER_IU, wxT( "ModuleTextSizeH" ) ) );
609 
610  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeThickness" ),
612  Millimeter2iu( DEFAULT_SILK_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
613  nullptr, MM_PER_IU, wxT( "ModuleTextSizeThickness" ) ) );
614 
615  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextItalic" ),
616  &m_TextItalic[ LAYER_CLASS_SILK ], false ) );
617 
618  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextUpright" ),
619  &m_TextUpright[ LAYER_CLASS_SILK ], true ) );
620 
621  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperLineWidth" ),
623  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
624  nullptr, MM_PER_IU, wxT( "DrawSegmentWidth" ) ) );
625 
626  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeV" ),
629  nullptr, MM_PER_IU, wxT( "PcbTextSizeV" ) ) );
630 
631  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeH" ),
634  nullptr, MM_PER_IU, wxT( "PcbTextSizeH" ) ) );
635 
636  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextThickness" ),
638  Millimeter2iu( DEFAULT_COPPER_TEXT_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
639  nullptr, MM_PER_IU, wxT( "PcbTextThickness" ) ) );
640 
641  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextItalic" ),
642  &m_TextItalic[ LAYER_CLASS_COPPER ], false ) );
643 
644  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextUpright" ),
645  &m_TextUpright[ LAYER_CLASS_COPPER ], true ) );
646 
647  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "EdgeCutLineWidth" ),
649  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
650  nullptr, MM_PER_IU, wxT( "BoardOutlineThickness" ) ) );
651 
652  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CourtyardLineWidth" ),
654  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
655  nullptr, MM_PER_IU ) );
656 
657  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersLineWidth" ),
659  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
660  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
661 
662  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeV" ),
665  nullptr, MM_PER_IU ) );
666 
667  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeH" ),
670  nullptr, MM_PER_IU ) );
671 
672  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeThickness" ),
674  Millimeter2iu( DEFAULT_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
675  nullptr, MM_PER_IU ) );
676 
677  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextItalic" ),
678  &m_TextItalic[ LAYER_CLASS_OTHERS ], false ) );
679 
680  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextUpright" ),
681  &m_TextUpright[ LAYER_CLASS_OTHERS ], true ) );
682 
683  aResult->push_back( new PARAM_CFG_INT( wxT( "DimensionUnits" ),
684  &m_DimensionUnits, 0, 0, 2 ) );
685  aResult->push_back( new PARAM_CFG_INT( wxT( "DimensionPrecision" ),
686  &m_DimensionPrecision, 1, 0, 2 ) );
687 
688  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskClearance" ),
690  Millimeter2iu( DEFAULT_SOLDERMASK_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
691  nullptr, MM_PER_IU ) );
692 
693  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskMinWidth" ),
695  Millimeter2iu( DEFAULT_SOLDERMASK_MIN_WIDTH ), 0, Millimeter2iu( 1.0 ),
696  nullptr, MM_PER_IU ) );
697 
698  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderPasteClearance" ),
700  Millimeter2iu( DEFAULT_SOLDERPASTE_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
701  nullptr, MM_PER_IU ) );
702 
703  aResult->push_back( new PARAM_CFG_DOUBLE( wxT( "SolderPasteRatio" ),
705  DEFAULT_SOLDERPASTE_RATIO, -0.5, 1.0 ) );
706 }
#define DEFAULT_SILK_TEXT_WIDTH
int m_SolderMaskMargin
Solder mask margin.
#define DEFAULT_TRACKMINWIDTH
#define DEFAULT_SOLDERPASTE_RATIO
int m_SolderPasteMargin
Solder paste margin absolute value.
#define DEFAULT_VIASMINSIZE
#define TEXTS_MAX_WIDTH
Maximum text width in internal units (10 inches)
Definition: pcbnew.h:40
std::vector< int > m_TrackWidthList
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Configuration parameter - Double Precision Class.
#define LEGACY_COPPEREDGECLEARANCE
#define DEFAULT_HOLETOHOLEMIN
Configuration parameter - Integer Class with unit conversion.
#define DEFAULT_SOLDERPASTE_CLEARANCE
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
#define DEFAULT_SILK_TEXT_SIZE
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
#define DEFAULT_SILK_LINE_WIDTH
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
Configuration parameter - Integer Class.
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
Configuration parameter - Boolean Class.
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
#define TEXTS_MAX_SIZE
Maximum text size in internal units (10 inches)
Definition: pcbnew.h:39
#define DEFAULT_MICROVIASMINSIZE
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
#define TEXTS_MIN_SIZE
Minimum text size in internal units (1 mil)
Definition: pcbnew.h:38
bool m_RequireCourtyards
require courtyard definitions in footprints
#define DEFAULT_COPPER_TEXT_WIDTH
std::vector< VIA_DIMENSION > m_ViasDimensionsList
#define DEFAULT_SOLDERMASK_CLEARANCE
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values.
#define DEFAULT_TEXT_SIZE
#define DEFAULT_VIASMINDRILL
bool m_TextUpright[LAYER_CLASS_COUNT]
int m_SolderMaskMinWidth
Solder mask min width.

References DEFAULT_COPPER_TEXT_SIZE, DEFAULT_COPPER_TEXT_WIDTH, DEFAULT_HOLETOHOLEMIN, DEFAULT_MICROVIASMINDRILL, DEFAULT_MICROVIASMINSIZE, DEFAULT_SILK_LINE_WIDTH, DEFAULT_SILK_TEXT_SIZE, DEFAULT_SILK_TEXT_WIDTH, DEFAULT_SOLDERMASK_CLEARANCE, DEFAULT_SOLDERMASK_MIN_WIDTH, DEFAULT_SOLDERPASTE_CLEARANCE, DEFAULT_SOLDERPASTE_RATIO, DEFAULT_TEXT_SIZE, DEFAULT_TEXT_WIDTH, DEFAULT_TRACKMINWIDTH, DEFAULT_VIASMINDRILL, DEFAULT_VIASMINSIZE, LAYER_CLASS_COPPER, LAYER_CLASS_COURTYARD, LAYER_CLASS_EDGES, LAYER_CLASS_OTHERS, LAYER_CLASS_SILK, LEGACY_COPPEREDGECLEARANCE, m_BlindBuriedViaAllowed, m_CopperEdgeClearance, m_DiffPairDimensionsList, m_DimensionPrecision, m_DimensionUnits, m_HoleToHoleMin, m_LineThickness, m_MicroViasAllowed, m_MicroViasMinDrill, m_MicroViasMinSize, m_NetClasses, m_ProhibitOverlappingCourtyards, m_RequireCourtyards, m_SolderMaskMargin, m_SolderMaskMinWidth, m_SolderPasteMargin, m_SolderPasteMarginRatio, m_TextItalic, m_TextSize, m_TextThickness, m_TextUpright, m_TrackMinWidth, m_TrackWidthList, m_ViasDimensionsList, m_ViasMinDrill, m_ViasMinSize, TEXTS_MAX_SIZE, TEXTS_MAX_WIDTH, and TEXTS_MIN_SIZE.

Referenced by PCB_EDIT_FRAME::GetProjectFileParameters(), and DIALOG_BOARD_SETUP::OnAuxiliaryAction().

◆ formatNetClass()

void BOARD_DESIGN_SETTINGS::formatNetClass ( NETCLASS aNetClass,
OUTPUTFORMATTER aFormatter,
int  aNestLevel,
int  aControlBits 
) const
private

◆ GetBiggestClearanceValue()

int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue ( )

Function GetBiggestClearanceValue.

Returns
the biggest clearance value found in NetClasses list

Definition at line 791 of file board_design_settings.cpp.

792 {
793  int clearance = m_NetClasses.GetDefault()->GetClearance();
794 
795  //Read list of Net Classes
796  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
797  {
798  NETCLASSPTR netclass = nc->second;
799  clearance = std::max( clearance, netclass->GetClearance() );
800  }
801 
802  return clearance;
803 }
iterator end()
Definition: netclass.h:249
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
iterator begin()
Definition: netclass.h:248
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268

References NETCLASSES::begin(), NETCLASSES::end(), NETCLASSES::GetDefault(), and m_NetClasses.

Referenced by ZONE_FILLER::buildCopperItemClearances(), ZONE_FILLER::buildThermalSpokes(), MODULE::GetBoundingPoly(), PNS_KICAD_IFACE::SyncWorld(), and MODULE::ViewBBox().

◆ GetBoardThickness()

◆ GetCopperLayerCount()

int BOARD_DESIGN_SETTINGS::GetCopperLayerCount ( ) const
inline

Function GetCopperLayerCount.

Returns
int - the number of neabled copper layers

Definition at line 813 of file board_design_settings.h.

814  {
815  return m_copperLayerCount;
816  }
int m_copperLayerCount
Number of copper layers for this design.

References m_copperLayerCount.

Referenced by BOARD_STACKUP::BuildDefaultStackupList(), PANEL_SETUP_BOARD_STACKUP::buildLayerStackPanel(), DRC::doTrackDrc(), BOARD::GetCopperLayerCount(), and ROUTER_TOOL::onViaCommand().

◆ GetCurrentDiffPairGap()

int BOARD_DESIGN_SETTINGS::GetCurrentDiffPairGap ( ) const
inline

Function GetCurrentDiffPairGap.

Returns
the current diff pair gap, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_DiffPairDimensionsList[0]

Definition at line 645 of file board_design_settings.h.

646  {
647  if( m_useCustomDiffPair )
648  return m_customDiffPair.m_Gap;
649  else
651  }
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, m_DiffPairDimensionsList, m_diffPairIndex, DIFF_PAIR_DIMENSION::m_Gap, and m_useCustomDiffPair.

Referenced by PNS::SIZES_SETTINGS::ImportCurrent().

◆ GetCurrentDiffPairViaGap()

int BOARD_DESIGN_SETTINGS::GetCurrentDiffPairViaGap ( ) const
inline

Function GetCurrentDiffPairViaGap.

Returns
the current diff pair via gap, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_DiffPairDimensionsList[0]

Definition at line 659 of file board_design_settings.h.

660  {
661  if( m_useCustomDiffPair )
662  return m_customDiffPair.m_ViaGap;
663  else
664  return m_DiffPairDimensionsList[m_diffPairIndex].m_ViaGap;
665  }
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, m_DiffPairDimensionsList, m_diffPairIndex, m_useCustomDiffPair, and DIFF_PAIR_DIMENSION::m_ViaGap.

Referenced by PNS::SIZES_SETTINGS::ImportCurrent().

◆ GetCurrentDiffPairWidth()

int BOARD_DESIGN_SETTINGS::GetCurrentDiffPairWidth ( ) const
inline

Function GetCurrentDiffPairWidth.

Returns
the current diff pair track width, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_DiffPairDimensionsList[0]

Definition at line 631 of file board_design_settings.h.

632  {
633  if( m_useCustomDiffPair )
634  return m_customDiffPair.m_Width;
635  else
637  }
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, m_DiffPairDimensionsList, m_diffPairIndex, m_useCustomDiffPair, and DIFF_PAIR_DIMENSION::m_Width.

Referenced by PNS::SIZES_SETTINGS::ImportCurrent().

◆ GetCurrentMicroViaDrill()

int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaDrill ( )

Function GetCurrentMicroViaDrill.

Returns
the current micro via drill, that is the current netclass value

Definition at line 829 of file board_design_settings.cpp.

830 {
831  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
832 
833  return netclass->GetuViaDrill();
834 }
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:141

References NETCLASSES::Find(), m_currentNetClassName, and m_NetClasses.

Referenced by ROUTER_TOOL::onViaCommand().

◆ GetCurrentMicroViaSize()

int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaSize ( )

Function GetCurrentMicroViaSize.

Returns
the current micro via size, that is the current netclass value

Definition at line 821 of file board_design_settings.cpp.

822 {
823  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
824 
825  return netclass->GetuViaDiameter();
826 }
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:141

References NETCLASSES::Find(), m_currentNetClassName, and m_NetClasses.

Referenced by ROUTER_TOOL::onViaCommand().

◆ GetCurrentNetClassName()

const wxString& BOARD_DESIGN_SETTINGS::GetCurrentNetClassName ( ) const
inline

Function GetCurrentNetClassName.

Returns
the current net class name.

Definition at line 318 of file board_design_settings.h.

319  {
320  return m_currentNetClassName;
321  }
wxString m_currentNetClassName
Current net class name used to display netclass info.

References m_currentNetClassName.

Referenced by DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::buildFilterLists().

◆ GetCurrentTrackWidth()

int BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth ( ) const
inline

Function GetCurrentTrackWidth.

Returns
the current track width, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_TrackWidthList[0]

Definition at line 406 of file board_design_settings.h.

References m_customTrackWidth, m_trackWidthIndex, m_TrackWidthList, and m_useCustomTrackVia.

Referenced by BOARD::BOARD(), EDIT_TOOL::ChangeTrackWidth(), PCB_EDIT_FRAME::Create_MuWaveComponent(), MICROWAVE_TOOL::createInductorBetween(), PCB_EDIT_FRAME::CreateMuWaveBaseFootprint(), PCB_IO::formatSetup(), PNS::SIZES_SETTINGS::ImportCurrent(), PNS::SIZES_SETTINGS::Init(), and PCB_EDIT_FRAME::SetTrackSegmentWidth().

◆ GetCurrentViaDrill()

int BOARD_DESIGN_SETTINGS::GetCurrentViaDrill ( ) const

Function GetCurrentViaDrill.

Returns
the current via size, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_TrackWidthList[0]

Definition at line 844 of file board_design_settings.cpp.

845 {
846  int drill;
847 
848  if( m_useCustomTrackVia )
849  drill = m_customViaSize.m_Drill;
850  else
851  drill = m_ViasDimensionsList[m_viaSizeIndex].m_Drill;
852 
853  return drill > 0 ? drill : -1;
854 }
std::vector< VIA_DIMENSION > m_ViasDimensionsList

References m_customViaSize, VIA_DIMENSION::m_Drill, m_useCustomTrackVia, m_ViasDimensionsList, and m_viaSizeIndex.

Referenced by BOARD::BOARD(), EDIT_TOOL::ChangeTrackWidth(), PNS::SIZES_SETTINGS::ImportCurrent(), PNS::SIZES_SETTINGS::Init(), ROUTER_TOOL::onViaCommand(), and PCB_EDIT_FRAME::SetTrackSegmentWidth().

◆ GetCurrentViaSize()

int BOARD_DESIGN_SETTINGS::GetCurrentViaSize ( ) const
inline

Function GetCurrentViaSize.

Returns
the current via size, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_TrackWidthList[0]

Definition at line 455 of file board_design_settings.h.

456  {
457  if( m_useCustomTrackVia )
459  else
460  return m_ViasDimensionsList[m_viaSizeIndex].m_Diameter;
461  }
std::vector< VIA_DIMENSION > m_ViasDimensionsList

References m_customViaSize, VIA_DIMENSION::m_Diameter, m_useCustomTrackVia, m_ViasDimensionsList, and m_viaSizeIndex.

Referenced by BOARD::BOARD(), EDIT_TOOL::ChangeTrackWidth(), PNS::SIZES_SETTINGS::ImportCurrent(), PNS::SIZES_SETTINGS::Init(), ROUTER_TOOL::onViaCommand(), and PCB_EDIT_FRAME::SetTrackSegmentWidth().

◆ GetCustomDiffPairGap()

int BOARD_DESIGN_SETTINGS::GetCustomDiffPairGap ( )
inline

Function GetCustomDiffPairGap.

Returns
Current custom gap width for differential pairs.

Definition at line 581 of file board_design_settings.h.

582  {
583  return m_customDiffPair.m_Gap;
584  }
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, and DIFF_PAIR_DIMENSION::m_Gap.

Referenced by PNS::SIZES_SETTINGS::Init().

◆ GetCustomDiffPairViaGap()

int BOARD_DESIGN_SETTINGS::GetCustomDiffPairViaGap ( )
inline

Function GetCustomDiffPairViaGap.

Returns
Current custom via gap width for differential pairs.

Definition at line 601 of file board_design_settings.h.

References m_customDiffPair, DIFF_PAIR_DIMENSION::m_Gap, and DIFF_PAIR_DIMENSION::m_ViaGap.

Referenced by PNS::SIZES_SETTINGS::Init().

◆ GetCustomDiffPairWidth()

int BOARD_DESIGN_SETTINGS::GetCustomDiffPairWidth ( )
inline

Function GetCustomDiffPairWidth.

Returns
Current custom track width for differential pairs.

Definition at line 561 of file board_design_settings.h.

562  {
563  return m_customDiffPair.m_Width;
564  }
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, and DIFF_PAIR_DIMENSION::m_Width.

Referenced by PNS::SIZES_SETTINGS::Init().

◆ GetCustomTrackWidth()

int BOARD_DESIGN_SETTINGS::GetCustomTrackWidth ( ) const
inline

Function GetCustomTrackWidth.

Returns
Current custom width for a track.

Definition at line 427 of file board_design_settings.h.

428  {
429  return m_customTrackWidth;
430  }

References m_customTrackWidth.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

◆ GetCustomViaDrill()

int BOARD_DESIGN_SETTINGS::GetCustomViaDrill ( ) const
inline

Function GetCustomViaDrill.

Returns
Current custom size for the via drill.

Definition at line 508 of file board_design_settings.h.

509  {
510  return m_customViaSize.m_Drill;
511  }

References m_customViaSize, and VIA_DIMENSION::m_Drill.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

◆ GetCustomViaSize()

int BOARD_DESIGN_SETTINGS::GetCustomViaSize ( ) const
inline

Function GetCustomViaSize.

Returns
Current custom size for the via diameter.

Definition at line 479 of file board_design_settings.h.

480  {
482  }

References m_customViaSize, and VIA_DIMENSION::m_Diameter.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

◆ GetDefault()

◆ GetDiffPairIndex()

unsigned BOARD_DESIGN_SETTINGS::GetDiffPairIndex ( ) const
inline

Function GetDiffPairIndex.

Returns
the current diff pair dimension list index.

Definition at line 538 of file board_design_settings.h.

538 { return m_diffPairIndex; }

References m_diffPairIndex.

Referenced by PNS::SIZES_SETTINGS::Init(), SetCurrentNetClass(), and DIFF_PAIR_MENU::update().

◆ GetEnabledLayers()

LSET BOARD_DESIGN_SETTINGS::GetEnabledLayers ( ) const
inline

Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.

Returns
int - the enabled layers in bit-mapped form.

Definition at line 786 of file board_design_settings.h.

787  {
788  return m_enabledLayers;
789  }
LSET m_enabledLayers
Bit-mask for layer enabling.

References m_enabledLayers.

Referenced by BOARD_STACKUP::BuildDefaultStackupList(), CreatePadsShapesSection(), CreateRoutesSection(), BOARD::GetEnabledLayers(), PARAM_CFG_LAYERS::ReadParam(), and HYPERLYNX_EXPORTER::writeStackupInfo().

◆ GetLayerClass()

int BOARD_DESIGN_SETTINGS::GetLayerClass ( PCB_LAYER_ID  aLayer) const

◆ GetLineThickness()

int BOARD_DESIGN_SETTINGS::GetLineThickness ( PCB_LAYER_ID  aLayer) const

Function GetLineThickness Returns the default graphic segment thickness from the layer class for the given layer.

Definition at line 974 of file board_design_settings.cpp.

975 {
976  return m_LineThickness[ GetLayerClass( aLayer ) ];
977 }
int GetLayerClass(PCB_LAYER_ID aLayer) const
int m_LineThickness[LAYER_CLASS_COUNT]

References GetLayerClass(), and m_LineThickness.

Referenced by DRAWING_TOOL::DrawDimension(), DRAWING_TOOL::getSegmentWidth(), EAGLE_PLUGIN::loadPlain(), DIALOG_PAD_PROPERTIES::onAddPrimitive(), EAGLE_PLUGIN::packageWire(), PCB_EDITOR_CONTROL::PlaceTarget(), and DIALOG_GLOBAL_EDIT_TEXT_AND_GRAPHICS::processItem().

◆ GetSmallestClearanceValue()

int BOARD_DESIGN_SETTINGS::GetSmallestClearanceValue ( )

Function GetSmallestClearanceValue.

Returns
the smallest clearance value found in NetClasses list

Definition at line 806 of file board_design_settings.cpp.

807 {
808  int clearance = m_NetClasses.GetDefault()->GetClearance();
809 
810  //Read list of Net Classes
811  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
812  {
813  NETCLASSPTR netclass = nc->second;
814  clearance = std::min( clearance, netclass->GetClearance() );
815  }
816 
817  return clearance;
818 }
iterator end()
Definition: netclass.h:249
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
iterator begin()
Definition: netclass.h:248
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268

References NETCLASSES::begin(), NETCLASSES::end(), NETCLASSES::GetDefault(), and m_NetClasses.

Referenced by DIALOG_PLOT::init_Dialog().

◆ GetStackupDescriptor()

◆ GetTextItalic()

◆ GetTextSize()

wxSize BOARD_DESIGN_SETTINGS::GetTextSize ( PCB_LAYER_ID  aLayer) const

Function GetTextSize Returns the default text size from the layer class for the given layer.

Definition at line 980 of file board_design_settings.cpp.

981 {
982  return m_TextSize[ GetLayerClass( aLayer ) ];
983 }
int GetLayerClass(PCB_LAYER_ID aLayer) const
wxSize m_TextSize[LAYER_CLASS_COUNT]

References GetLayerClass(), and m_TextSize.

Referenced by PCB_BASE_FRAME::CreateNewModule(), DRAWING_TOOL::DrawDimension(), EAGLE_PLUGIN::loadPlain(), DIALOG_FOOTPRINT_FP_EDITOR::OnAddField(), DIALOG_FOOTPRINT_BOARD_EDITOR::OnAddField(), DRAWING_TOOL::PlaceText(), and DIALOG_GLOBAL_EDIT_TEXT_AND_GRAPHICS::processItem().

◆ GetTextThickness()

int BOARD_DESIGN_SETTINGS::GetTextThickness ( PCB_LAYER_ID  aLayer) const

Function GetTextThickness Returns the default text thickness from the layer class for the given layer.

Definition at line 986 of file board_design_settings.cpp.

987 {
988  return m_TextThickness[ GetLayerClass( aLayer ) ];
989 }
int GetLayerClass(PCB_LAYER_ID aLayer) const
int m_TextThickness[LAYER_CLASS_COUNT]

References GetLayerClass(), and m_TextThickness.

Referenced by PCB_BASE_FRAME::CreateNewModule(), DRAWING_TOOL::DrawDimension(), EAGLE_PLUGIN::loadPlain(), DIALOG_FOOTPRINT_FP_EDITOR::OnAddField(), DIALOG_FOOTPRINT_BOARD_EDITOR::OnAddField(), DRAWING_TOOL::PlaceText(), and DIALOG_GLOBAL_EDIT_TEXT_AND_GRAPHICS::processItem().

◆ GetTextUpright()

bool BOARD_DESIGN_SETTINGS::GetTextUpright ( PCB_LAYER_ID  aLayer) const

◆ GetTrackWidthIndex()

unsigned BOARD_DESIGN_SETTINGS::GetTrackWidthIndex ( ) const
inline

◆ GetViaSizeIndex()

unsigned BOARD_DESIGN_SETTINGS::GetViaSizeIndex ( ) const
inline

◆ GetVisibleElements()

int BOARD_DESIGN_SETTINGS::GetVisibleElements ( ) const
inline

Function GetVisibleElements returns a bit-mask of all the element categories that are visible.

Returns
int - the visible element categories in bit-mapped form.

Definition at line 744 of file board_design_settings.h.

745  {
746  return m_visibleElements;
747  }
int m_visibleElements
Bit-mask for element category visibility.

References m_visibleElements.

Referenced by PCB_IO::formatSetup(), and BOARD::GetVisibleElements().

◆ GetVisibleLayers()

LSET BOARD_DESIGN_SETTINGS::GetVisibleLayers ( ) const
inline

Function GetVisibleLayers returns a bit-mask of all the layers that are visible.

Returns
int - the visible layers in bit-mapped form.

Definition at line 697 of file board_design_settings.h.

698  {
699  return m_visibleLayers;
700  }
LSET m_visibleLayers
Bit-mask for layer visibility.

References m_visibleLayers.

Referenced by BOARD::GetVisibleLayers().

◆ IsElementVisible()

bool BOARD_DESIGN_SETTINGS::IsElementVisible ( GAL_LAYER_ID  aElementCategory) const
inline

Function IsElementVisible tests whether a given element category is visible.

Keep this as an inline function.

Parameters
aElementCategoryis from the enum by the same name
Returns
bool - true if the element is visible.
See also
enum GAL_LAYER_ID

Definition at line 767 of file board_design_settings.h.

768  {
769  return ( m_visibleElements & ( 1 << GAL_LAYER_INDEX( aElementCategory ) ) );
770  }
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_visibleElements
Bit-mask for element category visibility.

References GAL_LAYER_INDEX, and m_visibleElements.

Referenced by BOARD::IsElementVisible().

◆ IsLayerEnabled()

bool BOARD_DESIGN_SETTINGS::IsLayerEnabled ( PCB_LAYER_ID  aLayerId) const
inline

Function IsLayerEnabled tests whether a given layer is enabled.

Parameters
aLayerId= The layer to be tested
Returns
bool - true if the layer is enabled

Definition at line 804 of file board_design_settings.h.

805  {
806  return m_enabledLayers[aLayerId];
807  }
LSET m_enabledLayers
Bit-mask for layer enabling.

References m_enabledLayers.

Referenced by BOARD::IsLayerEnabled(), and SetLayerVisibility().

◆ IsLayerVisible()

bool BOARD_DESIGN_SETTINGS::IsLayerVisible ( PCB_LAYER_ID  aLayerId) const
inline

Function IsLayerVisible tests whether a given layer is visible.

Parameters
aLayerId= The layer to be tested
Returns
bool - true if the layer is visible.

Definition at line 725 of file board_design_settings.h.

726  {
727  // If a layer is disabled, it is automatically invisible
728  return (m_visibleLayers & m_enabledLayers)[aLayerId];
729  }
LSET m_visibleLayers
Bit-mask for layer visibility.
LSET m_enabledLayers
Bit-mask for layer enabling.

References m_enabledLayers, and m_visibleLayers.

Referenced by CINFO3D_VISU::Is3DLayerEnabled(), and BOARD::IsLayerVisible().

◆ SetBoardThickness()

void BOARD_DESIGN_SETTINGS::SetBoardThickness ( int  aThickness)
inline

◆ SetCopperEdgeClearance()

void BOARD_DESIGN_SETTINGS::SetCopperEdgeClearance ( int  aDistance)

Function SetCopperEdgeClearance.

Parameters
aValueThe minimum distance between copper items and board edges.

Definition at line 877 of file board_design_settings.cpp.

878 {
879  m_CopperEdgeClearance = aDistance;
880 }

References m_CopperEdgeClearance.

Referenced by PCB_EDIT_FRAME::OpenProjectFiles(), and PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

◆ SetCopperLayerCount()

void BOARD_DESIGN_SETTINGS::SetCopperLayerCount ( int  aNewLayerCount)

Function SetCopperLayerCount do what its name says...

Parameters
aNewLayerCount= The new number of enabled copper layers

Definition at line 917 of file board_design_settings.cpp.

918 {
919  // if( aNewLayerCount < 2 ) aNewLayerCount = 2;
920 
921  m_copperLayerCount = aNewLayerCount;
922 
923  // ensure consistency with the m_EnabledLayers member
924 #if 0
925  // was:
928 
929  if( m_copperLayerCount > 1 )
931 
932  for( LAYER_NUM ii = LAYER_N_2; ii < aNewLayerCount - 1; ++ii )
933  m_enabledLayers |= GetLayerSet( ii );
934 #else
935  // Update only enabled copper layers mask
936  m_enabledLayers &= ~LSET::AllCuMask();
937  m_enabledLayers |= LSET::AllCuMask( aNewLayerCount );
938 #endif
939 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:686
#define LAYER_FRONT
bit mask for component layer
LSET is a set of PCB_LAYER_IDs.
#define ALL_CU_LAYERS
int LAYER_NUM
Type LAYER_NUM can be replaced with int and removed.
#define LAYER_BACK
bit mask for copper layer
#define LAYER_N_2
int m_copperLayerCount
Number of copper layers for this design.
LSET m_enabledLayers
Bit-mask for layer enabling.

References ALL_CU_LAYERS, LSET::AllCuMask(), LAYER_BACK, LAYER_FRONT, LAYER_N_2, m_copperLayerCount, and m_enabledLayers.

Referenced by BOARD_DESIGN_SETTINGS(), PARAM_CFG_LAYERS::ReadParam(), and BOARD::SetCopperLayerCount().

◆ SetCurrentNetClass()

bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass ( const wxString &  aNetClassName)

Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter change Initialize vias and tracks values displayed in comb boxes of the auxiliary toolbar and some others parameters (netclass name ....)

Parameters
aNetClassName= the new netclass name
Returns
true if lists of tracks and vias sizes are modified

Definition at line 709 of file board_design_settings.cpp.

710 {
711  NETCLASSPTR netClass = m_NetClasses.Find( aNetClassName );
712  bool lists_sizes_modified = false;
713 
714  // if not found (should not happen) use the default
715  if( !netClass )
716  netClass = m_NetClasses.GetDefault();
717 
718  m_currentNetClassName = netClass->GetName();
719 
720  // Initialize others values:
721  if( m_TrackWidthList.size() == 0 )
722  {
723  lists_sizes_modified = true;
724  m_TrackWidthList.push_back( 0 );
725  }
726 
727  if( m_ViasDimensionsList.size() == 0 )
728  {
729  lists_sizes_modified = true;
730  m_ViasDimensionsList.emplace_back( VIA_DIMENSION() );
731  }
732 
733  if( m_DiffPairDimensionsList.size() == 0 )
734  {
735  lists_sizes_modified = true;
737  }
738 
739  /* note the m_ViasDimensionsList[0] and m_TrackWidthList[0] values
740  * are always the Netclass values
741  */
742  if( m_TrackWidthList[0] != netClass->GetTrackWidth() )
743  {
744  lists_sizes_modified = true;
745  m_TrackWidthList[0] = netClass->GetTrackWidth();
746  }
747 
748  if( m_ViasDimensionsList[0].m_Diameter != netClass->GetViaDiameter() )
749  {
750  lists_sizes_modified = true;
751  m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter();
752  }
753 
754  if( m_ViasDimensionsList[0].m_Drill != netClass->GetViaDrill() )
755  {
756  lists_sizes_modified = true;
757  m_ViasDimensionsList[0].m_Drill = netClass->GetViaDrill();
758  }
759 
760  if( m_DiffPairDimensionsList[0].m_Width != netClass->GetDiffPairWidth() )
761  {
762  lists_sizes_modified = true;
763  m_DiffPairDimensionsList[0].m_Width = netClass->GetDiffPairWidth();
764  }
765 
766  if( m_DiffPairDimensionsList[0].m_Gap != netClass->GetDiffPairGap() )
767  {
768  lists_sizes_modified = true;
769  m_DiffPairDimensionsList[0].m_Gap = netClass->GetDiffPairGap();
770  }
771 
772  if( m_DiffPairDimensionsList[0].m_ViaGap != netClass->GetDiffPairViaGap() )
773  {
774  lists_sizes_modified = true;
775  m_DiffPairDimensionsList[0].m_ViaGap = netClass->GetDiffPairViaGap();
776  }
777 
778  if( GetViaSizeIndex() >= m_ViasDimensionsList.size() )
780 
781  if( GetTrackWidthIndex() >= m_TrackWidthList.size() )
783 
786 
787  return lists_sizes_modified;
788 }
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:141
std::vector< int > m_TrackWidthList
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Struct DIFF_PAIR_DIMENSION is a small helper container to handle a stock of specific differential pai...
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
void SetDiffPairIndex(unsigned aIndex)
Function SetDiffPairIndex.
std::vector< VIA_DIMENSION > m_ViasDimensionsList
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
unsigned GetDiffPairIndex() const
Function GetDiffPairIndex.

References NETCLASSES::Find(), NETCLASSES::GetDefault(), GetDiffPairIndex(), GetTrackWidthIndex(), GetViaSizeIndex(), m_currentNetClassName, m_DiffPairDimensionsList, m_NetClasses, m_TrackWidthList, m_ViasDimensionsList, SetDiffPairIndex(), SetTrackWidthIndex(), and SetViaSizeIndex().

Referenced by BOARD::BOARD(), SaveBoard(), and PANEL_SETUP_NETCLASSES::TransferDataFromWindow().

◆ SetCustomDiffPairGap()

void BOARD_DESIGN_SETTINGS::SetCustomDiffPairGap ( int  aGap)
inline

Function SetCustomDiffPairGap Sets custom gap for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aGapis the new gap.

Definition at line 572 of file board_design_settings.h.

573  {
574  m_customDiffPair.m_Gap = aGap;
575  }
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, and DIFF_PAIR_DIMENSION::m_Gap.

Referenced by ROUTER_TOOL::DpDimensionsDialog(), and BOARD::SynchronizeNetsAndNetClasses().

◆ SetCustomDiffPairViaGap()

void BOARD_DESIGN_SETTINGS::SetCustomDiffPairViaGap ( int  aGap)
inline

Function SetCustomDiffPairViaGap Sets custom via gap for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aGapis the new gap. Specify 0 to use the DiffPairGap for vias as well.

Definition at line 592 of file board_design_settings.h.

593  {
594  m_customDiffPair.m_ViaGap = aGap;
595  }
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, and DIFF_PAIR_DIMENSION::m_ViaGap.

Referenced by ROUTER_TOOL::DpDimensionsDialog(), and BOARD::SynchronizeNetsAndNetClasses().

◆ SetCustomDiffPairWidth()

void BOARD_DESIGN_SETTINGS::SetCustomDiffPairWidth ( int  aWidth)
inline

Function SetCustomDiffPairWidth Sets custom track width for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aDrillis the new track wdith.

Definition at line 552 of file board_design_settings.h.

553  {
554  m_customDiffPair.m_Width = aWidth;
555  }
DIFF_PAIR_DIMENSION m_customDiffPair

References m_customDiffPair, and DIFF_PAIR_DIMENSION::m_Width.

Referenced by ROUTER_TOOL::DpDimensionsDialog(), and BOARD::SynchronizeNetsAndNetClasses().

◆ SetCustomTrackWidth()

void BOARD_DESIGN_SETTINGS::SetCustomTrackWidth ( int  aWidth)
inline

Function SetCustomTrackWidth Sets custom width for track (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentTrackWidth() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aWidthis the new track width.

Definition at line 418 of file board_design_settings.h.

419  {
420  m_customTrackWidth = aWidth;
421  }

References m_customTrackWidth.

Referenced by BOARD::BOARD(), BOARD::SynchronizeNetsAndNetClasses(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

◆ SetCustomViaDrill()

void BOARD_DESIGN_SETTINGS::SetCustomViaDrill ( int  aDrill)
inline

Function SetCustomViaDrill Sets custom size for via drill (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentViaDrill() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aDrillis the new drill size.

Definition at line 499 of file board_design_settings.h.

500  {
501  m_customViaSize.m_Drill = aDrill;
502  }

References m_customViaSize, and VIA_DIMENSION::m_Drill.

Referenced by BOARD::BOARD(), BOARD::SynchronizeNetsAndNetClasses(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

◆ SetCustomViaSize()

void BOARD_DESIGN_SETTINGS::SetCustomViaSize ( int  aSize)
inline

Function SetCustomViaSize Sets custom size for via diameter (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentViaSize() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aSizeis the new drill diameter.

Definition at line 470 of file board_design_settings.h.

471  {
472  m_customViaSize.m_Diameter = aSize;
473  }

References m_customViaSize, and VIA_DIMENSION::m_Diameter.

Referenced by BOARD::BOARD(), BOARD::SynchronizeNetsAndNetClasses(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

◆ SetDiffPairIndex()

void BOARD_DESIGN_SETTINGS::SetDiffPairIndex ( unsigned  aIndex)

Function SetDiffPairIndex.

Parameters
aIndexis the diff pair dimensions list index to set.

Definition at line 864 of file board_design_settings.cpp.

865 {
866  m_diffPairIndex = std::min( aIndex, (unsigned) 8 );
867  m_useCustomDiffPair = false;
868 }

References m_diffPairIndex, and m_useCustomDiffPair.

Referenced by DIFF_PAIR_MENU::eventHandler(), and SetCurrentNetClass().

◆ SetElementVisibility()

void BOARD_DESIGN_SETTINGS::SetElementVisibility ( GAL_LAYER_ID  aElementCategory,
bool  aNewState 
)

Function SetElementVisibility changes the visibility of an element category.

Parameters
aElementCategoryis from the enum by the same name
aNewState= The new visibility state of the element category
See also
enum GAL_LAYER_ID

Definition at line 908 of file board_design_settings.cpp.

909 {
910  if( aNewState )
911  m_visibleElements |= 1 << GAL_LAYER_INDEX( aElementCategory );
912  else
913  m_visibleElements &= ~( 1 << GAL_LAYER_INDEX( aElementCategory ) );
914 }
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_visibleElements
Bit-mask for element category visibility.

References GAL_LAYER_INDEX, and m_visibleElements.

Referenced by BOARD::SetElementVisibility().

◆ SetEnabledLayers()

void BOARD_DESIGN_SETTINGS::SetEnabledLayers ( LSET  aMask)

Function SetEnabledLayers changes the bit-mask of enabled layers.

Parameters
aMask= The new bit-mask of enabled layers

Definition at line 942 of file board_design_settings.cpp.

943 {
944  // Back and front layers are always enabled.
945  aMask.set( B_Cu ).set( F_Cu );
946 
947  m_enabledLayers = aMask;
948 
949  // A disabled layer cannot be visible
950  m_visibleLayers &= aMask;
951 
952  // update m_CopperLayerCount to ensure its consistency with m_EnabledLayers
953  m_copperLayerCount = ( aMask & LSET::AllCuMask() ).count();
954 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:686
LSET m_visibleLayers
Bit-mask for layer visibility.
int m_copperLayerCount
Number of copper layers for this design.
LSET m_enabledLayers
Bit-mask for layer enabling.

References LSET::AllCuMask(), B_Cu, F_Cu, m_copperLayerCount, m_enabledLayers, and m_visibleLayers.

Referenced by BOARD::SetEnabledLayers().

◆ SetLayerVisibility()

void BOARD_DESIGN_SETTINGS::SetLayerVisibility ( PCB_LAYER_ID  aLayerId,
bool  aNewState 
)

Function SetLayerVisibility changes the visibility of a given layer.

Parameters
aLayerId= The layer to be changed
aNewState= The new visibility state of the layer

Definition at line 902 of file board_design_settings.cpp.

903 {
904  m_visibleLayers.set( aLayer, aNewState && IsLayerEnabled( aLayer ));
905 }
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
LSET m_visibleLayers
Bit-mask for layer visibility.

References IsLayerEnabled(), and m_visibleLayers.

◆ SetMinHoleSeparation()

void BOARD_DESIGN_SETTINGS::SetMinHoleSeparation ( int  aDistance)

Function SetMinHoleSeparation.

Parameters
aValueThe minimum distance between the edges of two holes or 0 to disable hole-to-hole separation checking.

Definition at line 871 of file board_design_settings.cpp.

872 {
873  m_HoleToHoleMin = aDistance;
874 }
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.

References m_HoleToHoleMin.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

◆ SetProhibitOverlappingCourtyards()

void BOARD_DESIGN_SETTINGS::SetProhibitOverlappingCourtyards ( bool  aProhibit)

Function SetProhibitOverlappingCourtyards.

Parameters
aProhibitSet to true to generate DRC violations from overlapping courtyards.

Definition at line 889 of file board_design_settings.cpp.

890 {
892 }
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC

References m_ProhibitOverlappingCourtyards.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

◆ SetRequireCourtyardDefinitions()

void BOARD_DESIGN_SETTINGS::SetRequireCourtyardDefinitions ( bool  aRequire)

Function SetRequireCourtyardDefinitions.

Parameters
aRequireSet to true to generate DRC violations from missing courtyards.

Definition at line 883 of file board_design_settings.cpp.

884 {
885  m_RequireCourtyards = aRequire;
886 }
bool m_RequireCourtyards
require courtyard definitions in footprints

References m_RequireCourtyards.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

◆ SetTrackWidthIndex()

void BOARD_DESIGN_SETTINGS::SetTrackWidthIndex ( unsigned  aIndex)

Function SetTrackWidthIndex sets the current track width list index to aIndex.

Parameters
aIndexis the track width list index.

Definition at line 857 of file board_design_settings.cpp.

858 {
859  m_trackWidthIndex = std::min( aIndex, (unsigned) m_TrackWidthList.size() );
860  m_useCustomTrackVia = false;
861 }
std::vector< int > m_TrackWidthList

References m_trackWidthIndex, m_TrackWidthList, and m_useCustomTrackVia.

Referenced by TRACK_WIDTH_MENU::eventHandler(), DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::processItem(), SetCurrentNetClass(), PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event(), PCB_EDITOR_CONTROL::TrackWidthDec(), PCB_EDITOR_CONTROL::TrackWidthInc(), and PCB_EDIT_FRAME::UpdateTrackWidthSelectBox().

◆ SetViaSizeIndex()

void BOARD_DESIGN_SETTINGS::SetViaSizeIndex ( unsigned  aIndex)

Function SetViaSizeIndex sets the current via size list index to aIndex.

Parameters
aIndexis the via size list index.

Definition at line 837 of file board_design_settings.cpp.

838 {
839  m_viaSizeIndex = std::min( aIndex, (unsigned) m_ViasDimensionsList.size() );
840  m_useCustomTrackVia = false;
841 }
std::vector< VIA_DIMENSION > m_ViasDimensionsList

References m_useCustomTrackVia, m_ViasDimensionsList, and m_viaSizeIndex.

Referenced by TRACK_WIDTH_MENU::eventHandler(), DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::processItem(), SetCurrentNetClass(), PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event(), PCB_EDIT_FRAME::UpdateViaSizeSelectBox(), PCB_EDITOR_CONTROL::ViaSizeDec(), and PCB_EDITOR_CONTROL::ViaSizeInc().

◆ SetVisibleAlls()

void BOARD_DESIGN_SETTINGS::SetVisibleAlls ( )

Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers.

Definition at line 895 of file board_design_settings.cpp.

896 {
897  SetVisibleLayers( LSET().set() );
898  m_visibleElements = -1;
899 }
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
LSET is a set of PCB_LAYER_IDs.
int m_visibleElements
Bit-mask for element category visibility.

References m_visibleElements, and SetVisibleLayers().

◆ SetVisibleElements()

void BOARD_DESIGN_SETTINGS::SetVisibleElements ( int  aMask)
inline

Function SetVisibleElements changes the bit-mask of visible element categories.

Parameters
aMask= The new bit-mask of visible element categories

Definition at line 754 of file board_design_settings.h.

755  {
756  m_visibleElements = aMask;
757  }
int m_visibleElements
Bit-mask for element category visibility.

References m_visibleElements.

Referenced by LEGACY_PLUGIN::loadSETUP(), and PCB_PARSER::parseSetup().

◆ SetVisibleLayers()

void BOARD_DESIGN_SETTINGS::SetVisibleLayers ( LSET  aMask)
inline

Function SetVisibleLayers changes the bit-mask of visible layers.

Parameters
aMask= The new bit-mask of visible layers

Definition at line 714 of file board_design_settings.h.

715  {
717  }
LSET m_visibleLayers
Bit-mask for layer visibility.
LSET m_enabledLayers
Bit-mask for layer enabling.

References m_enabledLayers, and m_visibleLayers.

Referenced by BOARD_DESIGN_SETTINGS(), SetVisibleAlls(), and BOARD::SetVisibleLayers().

◆ UseCustomDiffPairDimensions() [1/2]

void BOARD_DESIGN_SETTINGS::UseCustomDiffPairDimensions ( bool  aEnabled)
inline

Function UseCustomDiffPairDimensions Enables/disables custom differential pair dimensions.

Parameters
aEnableddecides if custom settings should be used for new differential pairs.

Definition at line 611 of file board_design_settings.h.

612  {
613  m_useCustomDiffPair = aEnabled;
614  }

References m_useCustomDiffPair.

Referenced by DIFF_PAIR_MENU::eventHandler(), PNS::SIZES_SETTINGS::Init(), and DIFF_PAIR_MENU::update().

◆ UseCustomDiffPairDimensions() [2/2]

bool BOARD_DESIGN_SETTINGS::UseCustomDiffPairDimensions ( ) const
inline

Function UseCustomDiffPairDimensions.

Returns
True if custom sizes of diff pairs are enabled, false otherwise.

Definition at line 620 of file board_design_settings.h.

621  {
622  return m_useCustomDiffPair;
623  }

References m_useCustomDiffPair.

◆ UseCustomTrackViaSize() [1/2]

void BOARD_DESIGN_SETTINGS::UseCustomTrackViaSize ( bool  aEnabled)
inline

Function UseCustomTrackViaSize Enables/disables custom track/via size settings.

If enabled, values set with SetCustomTrackWidth()/SetCustomViaSize()/SetCustomViaDrill() are used for newly created tracks and vias.

Parameters
aEnableddecides if custom settings should be used for new tracks/vias.

Definition at line 520 of file board_design_settings.h.

521  {
522  m_useCustomTrackVia = aEnabled;
523  }

References m_useCustomTrackVia.

Referenced by BOARD::BOARD(), ROUTER_TOOL::CustomTrackWidthDialog(), TRACK_WIDTH_MENU::eventHandler(), BOARD::SynchronizeNetsAndNetClasses(), PCB_EDITOR_CONTROL::TrackWidthDec(), PCB_EDITOR_CONTROL::TrackWidthInc(), TRACK_WIDTH_MENU::update(), PCB_EDITOR_CONTROL::ViaSizeDec(), and PCB_EDITOR_CONTROL::ViaSizeInc().

◆ UseCustomTrackViaSize() [2/2]

bool BOARD_DESIGN_SETTINGS::UseCustomTrackViaSize ( ) const
inline

Function UseCustomTrackViaSize.

Returns
True if custom sizes of tracks & vias are enabled, false otherwise.

Definition at line 529 of file board_design_settings.h.

530  {
531  return m_useCustomTrackVia;
532  }

References m_useCustomTrackVia.

◆ UseNetClassDiffPair()

bool BOARD_DESIGN_SETTINGS::UseNetClassDiffPair ( ) const
inline

Function UseNetClassDiffPair returns true if netclass values should be used to obtain appropriate diff pair dimensions.

Definition at line 345 of file board_design_settings.h.

346  {
347  return ( m_diffPairIndex == 0 && !m_useCustomDiffPair );
348  }

References m_diffPairIndex, and m_useCustomDiffPair.

Referenced by PNS::SIZES_SETTINGS::Init().

◆ UseNetClassTrack()

bool BOARD_DESIGN_SETTINGS::UseNetClassTrack ( ) const
inline

Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track width.

Definition at line 327 of file board_design_settings.h.

328  {
329  return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
330  }

References m_trackWidthIndex, and m_useCustomTrackVia.

Referenced by PNS::SIZES_SETTINGS::Init().

◆ UseNetClassVia()

bool BOARD_DESIGN_SETTINGS::UseNetClassVia ( ) const
inline

Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size.

Definition at line 336 of file board_design_settings.h.

337  {
338  return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
339  }

References m_useCustomTrackVia, and m_viaSizeIndex.

Referenced by PNS::SIZES_SETTINGS::Init().

Member Data Documentation

◆ m_AuxOrigin

wxPoint BOARD_DESIGN_SETTINGS::m_AuxOrigin

origin for plot exports

Definition at line 251 of file board_design_settings.h.

Referenced by BOARD::GetAuxOrigin(), LEGACY_PLUGIN::loadSETUP(), PCB_PARSER::parseSetup(), and BOARD::SetAuxOrigin().

◆ m_BlindBuriedViaAllowed

◆ m_boardThickness

int BOARD_DESIGN_SETTINGS::m_boardThickness
private

Board thickness for 3D viewer.

Definition at line 288 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), GetBoardThickness(), and SetBoardThickness().

◆ m_CopperEdgeClearance

◆ m_copperLayerCount

int BOARD_DESIGN_SETTINGS::m_copperLayerCount
private

Number of copper layers for this design.

Definition at line 282 of file board_design_settings.h.

Referenced by GetCopperLayerCount(), SetCopperLayerCount(), and SetEnabledLayers().

◆ m_currentNetClassName

wxString BOARD_DESIGN_SETTINGS::m_currentNetClassName
private

Current net class name used to display netclass info.

This is also the last used netclass after starting a track.

Definition at line 292 of file board_design_settings.h.

Referenced by GetCurrentMicroViaDrill(), GetCurrentMicroViaSize(), GetCurrentNetClassName(), and SetCurrentNetClass().

◆ m_CurrentViaType

VIATYPE BOARD_DESIGN_SETTINGS::m_CurrentViaType

(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)

Definition at line 188 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS().

◆ m_customDiffPair

◆ m_customTrackWidth

int BOARD_DESIGN_SETTINGS::m_customTrackWidth
private

◆ m_customViaSize

◆ m_DiffPairDimensionsList

◆ m_diffPairIndex

◆ m_DimensionPrecision

◆ m_DimensionUnits

◆ m_enabledLayers

LSET BOARD_DESIGN_SETTINGS::m_enabledLayers
private

◆ m_GridOrigin

wxPoint BOARD_DESIGN_SETTINGS::m_GridOrigin

origin for grid offsets

Definition at line 252 of file board_design_settings.h.

Referenced by BOARD::GetGridOrigin(), LEGACY_PLUGIN::loadSETUP(), PCB_PARSER::parseSetup(), and BOARD::SetGridOrigin().

◆ m_HasStackup

bool BOARD_DESIGN_SETTINGS::m_HasStackup

Set to true if the board has a stackup management.

if m_hasStackup is false, a default basic stackup witll be used to generate the ;gbrjob file. if m_hasStackup is true, the stackup defined for the board is used. if not up to date, a error message will be set Could be removed later, or at least always set to true

Definition at line 264 of file board_design_settings.h.

Referenced by GERBER_JOBFILE_WRITER::addJSONMaterialStackup(), BOARD_DESIGN_SETTINGS(), PCB_IO::formatSetup(), and PANEL_SETUP_BOARD_STACKUP::TransferDataFromWindow().

◆ m_HoleToHoleMin

◆ m_LineThickness

◆ m_MaxError

◆ m_MicroViasAllowed

◆ m_MicroViasMinDrill

◆ m_MicroViasMinSize

◆ m_NetClasses

◆ m_Pad_Master

◆ m_ProhibitOverlappingCourtyards

◆ m_RefDefaultlayer

int BOARD_DESIGN_SETTINGS::m_RefDefaultlayer

◆ m_RefDefaultText

wxString BOARD_DESIGN_SETTINGS::m_RefDefaultText

◆ m_RefDefaultVisibility

bool BOARD_DESIGN_SETTINGS::m_RefDefaultVisibility

◆ m_RequireCourtyards

◆ m_SolderMaskMargin

◆ m_SolderMaskMinWidth

◆ m_SolderPasteMargin

◆ m_SolderPasteMarginRatio

double BOARD_DESIGN_SETTINGS::m_SolderPasteMarginRatio

◆ m_stackup

BOARD_STACKUP BOARD_DESIGN_SETTINGS::m_stackup
private

the description of layers stackup, for board fabrication only physical layers are in layers stackup.

It includes not only layers enabled for the board edition, but also dielectic layers

Definition at line 298 of file board_design_settings.h.

Referenced by GetStackupDescriptor().

◆ m_TextItalic

◆ m_TextSize

◆ m_TextThickness

◆ m_TextUpright

◆ m_TrackMinWidth

◆ m_trackWidthIndex

unsigned BOARD_DESIGN_SETTINGS::m_trackWidthIndex
private

◆ m_TrackWidthList

◆ m_UseConnectedTrackWidth

◆ m_useCustomDiffPair

◆ m_useCustomTrackVia

◆ m_ValueDefaultlayer

int BOARD_DESIGN_SETTINGS::m_ValueDefaultlayer

◆ m_ValueDefaultText

wxString BOARD_DESIGN_SETTINGS::m_ValueDefaultText

◆ m_ValueDefaultVisibility

bool BOARD_DESIGN_SETTINGS::m_ValueDefaultVisibility

◆ m_ViasDimensionsList

◆ m_viaSizeIndex

unsigned BOARD_DESIGN_SETTINGS::m_viaSizeIndex
private

◆ m_ViasMinDrill

◆ m_ViasMinSize

◆ m_visibleElements

int BOARD_DESIGN_SETTINGS::m_visibleElements
private

Bit-mask for element category visibility.

Definition at line 287 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), GetVisibleElements(), IsElementVisible(), SetElementVisibility(), SetVisibleAlls(), and SetVisibleElements().

◆ m_visibleLayers

LSET BOARD_DESIGN_SETTINGS::m_visibleLayers
private

Bit-mask for layer visibility.

Definition at line 285 of file board_design_settings.h.

Referenced by GetVisibleLayers(), IsLayerVisible(), SetEnabledLayers(), SetLayerVisibility(), and SetVisibleLayers().

◆ m_ZoneUseNoOutlineInFill

bool BOARD_DESIGN_SETTINGS::m_ZoneUseNoOutlineInFill

Option to handle filled polygons in zones: the "legacy" option is using thick outlines around filled polygons: give the best shape the "new" option is using only filled polygons (no outline: give the faster redraw time moreover when exporting zone filled areas, the excatct shape is exported.

the legacy option can really create redraw time issues for large boards.true for new zone filling option

Definition at line 208 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), ZONE_FILLER::Fill(), PCB_IO::formatSetup(), PCB_PARSER::parseSetup(), PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow(), and PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataToWindow().


The documentation for this class was generated from the following files: