KiCad PCB EDA Suite
routing_matrix.cpp File Reference

Functions to create autorouting maps. More...

#include <fctsys.h>
#include <common.h>
#include <pcbnew.h>
#include <cell.h>
#include <autorout.h>
#include <class_eda_rect.h>
#include <class_board.h>
#include <class_module.h>
#include <class_track.h>
#include <class_drawsegment.h>
#include <class_edge_mod.h>
#include <class_pcb_text.h>

Go to the source code of this file.

Functions

void PlaceCells (BOARD *aPcb, int net_code, int flag)
 Function PlaceCells Initialize the matrix routing by setting obstacles for each occupied cell a cell set to HOLE is an obstacle for tracks and vias a cell set to VIA_IMPOSSIBLE is an obstacle for vias only. More...
 
int Build_Work (BOARD *Pcb)
 

Detailed Description

Functions to create autorouting maps.

Definition in file routing_matrix.cpp.

Function Documentation

int Build_Work ( BOARD Pcb)

Definition at line 329 of file routing_matrix.cpp.

References CH_ACTIF, CH_ROUTE_REQ, CH_UNROUTABLE, BOARD_CONNECTED_ITEM::GetNetCode(), D_PAD::GetPosition(), EDA_RECT::GetX(), EDA_RECT::GetY(), InitWork(), MATRIX_ROUTING_HEAD::m_BrdBox, MATRIX_ROUTING_HEAD::m_GridRouting, MATRIX_ROUTING_HEAD::m_Ncols, MATRIX_ROUTING_HEAD::m_Nrows, RoutingMatrix, SetWork(), SortWork(), wxPoint::x, and wxPoint::y.

330 {
331  RATSNEST_ITEM* pt_rats;
332  D_PAD* pt_pad;
333  int r1, r2, c1, c2, current_net_code;
334  RATSNEST_ITEM* pt_ch;
335  int demi_pas = RoutingMatrix.m_GridRouting / 2;
336  wxString msg;
337 
338  InitWork(); // clear work list
339  int cellCount = 0;
340 
341  for( unsigned ii = 0; ii < Pcb->GetRatsnestsCount(); ii++ )
342  {
343  pt_rats = &Pcb->m_FullRatsnest[ii];
344 
345  /* We consider here only ratsnest that are active ( obviously not yet routed)
346  * and routables (that are not yet attempt to be routed and fail
347  */
348  if( (pt_rats->m_Status & CH_ACTIF) == 0 )
349  continue;
350 
351  if( pt_rats->m_Status & CH_UNROUTABLE )
352  continue;
353 
354  if( (pt_rats->m_Status & CH_ROUTE_REQ) == 0 )
355  continue;
356 
357  pt_pad = pt_rats->m_PadStart;
358 
359  current_net_code = pt_pad->GetNetCode();
360  pt_ch = pt_rats;
361 
362  r1 = ( pt_pad->GetPosition().y - RoutingMatrix.m_BrdBox.GetY() + demi_pas )
364 
365  if( r1 < 0 || r1 >= RoutingMatrix.m_Nrows )
366  {
367  msg.Printf( wxT( "error : row = %d ( padY %d pcbY %d) " ), r1,
368  pt_pad->GetPosition().y, RoutingMatrix.m_BrdBox.GetY() );
369  wxMessageBox( msg );
370  return 0;
371  }
372 
373  c1 = ( pt_pad->GetPosition().x - RoutingMatrix.m_BrdBox.GetX() + demi_pas ) / RoutingMatrix.m_GridRouting;
374 
375  if( c1 < 0 || c1 >= RoutingMatrix.m_Ncols )
376  {
377  msg.Printf( wxT( "error : col = %d ( padX %d pcbX %d) " ), c1,
378  pt_pad->GetPosition().x, RoutingMatrix.m_BrdBox.GetX() );
379  wxMessageBox( msg );
380  return 0;
381  }
382 
383  pt_pad = pt_rats->m_PadEnd;
384 
385  r2 = ( pt_pad->GetPosition().y - RoutingMatrix.m_BrdBox.GetY()
386  + demi_pas ) / RoutingMatrix.m_GridRouting;
387 
388  if( r2 < 0 || r2 >= RoutingMatrix.m_Nrows )
389  {
390  msg.Printf( wxT( "error : row = %d ( padY %d pcbY %d) " ), r2,
391  pt_pad->GetPosition().y, RoutingMatrix.m_BrdBox.GetY() );
392  wxMessageBox( msg );
393  return 0;
394  }
395 
396  c2 = ( pt_pad->GetPosition().x - RoutingMatrix.m_BrdBox.GetX() + demi_pas )
398 
399  if( c2 < 0 || c2 >= RoutingMatrix.m_Ncols )
400  {
401  msg.Printf( wxT( "error : col = %d ( padX %d pcbX %d) " ), c2,
402  pt_pad->GetPosition().x, RoutingMatrix.m_BrdBox.GetX() );
403  wxMessageBox( msg );
404  return 0;
405  }
406 
407  SetWork( r1, c1, current_net_code, r2, c2, pt_ch, 0 );
408  cellCount++;
409  }
410 
411  SortWork();
412  return cellCount;
413 }
#define CH_UNROUTABLE
Definition: class_netinfo.h:58
int SetWork(int, int, int, int, int, RATSNEST_ITEM *, int)
Definition: work.cpp:81
void SortWork()
Definition: work.cpp:135
#define CH_ACTIF
Definition: class_netinfo.h:60
const wxPoint & GetPosition() const override
Definition: class_pad.h:220
int GetNetCode() const
Function GetNetCode.
MATRIX_ROUTING_HEAD RoutingMatrix
Definition: autorout.cpp:51
int GetX() const
int GetY() const
EDA_RECT m_BrdBox
Definition: autorout.h:115
void InitWork()
Definition: work.cpp:68
#define CH_ROUTE_REQ
Definition: class_netinfo.h:59
void PlaceCells ( BOARD aPcb,
int  net_code,
int  flag 
)

Function PlaceCells Initialize the matrix routing by setting obstacles for each occupied cell a cell set to HOLE is an obstacle for tracks and vias a cell set to VIA_IMPOSSIBLE is an obstacle for vias only.

a cell set to CELL_is_EDGE is a frontier. Tracks and vias having the same net code as net_code are skipped (htey do not are obstacles)

For single-sided Routing 1: BOTTOM side is used, and Route_Layer_BOTTOM = Route_Layer_TOP

If flag == FORCE_PADS: all pads will be put in matrix as obstacles.

Definition at line 196 of file routing_matrix.cpp.

References CELL_is_EDGE, BOARD::Drawings(), Edge_Cuts, FORCE_PADS, BOARD_DESIGN_SETTINGS::GetDefault(), BOARD::GetDesignSettings(), EDA_RECT::GetHeight(), BOARD_ITEM::GetLayer(), BOARD_CONNECTED_ITEM::GetNetCode(), BOARD::GetPad(), BOARD::GetPadCount(), EDA_TEXT::GetText(), EDA_TEXT::GetTextAngle(), EDA_TEXT::GetTextBox(), EDA_RECT::GetWidth(), EDA_RECT::GetX(), EDA_RECT::GetY(), HOLE, BOARD::m_Modules, BOARD::m_Track, TRACK::Next(), MODULE::Next(), BOARD_ITEM::Next(), PCB_LINE_T, PCB_MODULE_EDGE_T, PCB_TEXT_T, PlacePad(), BOARD_ITEM::SetLayer(), TraceFilledRectangle(), TraceSegmentPcb(), UNDEFINED_LAYER, VIA_IMPOSSIBLE, WRITE_CELL, and WRITE_OR_CELL.

197 {
198  int ux0 = 0, uy0 = 0, ux1, uy1, dx, dy;
199  int marge, via_marge;
200  LSET layerMask;
201 
202  // use the default NETCLASS?
203  NETCLASSPTR nc = aPcb->GetDesignSettings().GetDefault();
204 
205  int trackWidth = nc->GetTrackWidth();
206  int clearance = nc->GetClearance();
207  int viaSize = nc->GetViaDiameter();
208 
209  marge = clearance + (trackWidth / 2);
210  via_marge = clearance + (viaSize / 2);
211 
212  // Place PADS on matrix routing:
213  for( unsigned i = 0; i < aPcb->GetPadCount(); ++i )
214  {
215  D_PAD* pad = aPcb->GetPad( i );
216 
217  if( net_code != pad->GetNetCode() || (flag & FORCE_PADS) )
218  {
219  ::PlacePad( pad, HOLE, marge, WRITE_CELL );
220  }
221 
222  ::PlacePad( pad, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
223  }
224 
225  // Place outlines of modules on matrix routing, if they are on a copper layer
226  // or on the edge layer
227 
228  for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
229  {
230  for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() )
231  {
232  switch( item->Type() )
233  {
234  case PCB_MODULE_EDGE_T:
235  {
236  EDGE_MODULE* edge = (EDGE_MODULE*) item;
237  EDGE_MODULE tmpEdge( *edge );
238 
239  if( tmpEdge.GetLayer() == Edge_Cuts )
240  tmpEdge.SetLayer( UNDEFINED_LAYER );
241 
242  TraceSegmentPcb( &tmpEdge, HOLE, marge, WRITE_CELL );
243  TraceSegmentPcb( &tmpEdge, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
244  }
245  break;
246 
247  default:
248  break;
249  }
250  }
251  }
252 
253  // Place board outlines and texts on copper layers:
254  for( auto item : aPcb->Drawings() )
255  {
256  switch( item->Type() )
257  {
258  case PCB_LINE_T:
259  {
260  DRAWSEGMENT* DrawSegm;
261 
262  int type_cell = HOLE;
263  DrawSegm = (DRAWSEGMENT*) item;
264  DRAWSEGMENT tmpSegm( DrawSegm );
265 
266  if( DrawSegm->GetLayer() == Edge_Cuts )
267  {
268  tmpSegm.SetLayer( UNDEFINED_LAYER );
269  type_cell |= CELL_is_EDGE;
270  }
271 
272  TraceSegmentPcb( &tmpSegm, type_cell, marge, WRITE_CELL );
273  }
274  break;
275 
276  case PCB_TEXT_T:
277  {
278  TEXTE_PCB* PtText = (TEXTE_PCB*) item;
279 
280  if( PtText->GetText().Length() == 0 )
281  break;
282 
283  EDA_RECT textbox = PtText->GetTextBox( -1 );
284  ux0 = textbox.GetX();
285  uy0 = textbox.GetY();
286  dx = textbox.GetWidth();
287  dy = textbox.GetHeight();
288 
289  // Put bounding box (rectangle) on matrix
290  dx /= 2;
291  dy /= 2;
292 
293  ux1 = ux0 + dx;
294  uy1 = uy0 + dy;
295 
296  ux0 -= dx;
297  uy0 -= dy;
298 
299  layerMask = LSET( PtText->GetLayer() );
300 
301  TraceFilledRectangle( ux0 - marge, uy0 - marge, ux1 + marge,
302  uy1 + marge, PtText->GetTextAngle(),
303  layerMask, HOLE, WRITE_CELL );
304 
305  TraceFilledRectangle( ux0 - via_marge, uy0 - via_marge,
306  ux1 + via_marge, uy1 + via_marge,
307  PtText->GetTextAngle(),
308  layerMask, VIA_IMPOSSIBLE, WRITE_OR_CELL );
309  }
310  break;
311 
312  default:
313  break;
314  }
315  }
316 
317  // Put tracks and vias on matrix
318  for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
319  {
320  if( net_code == track->GetNetCode() )
321  continue;
322 
323  TraceSegmentPcb( track, HOLE, marge, WRITE_CELL );
324  TraceSegmentPcb( track, VIA_IMPOSSIBLE, via_marge, WRITE_OR_CELL );
325  }
326 }
void TraceFilledRectangle(int ux0, int uy0, int ux1, int uy1, LSET side, int color, int op_logic)
Definition: graphpcb.cpp:478
#define VIA_IMPOSSIBLE
Definition: cell.h:48
NETCLASSPTR GetDefault() const
Function GetDefault.
Class BOARD_ITEM is a base class for any item which can be embedded within the BOARD container class...
virtual PCB_LAYER_ID GetLayer() const
Function GetLayer returns the primary layer this item is on.
#define CELL_is_EDGE
Definition: cell.h:42
MODULE * Next() const
Definition: class_module.h:100
int GetHeight() const
class TEXTE_PCB, text on a layer
Definition: typeinfo.h:104
D_PAD * GetPad(unsigned aIndex) const
Function GetPad.
#define WRITE_CELL
Definition: autorout.h:190
class EDGE_MODULE, a footprint edge
Definition: typeinfo.h:106
double GetTextAngle() const
Definition: eda_text.h:164
BOARD_ITEM * Next() const
Class LSET is a set of PCB_LAYER_IDs.
EDA_RECT GetTextBox(int aLine=-1, int aThickness=-1, bool aInvertY=false) const
Function GetTextBox useful in multiline texts to calculate the full text or a line area (for zones fi...
Definition: eda_text.cpp:102
const wxString & GetText() const
Function GetText returns the string associated with the text object.
Definition: eda_text.h:130
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Function GetDesignSettings.
Definition: class_board.h:532
#define FORCE_PADS
Definition: autorout.h:71
unsigned GetPadCount() const
Function GetPadCount.
int GetNetCode() const
Function GetNetCode.
TRACK * Next() const
Definition: class_track.h:98
DLIST< MODULE > m_Modules
Definition: class_board.h:245
Class EDA_RECT handles the component boundary box.
int GetX() const
int GetWidth() const
int GetY() const
void PlacePad(D_PAD *pt_pad, int type, int marge, int op_logic)
Definition: graphpcb.cpp:87
void TraceSegmentPcb(TRACK *pt_segm, int type, int marge, int op_logic)
Definition: graphpcb.cpp:290
DLIST< TRACK > m_Track
Definition: class_board.h:246
class DRAWSEGMENT, a segment not on copper layers
Definition: typeinfo.h:103
#define HOLE
Definition: cell.h:40
DLIST_ITERATOR_WRAPPER< BOARD_ITEM > Drawings()
Definition: class_board.h:251
textbox
Definition: base_struct.cpp:61
#define WRITE_OR_CELL
Definition: autorout.h:191