KiCad PCB EDA Suite
netinfo_item.cpp
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1 
5 /*
6  * This program source code file is part of KiCad, a free EDA CAD application.
7  *
8  * Copyright (C) 2012 Jean-Pierre Charras, jean-pierre.charras@ujf-grenoble.fr
9  * Copyright (C) 2012 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
10  * Copyright (C) 1992-2012 KiCad Developers, see AUTHORS.txt for contributors.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * as published by the Free Software Foundation; either version 2
15  * of the License, or (at your option) any later version.
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17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, you may find one here:
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25  * or you may search the http://www.gnu.org website for the version 2 license,
26  * or you may write to the Free Software Foundation, Inc.,
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28  */
29 
30 #include <fctsys.h>
31 #include <gr_basic.h>
32 #include <class_drawpanel.h>
33 #include <pcb_base_frame.h>
34 #include <common.h>
35 #include <kicad_string.h>
36 #include <pcbnew.h>
37 #include <richio.h>
38 #include <macros.h>
39 #include <msgpanel.h>
40 #include <base_units.h>
41 
42 #include <class_board.h>
43 #include <class_module.h>
44 #include <class_track.h>
45 
46 
47 /*********************************************************/
48 /* class NETINFO_ITEM: handle data relative to a given net */
49 /*********************************************************/
50 
51 NETINFO_ITEM::NETINFO_ITEM( BOARD* aParent, const wxString& aNetName, int aNetCode ) :
52  BOARD_ITEM( aParent, PCB_NETINFO_T ),
53  m_NetCode( aNetCode ),
54  m_isCurrent( true ),
55  m_Netname( aNetName ),
56  m_ShortNetname( m_Netname.AfterLast( '/' ) )
57 {
58  m_parent = aParent;
59 
60  if( aParent )
62  else
63  m_NetClass = std::make_shared<NETCLASS>( "<invalid>" );
64 }
65 
66 
68 {
69  // m_NetClass is not owned by me.
70 }
71 
72 
77  wxDC* DC,
78  GR_DRAWMODE aDrawMode,
79  const wxPoint& aOffset )
80 {
81 }
82 
83 
84 void NETINFO_ITEM::SetClass( const NETCLASSPTR& aNetClass )
85 {
86  wxCHECK( m_parent, /* void */ );
87  m_NetClass = aNetClass ? aNetClass : m_parent->GetDesignSettings().m_NetClasses.GetDefault();
88 }
89 
90 
91 void NETINFO_ITEM::GetMsgPanelInfo( EDA_UNITS_T aUnits, std::vector< MSG_PANEL_ITEM >& aList )
92 {
93  wxString txt;
94  double lengthnet = 0.0; // This is the length of tracks on pcb
95  double lengthPadToDie = 0.0; // this is the length of internal ICs connections
96 
97  aList.push_back( MSG_PANEL_ITEM( _( "Net Name" ), GetNetname(), RED ) );
98 
99  txt.Printf( wxT( "%d" ), GetNet() );
100  aList.push_back( MSG_PANEL_ITEM( _( "Net Code" ), txt, RED ) );
101 
102  // Warning: for netcode == NETINFO_LIST::ORPHANED, the parent or the board
103  // can be NULL
104  BOARD * board = m_parent ? m_parent->GetBoard() : NULL;
105 
106  if( board == NULL )
107  return;
108 
109  int count = 0;
110  for( auto mod : board->Modules() )
111  {
112  for( auto pad : mod->Pads() )
113  {
114  if( pad->GetNetCode() == GetNet() )
115  {
116  count++;
117  lengthPadToDie += pad->GetPadToDieLength();
118  }
119  }
120  }
121 
122  txt.Printf( wxT( "%d" ), count );
123  aList.push_back( MSG_PANEL_ITEM( _( "Pads" ), txt, DARKGREEN ) );
124 
125  count = 0;
126 
127  for( const TRACK *track = board->m_Track; track != NULL; track = track->Next() )
128  {
129  if( track->Type() == PCB_VIA_T )
130  {
131  if( track->GetNetCode() == GetNet() )
132  count++;
133  }
134 
135  if( track->Type() == PCB_TRACE_T )
136  {
137  if( track->GetNetCode() == GetNet() )
138  lengthnet += track->GetLength();
139  }
140  }
141 
142  txt.Printf( wxT( "%d" ), count );
143  aList.push_back( MSG_PANEL_ITEM( _( "Vias" ), txt, BLUE ) );
144 
145  // Displays the full net length (tracks on pcb + internal ICs connections ):
146  txt = MessageTextFromValue( aUnits, lengthnet + lengthPadToDie );
147  aList.push_back( MSG_PANEL_ITEM( _( "Net Length" ), txt, RED ) );
148 
149  // Displays the net length of tracks only:
150  txt = MessageTextFromValue( aUnits, lengthnet );
151  aList.push_back( MSG_PANEL_ITEM( _( "On Board" ), txt, RED ) );
152 
153  // Displays the net length of internal ICs connections (wires inside ICs):
154  txt = MessageTextFromValue( aUnits, lengthPadToDie, true );
155  aList.push_back( MSG_PANEL_ITEM( _( "In Package" ), txt, RED ) );
156 }
Definition: colors.h:57
NETCLASSPTR m_NetClass
Definition: netinfo.h:85
Implementation of conversion functions that require both schematic and board internal units...
Class BOARD_ITEM is a base class for any item which can be embedded within the BOARD container class...
Class BOARD to handle a board.
BOARD * m_parent
The parent board the net belongs to.
Definition: netinfo.h:87
Functions relatives to tracks, vias and segments used to fill zones.
class TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
This file contains miscellaneous commonly used macros and functions.
Classes used in Pcbnew, CvPcb and GerbView.
wxString MessageTextFromValue(EDA_UNITS_T aUnits, int aValue, bool aUseMils)
Definition: base_units.cpp:125
void Draw(EDA_DRAW_PANEL *panel, wxDC *DC, GR_DRAWMODE aDrawMode, const wxPoint &offset) override
Function Draw.
DLIST_ITERATOR_WRAPPER< MODULE > Modules()
Definition: class_board.h:254
GR_DRAWMODE
Drawmode. Compositing mode plus a flag or two.
Definition: gr_basic.h:37
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Function GetDesignSettings.
Definition: class_board.h:538
Definition: colors.h:60
int GetNet() const
Function GetNet.
Definition: netinfo.h:231
NETINFO_ITEM(BOARD *aParent, const wxString &aNetName=wxEmptyString, int aNetCode=-1)
NETINFO_ITEM class, to handle info on nets: netnames, net constraints.
TRACK * Next() const
Definition: class_track.h:99
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:170
class NETINFO_ITEM, a description of a net
Definition: typeinfo.h:104
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
void SetClass(const NETCLASSPTR &aNetClass)
Function SetClass sets aNetclass into this NET.
The common library.
virtual BOARD * GetBoard() const
Function GetBoard returns the BOARD in which this BOARD_ITEM resides, or NULL if none.
void GetMsgPanelInfo(EDA_UNITS_T aUnits, std::vector< MSG_PANEL_ITEM > &aList) override
Function GetMsgPanelInfo returns the information about the NETINFO_ITEM in aList to display in the me...
class VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
DLIST< TRACK > m_Track
Definition: class_board.h:249
Module description (excepted pads)
const wxString & GetNetname() const
Function GetNetname.
Definition: netinfo.h:239
Class EDA_MSG_ITEM is used EDA_MSG_PANEL as the item type for displaying messages.
Definition: msgpanel.h:53
Message panel definition file.
#define mod(a, n)
Definition: greymap.cpp:24
EDA_UNITS_T
Definition: common.h:159