KiCad PCB EDA Suite
drc.cpp
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1 /*
2  * This program source code file is part of KiCad, a free EDA CAD application.
3  *
4  * Copyright (C) 2004-2017 Jean-Pierre Charras, jp.charras at wanadoo.fr
5  * Copyright (C) 2014 Dick Hollenbeck, dick@softplc.com
6  * Copyright (C) 2017-2018 KiCad Developers, see change_log.txt for contributors.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
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20  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21  * or you may search the http://www.gnu.org website for the version 2 license,
22  * or you may write to the Free Software Foundation, Inc.,
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24  */
25 
30 #include <fctsys.h>
31 #include <pcb_edit_frame.h>
32 #include <trigo.h>
33 #include <board_design_settings.h>
34 #include <class_edge_mod.h>
35 #include <class_drawsegment.h>
36 #include <class_module.h>
37 #include <class_track.h>
38 #include <class_pad.h>
39 #include <class_zone.h>
40 #include <class_pcb_text.h>
41 #include <class_draw_panel_gal.h>
42 #include <view/view.h>
43 #include <geometry/seg.h>
44 #include <math_for_graphics.h>
48 
49 #include <tool/tool_manager.h>
50 #include <tools/pcb_actions.h>
51 
52 #include <pcbnew.h>
53 #include <drc.h>
54 
55 #include <dialog_drc.h>
56 #include <wx/progdlg.h>
57 #include <board_commit.h>
58 #include <geometry/shape_segment.h>
59 #include <geometry/shape_arc.h>
60 
61 void DRC::ShowDRCDialog( wxWindow* aParent )
62 {
63  bool show_dlg_modal = true;
64 
65  // the dialog needs a parent frame. if it is not specified, this is
66  // the PCB editor frame specified in DRC class.
67  if( aParent == NULL )
68  {
69  // if any parent is specified, the dialog is modal.
70  // if this is the default PCB editor frame, it is not modal
71  show_dlg_modal = false;
72  aParent = m_pcbEditorFrame;
73  }
74 
76  toolMgr->RunAction( ACTIONS::cancelInteractive, true );
77  toolMgr->DeactivateTool();
78  toolMgr->RunAction( PCB_ACTIONS::selectionClear, true );
79 
80  if( !m_drcDialog )
81  {
82  m_drcDialog = new DIALOG_DRC_CONTROL( this, m_pcbEditorFrame, aParent );
84 
86 
87  if( show_dlg_modal )
88  m_drcDialog->ShowModal();
89  else
90  m_drcDialog->Show( true );
91  }
92  else // The dialog is just not visible (because the user has double clicked on an error item)
93  {
95  m_drcDialog->Show( true );
96  }
97 }
98 
99 
101 {
102  // In legacy routing mode, do not add markers to the board.
103  // only shows the drc error message
105  {
106  m_pcbEditorFrame->SetMsgPanel( aMarker );
107  delete aMarker;
108  m_currentMarker = nullptr;
109  }
110  else
111  {
112  BOARD_COMMIT commit( m_pcbEditorFrame );
113  commit.Add( aMarker );
114  commit.Push( wxEmptyString, false, false );
115  }
116 }
117 
118 
119 void DRC::DestroyDRCDialog( int aReason )
120 {
121  if( m_drcDialog )
122  {
124 
125  m_drcDialog->Destroy();
126  m_drcDialog = NULL;
127  }
128 }
129 
130 
131 DRC::DRC( PCB_EDIT_FRAME* aPcbWindow )
132 {
133  m_pcbEditorFrame = aPcbWindow;
134  m_pcb = aPcbWindow->GetBoard();
135  m_drcDialog = NULL;
136 
137  // establish initial values for everything:
138  m_drcInLegacyRoutingMode = false;
139  m_doPad2PadTest = true; // enable pad to pad clearance tests
140  m_doUnconnectedTest = true; // enable unconnected tests
141  m_doZonesTest = true; // enable zone to items clearance tests
142  m_doKeepoutTest = true; // enable keepout areas to items clearance tests
143  m_refillZones = false; // Only fill zones if requested by user.
144  m_reportAllTrackErrors = false;
145  m_doCreateRptFile = false;
146 
147  // m_rptFilename set to empty by its constructor
148 
149  m_currentMarker = NULL;
150 
151  m_segmAngle = 0;
152  m_segmLength = 0;
153 
154  m_xcliplo = 0;
155  m_ycliplo = 0;
156  m_xcliphi = 0;
157  m_ycliphi = 0;
158 }
159 
160 
162 {
163  // maybe someday look at pointainer.h <- google for "pointainer.h"
164  for( unsigned i = 0; i<m_unconnected.size(); ++i )
165  delete m_unconnected[i];
166 }
167 
168 
169 int DRC::DrcOnCreatingTrack( TRACK* aRefSegm, TRACK* aList )
170 {
171  updatePointers();
172 
173  // Set right options for this on line drc
174  int drc_state = m_drcInLegacyRoutingMode;
176  int rpt_state = m_reportAllTrackErrors;
177  m_reportAllTrackErrors = false;
178 
179  if( !doTrackDrc( aRefSegm, aList, true ) )
180  {
181  if( m_currentMarker )
182  {
184  delete m_currentMarker;
185  m_currentMarker = nullptr;
186  }
187 
188  m_drcInLegacyRoutingMode = drc_state;
189  m_reportAllTrackErrors = rpt_state;
190  return BAD_DRC;
191  }
192 
193  if( !doTrackKeepoutDrc( aRefSegm ) )
194  {
195  if( m_currentMarker )
196  {
198  delete m_currentMarker;
199  m_currentMarker = nullptr;
200  }
201 
202  m_drcInLegacyRoutingMode = drc_state;
203  m_reportAllTrackErrors = rpt_state;
204  return BAD_DRC;
205  }
206 
207  m_drcInLegacyRoutingMode = drc_state;
208  m_reportAllTrackErrors = rpt_state;
209  return OK_DRC;
210 }
211 
212 
213 int DRC::TestZoneToZoneOutline( ZONE_CONTAINER* aZone, bool aCreateMarkers )
214 {
215  BOARD* board = m_pcbEditorFrame->GetBoard();
216  BOARD_COMMIT commit( m_pcbEditorFrame );
217  int nerrors = 0;
218 
219  std::vector<SHAPE_POLY_SET> smoothed_polys;
220  smoothed_polys.resize( board->GetAreaCount() );
221 
222  for( int ia = 0; ia < board->GetAreaCount(); ia++ )
223  {
224  ZONE_CONTAINER* zoneRef = board->GetArea( ia );
225  zoneRef->BuildSmoothedPoly( smoothed_polys[ia] );
226  }
227 
228  // iterate through all areas
229  for( int ia = 0; ia < board->GetAreaCount(); ia++ )
230  {
231  ZONE_CONTAINER* zoneRef = board->GetArea( ia );
232 
233  if( !zoneRef->IsOnCopperLayer() )
234  continue;
235 
236  // When testing only a single area, skip all others
237  if( aZone && ( aZone != zoneRef) )
238  continue;
239 
240  // If we are testing a single zone, then iterate through all other zones
241  // Otherwise, we have already tested the zone combination
242  for( int ia2 = ( aZone ? 0 : ia + 1 ); ia2 < board->GetAreaCount(); ia2++ )
243  {
244  ZONE_CONTAINER* zoneToTest = board->GetArea( ia2 );
245 
246  if( zoneRef == zoneToTest )
247  continue;
248 
249  // test for same layer
250  if( zoneRef->GetLayer() != zoneToTest->GetLayer() )
251  continue;
252 
253  // Test for same net
254  if( zoneRef->GetNetCode() == zoneToTest->GetNetCode() && zoneRef->GetNetCode() >= 0 )
255  continue;
256 
257  // test for different priorities
258  if( zoneRef->GetPriority() != zoneToTest->GetPriority() )
259  continue;
260 
261  // test for different types
262  if( zoneRef->GetIsKeepout() != zoneToTest->GetIsKeepout() )
263  continue;
264 
265  // Examine a candidate zone: compare zoneToTest to zoneRef
266 
267  // Get clearance used in zone to zone test. The policy used to
268  // obtain that value is now part of the zone object itself by way of
269  // ZONE_CONTAINER::GetClearance().
270  int zone2zoneClearance = zoneRef->GetClearance( zoneToTest );
271 
272  // Keepout areas have no clearance, so set zone2zoneClearance to 1
273  // ( zone2zoneClearance = 0 can create problems in test functions)
274  if( zoneRef->GetIsKeepout() )
275  zone2zoneClearance = 1;
276 
277  // test for some corners of zoneRef inside zoneToTest
278  for( auto iterator = smoothed_polys[ia].IterateWithHoles(); iterator; iterator++ )
279  {
280  VECTOR2I currentVertex = *iterator;
281  wxPoint pt( currentVertex.x, currentVertex.y );
282 
283  if( smoothed_polys[ia2].Contains( currentVertex ) )
284  {
285  if( aCreateMarkers )
286  commit.Add( newMarker( pt, zoneRef, zoneToTest, DRCE_ZONES_INTERSECT ) );
287 
288  nerrors++;
289  }
290  }
291 
292  // test for some corners of zoneToTest inside zoneRef
293  for( auto iterator = smoothed_polys[ia2].IterateWithHoles(); iterator; iterator++ )
294  {
295  VECTOR2I currentVertex = *iterator;
296  wxPoint pt( currentVertex.x, currentVertex.y );
297 
298  if( smoothed_polys[ia].Contains( currentVertex ) )
299  {
300  if( aCreateMarkers )
301  commit.Add( newMarker( pt, zoneToTest, zoneRef, DRCE_ZONES_INTERSECT ) );
302 
303  nerrors++;
304  }
305  }
306 
307  // Iterate through all the segments of refSmoothedPoly
308  std::set<wxPoint> conflictPoints;
309 
310  for( auto refIt = smoothed_polys[ia].IterateSegmentsWithHoles(); refIt; refIt++ )
311  {
312  // Build ref segment
313  SEG refSegment = *refIt;
314 
315  // Iterate through all the segments in smoothed_polys[ia2]
316  for( auto testIt = smoothed_polys[ia2].IterateSegmentsWithHoles(); testIt; testIt++ )
317  {
318  // Build test segment
319  SEG testSegment = *testIt;
320  wxPoint pt;
321 
322  int ax1, ay1, ax2, ay2;
323  ax1 = refSegment.A.x;
324  ay1 = refSegment.A.y;
325  ax2 = refSegment.B.x;
326  ay2 = refSegment.B.y;
327 
328  int bx1, by1, bx2, by2;
329  bx1 = testSegment.A.x;
330  by1 = testSegment.A.y;
331  bx2 = testSegment.B.x;
332  by2 = testSegment.B.y;
333 
334  int d = GetClearanceBetweenSegments( bx1, by1, bx2, by2,
335  0,
336  ax1, ay1, ax2, ay2,
337  0,
338  zone2zoneClearance,
339  &pt.x, &pt.y );
340 
341  if( d < zone2zoneClearance )
342  conflictPoints.insert( pt );
343  }
344  }
345 
346  for( wxPoint pt : conflictPoints )
347  {
348  if( aCreateMarkers )
349  commit.Add( newMarker( pt, zoneRef, zoneToTest, DRCE_ZONES_TOO_CLOSE ) );
350 
351  nerrors++;
352  }
353  }
354  }
355 
356  if( aCreateMarkers )
357  commit.Push( wxEmptyString, false, false );
358 
359  return nerrors;
360 }
361 
362 
363 int DRC::DrcOnCreatingZone( ZONE_CONTAINER* aArea, int aCornerIndex )
364 {
365  updatePointers();
366 
367  // Set right options for this on line drc
368  int drc_state = m_drcInLegacyRoutingMode;
370  int rpt_state = m_reportAllTrackErrors;
371  m_reportAllTrackErrors = false;
372 
373  if( !doEdgeZoneDrc( aArea, aCornerIndex ) )
374  {
375  wxASSERT( m_currentMarker );
377  delete m_currentMarker;
378  m_currentMarker = nullptr;
379  m_drcInLegacyRoutingMode = drc_state;
380  m_reportAllTrackErrors = rpt_state;
381  return BAD_DRC;
382  }
383 
384  m_drcInLegacyRoutingMode = drc_state;
385  m_reportAllTrackErrors = rpt_state;
386  return OK_DRC;
387 }
388 
389 
390 void DRC::RunTests( wxTextCtrl* aMessages )
391 {
392  // be sure m_pcb is the current board, not a old one
393  // ( the board can be reloaded )
395 
396  // someone should have cleared the two lists before calling this.
397 
398  if( !testNetClasses() )
399  {
400  // testing the netclasses is a special case because if the netclasses
401  // do not pass the BOARD_DESIGN_SETTINGS checks, then every member of a net
402  // class (a NET) will cause its items such as tracks, vias, and pads
403  // to also fail. So quit after *all* netclass errors have been reported.
404  if( aMessages )
405  aMessages->AppendText( _( "Aborting\n" ) );
406 
407  // update the m_drcDialog listboxes
408  updatePointers();
409 
410  return;
411  }
412 
413  // test pad to pad clearances, nothing to do with tracks, vias or zones.
414  if( m_doPad2PadTest )
415  {
416  if( aMessages )
417  {
418  aMessages->AppendText( _( "Pad clearances...\n" ) );
419  wxSafeYield();
420  }
421 
422  testPad2Pad();
423  }
424 
425  // test clearances between drilled holes
426  if( aMessages )
427  {
428  aMessages->AppendText( _( "Drill clearances...\n" ) );
429  wxSafeYield();
430  }
431 
433 
434  // caller (a wxTopLevelFrame) is the wxDialog or the Pcb Editor frame that call DRC:
435  wxWindow* caller = aMessages ? aMessages->GetParent() : m_pcbEditorFrame;
436 
437  if( m_refillZones )
438  {
439  if( aMessages )
440  aMessages->AppendText( _( "Refilling all zones...\n" ) );
441 
442  m_pcbEditorFrame->Fill_All_Zones( caller );
443  }
444  else
445  {
446  if( aMessages )
447  aMessages->AppendText( _( "Checking zone fills...\n" ) );
448 
450  }
451 
452  // test track and via clearances to other tracks, pads, and vias
453  if( aMessages )
454  {
455  aMessages->AppendText( _( "Track clearances...\n" ) );
456  wxSafeYield();
457  }
458 
459  testTracks( aMessages ? aMessages->GetParent() : m_pcbEditorFrame, true );
460 
461  // test zone clearances to other zones
462  if( aMessages )
463  {
464  aMessages->AppendText( _( "Zone to zone clearances...\n" ) );
465  wxSafeYield();
466  }
467 
468  testZones();
469 
470  // find and gather unconnected pads.
471  if( m_doUnconnectedTest )
472  {
473  if( aMessages )
474  {
475  aMessages->AppendText( _( "Unconnected pads...\n" ) );
476  aMessages->Refresh();
477  }
478 
479  testUnconnected();
480  }
481 
482  // find and gather vias, tracks, pads inside keepout areas.
483  if( m_doKeepoutTest )
484  {
485  if( aMessages )
486  {
487  aMessages->AppendText( _( "Keepout areas ...\n" ) );
488  aMessages->Refresh();
489  }
490 
492  }
493 
494  // find and gather vias, tracks, pads inside text boxes.
495  if( aMessages )
496  {
497  aMessages->AppendText( _( "Test texts...\n" ) );
498  wxSafeYield();
499  }
500 
502 
503  // find overlapping courtyard ares.
506  {
507  if( aMessages )
508  {
509  aMessages->AppendText( _( "Courtyard areas...\n" ) );
510  aMessages->Refresh();
511  }
512 
514  }
515 
516  // Check if there are items on disabled layers
518 
519  if( aMessages )
520  {
521  aMessages->AppendText( _( "Items on disabled layers...\n" ) );
522  aMessages->Refresh();
523  }
524 
525  // update the m_drcDialog listboxes
526  updatePointers();
527 
528  if( aMessages )
529  {
530  // no newline on this one because it is last, don't want the window
531  // to unnecessarily scroll.
532  aMessages->AppendText( _( "Finished" ) );
533  }
534 }
535 
536 
538 {
539  testUnconnected();
540 
541  // update the m_drcDialog listboxes
542  updatePointers();
543 }
544 
545 
547 {
548  // update my pointers, m_pcbEditorFrame is the only unchangeable one
550 
551  if( m_drcDialog ) // Use diag list boxes only in DRC dialog
552  {
557 
559  }
560 }
561 
562 
563 bool DRC::doNetClass( const NETCLASSPTR& nc, wxString& msg )
564 {
565  bool ret = true;
566 
568 
569 #define FmtVal( x ) GetChars( StringFromValue( m_pcbEditorFrame->GetUserUnits(), x ) )
570 
571 #if 0 // set to 1 when (if...) BOARD_DESIGN_SETTINGS has a m_MinClearance value
572  if( nc->GetClearance() < g.m_MinClearance )
573  {
574  msg.Printf( _( "NETCLASS: \"%s\" has Clearance:%s which is less than global:%s" ),
575  GetChars( nc->GetName() ),
576  FmtVal( nc->GetClearance() ),
577  FmtVal( g.m_TrackClearance )
578  );
579 
581  m_currentMarker = nullptr;
582  ret = false;
583  }
584 #endif
585 
586  if( nc->GetTrackWidth() < g.m_TrackMinWidth )
587  {
588  msg.Printf( _( "NETCLASS: \"%s\" has TrackWidth:%s which is less than global:%s" ),
589  GetChars( nc->GetName() ),
590  FmtVal( nc->GetTrackWidth() ),
592  );
593 
595  ret = false;
596  }
597 
598  if( nc->GetViaDiameter() < g.m_ViasMinSize )
599  {
600  msg.Printf( _( "NETCLASS: \"%s\" has Via Dia:%s which is less than global:%s" ),
601  GetChars( nc->GetName() ),
602  FmtVal( nc->GetViaDiameter() ),
603  FmtVal( g.m_ViasMinSize )
604  );
605 
607  ret = false;
608  }
609 
610  if( nc->GetViaDrill() < g.m_ViasMinDrill )
611  {
612  msg.Printf( _( "NETCLASS: \"%s\" has Via Drill:%s which is less than global:%s" ),
613  GetChars( nc->GetName() ),
614  FmtVal( nc->GetViaDrill() ),
616  );
617 
619  ret = false;
620  }
621 
622  if( nc->GetuViaDiameter() < g.m_MicroViasMinSize )
623  {
624  msg.Printf( _( "NETCLASS: \"%s\" has uVia Dia:%s which is less than global:%s" ),
625  GetChars( nc->GetName() ),
626  FmtVal( nc->GetuViaDiameter() ),
627  FmtVal( g.m_MicroViasMinSize ) );
628 
630  ret = false;
631  }
632 
633  if( nc->GetuViaDrill() < g.m_MicroViasMinDrill )
634  {
635  msg.Printf( _( "NETCLASS: \"%s\" has uVia Drill:%s which is less than global:%s" ),
636  GetChars( nc->GetName() ),
637  FmtVal( nc->GetuViaDrill() ),
639 
641  ret = false;
642  }
643 
644  return ret;
645 }
646 
647 
649 {
650  bool ret = true;
651 
653 
654  wxString msg; // construct this only once here, not in a loop, since somewhat expensive.
655 
656  if( !doNetClass( netclasses.GetDefault(), msg ) )
657  ret = false;
658 
659  for( NETCLASSES::const_iterator i = netclasses.begin(); i != netclasses.end(); ++i )
660  {
661  NETCLASSPTR nc = i->second;
662 
663  if( !doNetClass( nc, msg ) )
664  ret = false;
665  }
666 
667  return ret;
668 }
669 
670 
672 {
673  std::vector<D_PAD*> sortedPads;
674 
675  m_pcb->GetSortedPadListByXthenYCoord( sortedPads );
676 
677  if( sortedPads.size() == 0 )
678  return;
679 
680  // find the max size of the pads (used to stop the test)
681  int max_size = 0;
682 
683  for( unsigned i = 0; i < sortedPads.size(); ++i )
684  {
685  D_PAD* pad = sortedPads[i];
686 
687  // GetBoundingRadius() is the radius of the minimum sized circle fully containing the pad
688  int radius = pad->GetBoundingRadius();
689 
690  if( radius > max_size )
691  max_size = radius;
692  }
693 
694  // Upper limit of pad list (limit not included)
695  D_PAD** listEnd = &sortedPads[0] + sortedPads.size();
696 
697  // Test the pads
698  for( unsigned i = 0; i< sortedPads.size(); ++i )
699  {
700  D_PAD* pad = sortedPads[i];
701 
702  int x_limit = max_size + pad->GetClearance() +
703  pad->GetBoundingRadius() + pad->GetPosition().x;
704 
705  if( !doPadToPadsDrc( pad, &sortedPads[i], listEnd, x_limit ) )
706  {
707  wxASSERT( m_currentMarker );
709  m_currentMarker = nullptr;
710  }
711  }
712 }
713 
714 
716 {
717  int holeToHoleMin = m_pcb->GetDesignSettings().m_HoleToHoleMin;
718 
719  if( holeToHoleMin == 0 ) // No min setting turns testing off.
720  return;
721 
722  // Test drilled hole clearances to minimize drill bit breakage.
723  //
724  // Notes: slots are milled, so we're only concerned with circular holes
725  // microvias are laser-drilled, so we're only concerned with standard vias
726 
727  struct DRILLED_HOLE
728  {
729  wxPoint m_location;
730  int m_drillRadius;
731  BOARD_ITEM* m_owner;
732  };
733 
734  std::vector<DRILLED_HOLE> holes;
735  DRILLED_HOLE hole;
736 
737  for( MODULE* mod : m_pcb->Modules() )
738  {
739  for( D_PAD* pad : mod->Pads( ) )
740  {
741  if( pad->GetDrillSize().x && pad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )
742  {
743  hole.m_location = pad->GetPosition();
744  hole.m_drillRadius = pad->GetDrillSize().x / 2;
745  hole.m_owner = pad;
746  holes.push_back( hole );
747  }
748  }
749  }
750 
751  for( TRACK* track : m_pcb->Tracks() )
752  {
753  VIA* via = dynamic_cast<VIA*>( track );
754  if( via && via->GetViaType() == VIA_THROUGH )
755  {
756  hole.m_location = via->GetPosition();
757  hole.m_drillRadius = via->GetDrillValue() / 2;
758  hole.m_owner = via;
759  holes.push_back( hole );
760  }
761  }
762 
763  for( size_t ii = 0; ii < holes.size(); ++ii )
764  {
765  const DRILLED_HOLE& refHole = holes[ ii ];
766 
767  for( size_t jj = ii + 1; jj < holes.size(); ++jj )
768  {
769  const DRILLED_HOLE& checkHole = holes[ jj ];
770 
771  // Holes with identical locations are allowable
772  if( checkHole.m_location == refHole.m_location )
773  continue;
774 
775  if( KiROUND( GetLineLength( checkHole.m_location, refHole.m_location ) )
776  < checkHole.m_drillRadius + refHole.m_drillRadius + holeToHoleMin )
777  {
779  DRCE_DRILLED_HOLES_TOO_CLOSE, refHole.m_location,
780  refHole.m_owner, refHole.m_location,
781  checkHole.m_owner, checkHole.m_location ) );
782  }
783  }
784  }
785 }
786 
787 
788 void DRC::testTracks( wxWindow *aActiveWindow, bool aShowProgressBar )
789 {
790  wxProgressDialog * progressDialog = NULL;
791  const int delta = 500; // This is the number of tests between 2 calls to the
792  // progress bar
793  int count = 0;
794 
795  for( TRACK* segm = m_pcb->m_Track; segm && segm->Next(); segm = segm->Next() )
796  count++;
797 
798  int deltamax = count/delta;
799 
800  if( aShowProgressBar && deltamax > 3 )
801  {
802  // Do not use wxPD_APP_MODAL style here: it is not necessary and create issues
803  // on OSX
804  progressDialog = new wxProgressDialog( _( "Track clearances" ), wxEmptyString,
805  deltamax, aActiveWindow,
806  wxPD_AUTO_HIDE | wxPD_CAN_ABORT | wxPD_ELAPSED_TIME );
807  progressDialog->Update( 0, wxEmptyString );
808  }
809 
810  int ii = 0;
811  count = 0;
812 
813  for( TRACK* segm = m_pcb->m_Track; segm; segm = segm->Next() )
814  {
815  if( ii++ > delta )
816  {
817  ii = 0;
818  count++;
819 
820  if( progressDialog )
821  {
822  if( !progressDialog->Update( count, wxEmptyString ) )
823  break; // Aborted by user
824 #ifdef __WXMAC__
825  // Work around a dialog z-order issue on OS X
826  if( count == deltamax )
827  aActiveWindow->Raise();
828 #endif
829  }
830  }
831 
832  if( !doTrackDrc( segm, segm->Next(), true ) )
833  {
834  if( m_currentMarker )
835  {
837  m_currentMarker = nullptr;
838  }
839  }
840  }
841 
842  if( progressDialog )
843  progressDialog->Destroy();
844 }
845 
846 
848 {
849 
850  auto connectivity = m_pcb->GetConnectivity();
851 
852  connectivity->Clear();
853  connectivity->Build( m_pcb ); // just in case. This really needs to be reliable.
854  connectivity->RecalculateRatsnest();
855 
856  std::vector<CN_EDGE> edges;
857  connectivity->GetUnconnectedEdges( edges );
858 
859  for( const auto& edge : edges )
860  {
861  auto src = edge.GetSourcePos();
862  auto dst = edge.GetTargetPos();
863 
864  m_unconnected.emplace_back( new DRC_ITEM( m_pcbEditorFrame->GetUserUnits(),
866  edge.GetSourceNode()->Parent(),
867  wxPoint( src.x, src.y ),
868  edge.GetTargetNode()->Parent(),
869  wxPoint( dst.x, dst.y ) ) );
870 
871  }
872 }
873 
874 
876 {
877  // Test copper areas for valid netcodes
878  // if a netcode is < 0 the netname was not found when reading a netlist
879  // if a netcode is == 0 the netname is void, and the zone is not connected.
880  // This is allowed, but i am not sure this is a good idea
881  //
882  // In recent Pcbnew versions, the netcode is always >= 0, but an internal net name
883  // is stored, and initialized from the file or the zone properties editor.
884  // if it differs from the net name from net code, there is a DRC issue
885  for( int ii = 0; ii < m_pcb->GetAreaCount(); ii++ )
886  {
887  ZONE_CONTAINER* zone = m_pcb->GetArea( ii );
888 
889  if( !zone->IsOnCopperLayer() )
890  continue;
891 
892  int netcode = zone->GetNetCode();
893  // a netcode < 0 or > 0 and no pad in net is a error or strange
894  // perhaps a "dead" net, which happens when all pads in this net were removed
895  // Remark: a netcode < 0 should not happen (this is more a bug somewhere)
896  int pads_in_net = ( netcode > 0 ) ? m_pcb->GetConnectivity()->GetPadCount( netcode ) : 1;
897 
898  if( ( netcode < 0 ) || pads_in_net == 0 )
899  {
900  wxPoint markerPos = zone->GetPosition();
902  }
903  }
904 
905  // Test copper areas outlines, and create markers when needed
906  TestZoneToZoneOutline( NULL, true );
907 }
908 
909 
911 {
912  // Test keepout areas for vias, tracks and pads inside keepout areas
913  for( int ii = 0; ii < m_pcb->GetAreaCount(); ii++ )
914  {
915  ZONE_CONTAINER* area = m_pcb->GetArea( ii );
916 
917  if( !area->GetIsKeepout() )
918  {
919  continue;
920  }
921 
922  for( TRACK* segm = m_pcb->m_Track; segm != NULL; segm = segm->Next() )
923  {
924  if( segm->Type() == PCB_TRACE_T )
925  {
926  if( !area->GetDoNotAllowTracks() )
927  continue;
928 
929  // Ignore if the keepout zone is not on the same layer
930  if( !area->IsOnLayer( segm->GetLayer() ) )
931  continue;
932 
933  SEG trackSeg( segm->GetStart(), segm->GetEnd() );
934 
935  if( area->Outline()->Distance( trackSeg, segm->GetWidth() ) == 0 )
937  }
938  else if( segm->Type() == PCB_VIA_T )
939  {
940  if( ! area->GetDoNotAllowVias() )
941  continue;
942 
943  auto viaLayers = segm->GetLayerSet();
944 
945  if( !area->CommonLayerExists( viaLayers ) )
946  continue;
947 
948  if( area->Outline()->Distance( segm->GetPosition() ) < segm->GetWidth()/2 )
950  }
951  }
952  // Test pads: TODO
953  }
954 }
955 
956 
958 {
959  // Test copper items for clearance violations with vias, tracks and pads
960 
961  for( BOARD_ITEM* brdItem : m_pcb->Drawings() )
962  {
963  if( IsCopperLayer( brdItem->GetLayer() ) )
964  {
965  if( brdItem->Type() == PCB_TEXT_T )
966  testCopperTextItem( brdItem );
967  else if( brdItem->Type() == PCB_LINE_T )
968  testCopperDrawItem( static_cast<DRAWSEGMENT*>( brdItem ));
969  }
970  }
971 
972  for( MODULE* module : m_pcb->Modules() )
973  {
974  if( IsCopperLayer( module->Reference().GetLayer() ) )
975  testCopperTextItem( &module->Reference());
976 
977  if( IsCopperLayer( module->Value().GetLayer() ) )
978  testCopperTextItem( &module->Value());
979 
980  if( module->IsNetTie() )
981  continue;
982 
983  for( BOARD_ITEM* item = module->GraphicalItemsList(); item; item = item->Next() )
984  {
985  if( IsCopperLayer( item->GetLayer() ) )
986  {
987  if( item->Type() == PCB_MODULE_TEXT_T )
988  testCopperTextItem( item );
989  else if( item->Type() == PCB_MODULE_EDGE_T )
990  testCopperDrawItem( static_cast<DRAWSEGMENT*>( item ));
991  }
992  }
993  }
994 }
995 
996 
998 {
999  std::vector<SEG> itemShape;
1000  int itemWidth = aItem->GetWidth();
1001 
1002  switch( aItem->GetShape() )
1003  {
1004  case S_ARC:
1005  {
1006  SHAPE_ARC arc( aItem->GetCenter(), aItem->GetArcStart(), (double) aItem->GetAngle() / 10.0 );
1007 
1008  auto l = arc.ConvertToPolyline();
1009 
1010  for( int i = 0; i < l.SegmentCount(); i++ )
1011  itemShape.push_back( l.CSegment(i) );
1012 
1013  break;
1014  }
1015 
1016  case S_SEGMENT:
1017  itemShape.push_back( SEG( aItem->GetStart(), aItem->GetEnd() ) );
1018  break;
1019 
1020  case S_CIRCLE:
1021  {
1022  // SHAPE_CIRCLE has no ConvertToPolyline() method, so use a 360.0 SHAPE_ARC
1023  SHAPE_ARC circle( aItem->GetCenter(), aItem->GetEnd(), 360.0 );
1024 
1025  auto l = circle.ConvertToPolyline();
1026 
1027  for( int i = 0; i < l.SegmentCount(); i++ )
1028  itemShape.push_back( l.CSegment(i) );
1029 
1030  break;
1031  }
1032 
1033  case S_CURVE:
1034  {
1035  aItem->RebuildBezierToSegmentsPointsList( aItem->GetWidth() );
1036  wxPoint start_pt = aItem->GetBezierPoints()[0];
1037 
1038  for( unsigned int jj = 1; jj < aItem->GetBezierPoints().size(); jj++ )
1039  {
1040  wxPoint end_pt = aItem->GetBezierPoints()[jj];
1041  itemShape.push_back( SEG( start_pt, end_pt ) );
1042  start_pt = end_pt;
1043  }
1044 
1045  break;
1046  }
1047 
1048  default:
1049  break;
1050  }
1051 
1052  // Test tracks and vias
1053  for( TRACK* track = m_pcb->m_Track; track != NULL; track = track->Next() )
1054  {
1055  if( !track->IsOnLayer( aItem->GetLayer() ) )
1056  continue;
1057 
1058  int minDist = ( track->GetWidth() + itemWidth ) / 2 + track->GetClearance( NULL );
1059  SEG trackAsSeg( track->GetStart(), track->GetEnd() );
1060 
1061  for( const auto& itemSeg : itemShape )
1062  {
1063  if( trackAsSeg.Distance( itemSeg ) < minDist )
1064  {
1065  if( track->Type() == PCB_VIA_T )
1066  addMarkerToPcb( newMarker( track, aItem, itemSeg, DRCE_VIA_NEAR_COPPER ) );
1067  else
1068  addMarkerToPcb( newMarker( track, aItem, itemSeg, DRCE_TRACK_NEAR_COPPER ) );
1069  break;
1070  }
1071  }
1072  }
1073 
1074  // Test pads
1075  for( auto pad : m_pcb->GetPads() )
1076  {
1077  if( !pad->IsOnLayer( aItem->GetLayer() ) )
1078  continue;
1079 
1080  const int segmentCount = 18;
1081  double correctionFactor = GetCircletoPolyCorrectionFactor( segmentCount );
1082  SHAPE_POLY_SET padOutline;
1083 
1084  // We incorporate "minDist" into the pad's outline
1085  pad->TransformShapeWithClearanceToPolygon( padOutline, pad->GetClearance( NULL ),
1086  segmentCount, correctionFactor );
1087 
1088  for( const auto& itemSeg : itemShape )
1089  {
1090  if( padOutline.Distance( itemSeg, itemWidth ) == 0 )
1091  {
1092  addMarkerToPcb( newMarker( pad, aItem, DRCE_PAD_NEAR_COPPER ) );
1093  break;
1094  }
1095  }
1096  }
1097 }
1098 
1099 
1101 {
1102  EDA_TEXT* text = dynamic_cast<EDA_TEXT*>( aTextItem );
1103 
1104  if( text == nullptr )
1105  return;
1106 
1107  std::vector<wxPoint> textShape; // a buffer to store the text shape (set of segments)
1108  int textWidth = text->GetThickness();
1109 
1110  // So far the bounding box makes up the text-area
1111  text->TransformTextShapeToSegmentList( textShape );
1112 
1113  if( textShape.size() == 0 ) // Should not happen (empty text?)
1114  return;
1115 
1116  // Test tracks and vias
1117  for( TRACK* track = m_pcb->m_Track; track != NULL; track = track->Next() )
1118  {
1119  if( !track->IsOnLayer( aTextItem->GetLayer() ) )
1120  continue;
1121 
1122  int minDist = ( track->GetWidth() + textWidth ) / 2 + track->GetClearance( NULL );
1123  SEG trackAsSeg( track->GetStart(), track->GetEnd() );
1124 
1125  for( unsigned jj = 0; jj < textShape.size(); jj += 2 )
1126  {
1127  SEG textSeg( textShape[jj], textShape[jj+1] );
1128 
1129  if( trackAsSeg.Distance( textSeg ) < minDist )
1130  {
1131  if( track->Type() == PCB_VIA_T )
1132  addMarkerToPcb( newMarker( track, aTextItem, textSeg, DRCE_VIA_NEAR_COPPER ) );
1133  else
1134  addMarkerToPcb( newMarker( track, aTextItem, textSeg, DRCE_TRACK_NEAR_COPPER ) );
1135  break;
1136  }
1137  }
1138  }
1139 
1140  // Test pads
1141  for( auto pad : m_pcb->GetPads() )
1142  {
1143  if( !pad->IsOnLayer( aTextItem->GetLayer() ) )
1144  continue;
1145 
1146  const int segmentCount = 18;
1147  double correctionFactor = GetCircletoPolyCorrectionFactor( segmentCount );
1148  SHAPE_POLY_SET padOutline;
1149 
1150  // We incorporate "minDist" into the pad's outline
1151  pad->TransformShapeWithClearanceToPolygon( padOutline, pad->GetClearance( NULL ),
1152  segmentCount, correctionFactor );
1153 
1154  for( unsigned jj = 0; jj < textShape.size(); jj += 2 )
1155  {
1156  SEG textSeg( textShape[jj], textShape[jj+1] );
1157 
1158  if( padOutline.Distance( textSeg, textWidth ) == 0 )
1159  {
1160  addMarkerToPcb( newMarker( pad, aTextItem, DRCE_PAD_NEAR_COPPER ) );
1161  break;
1162  }
1163  }
1164  }
1165 }
1166 
1167 
1169 {
1170  BOARD* board = m_pcbEditorFrame->GetBoard();
1171  wxCHECK( board, /*void*/ );
1172  LSET disabledLayers = board->GetEnabledLayers().flip();
1173 
1174  // Perform the test only for copper layers
1175  disabledLayers &= LSET::AllCuMask();
1176 
1177  auto createMarker = [&]( BOARD_ITEM* aItem )
1178  {
1179  addMarkerToPcb( newMarker( aItem->GetPosition(), aItem, DRCE_DISABLED_LAYER_ITEM ) );
1180  };
1181 
1182  for( auto track : board->Tracks() )
1183  {
1184  if( disabledLayers.test( track->GetLayer() ) )
1185  createMarker( track );
1186  }
1187 
1188  for( auto module : board->Modules() )
1189  {
1190  module->RunOnChildren( [&]( BOARD_ITEM* aItem )
1191  {
1192  if( disabledLayers.test( aItem->GetLayer() ) )
1193  createMarker( aItem );
1194  } );
1195  }
1196 
1197  for( auto zone : board->Zones() )
1198  {
1199  if( disabledLayers.test( zone->GetLayer() ) )
1200  createMarker( zone );
1201  }
1202 }
1203 
1204 
1206 {
1207  // Test keepout areas for vias, tracks and pads inside keepout areas
1208  for( int ii = 0; ii < m_pcb->GetAreaCount(); ii++ )
1209  {
1210  ZONE_CONTAINER* area = m_pcb->GetArea( ii );
1211 
1212  if( !area->GetIsKeepout() )
1213  continue;
1214 
1215  if( aRefSeg->Type() == PCB_TRACE_T )
1216  {
1217  if( !area->GetDoNotAllowTracks() )
1218  continue;
1219 
1220  if( !area->IsOnLayer( aRefSeg->GetLayer() ) )
1221  continue;
1222 
1223  if( area->Outline()->Distance( SEG( aRefSeg->GetStart(), aRefSeg->GetEnd() ),
1224  aRefSeg->GetWidth() ) == 0 )
1225  {
1227  return false;
1228  }
1229  }
1230  else if( aRefSeg->Type() == PCB_VIA_T )
1231  {
1232  if( !area->GetDoNotAllowVias() )
1233  continue;
1234 
1235  auto viaLayers = aRefSeg->GetLayerSet();
1236 
1237  if( !area->CommonLayerExists( viaLayers ) )
1238  continue;
1239 
1240  if( area->Outline()->Distance( aRefSeg->GetPosition() ) < aRefSeg->GetWidth()/2 )
1241  {
1243  return false;
1244  }
1245  }
1246  }
1247 
1248  return true;
1249 }
1250 
1251 
1252 bool DRC::doPadToPadsDrc( D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd, int x_limit )
1253 {
1254  const static LSET all_cu = LSET::AllCuMask();
1255 
1256  LSET layerMask = aRefPad->GetLayerSet() & all_cu;
1257 
1258  /* used to test DRC pad to holes: this dummy pad has the size and shape of the hole
1259  * to test pad to pad hole DRC, using the pad to pad DRC test function.
1260  * Therefore, this dummy pad is a circle or an oval.
1261  * A pad must have a parent because some functions expect a non null parent
1262  * to find the parent board, and some other data
1263  */
1264  MODULE dummymodule( m_pcb ); // Creates a dummy parent
1265  D_PAD dummypad( &dummymodule );
1266 
1267  // Ensure the hole is on all copper layers
1268  dummypad.SetLayerSet( all_cu | dummypad.GetLayerSet() );
1269 
1270  // Use the minimal local clearance value for the dummy pad.
1271  // The clearance of the active pad will be used as minimum distance to a hole
1272  // (a value = 0 means use netclass value)
1273  dummypad.SetLocalClearance( 1 );
1274 
1275  for( D_PAD** pad_list = aStart; pad_list<aEnd; ++pad_list )
1276  {
1277  D_PAD* pad = *pad_list;
1278 
1279  if( pad == aRefPad )
1280  continue;
1281 
1282  // We can stop the test when pad->GetPosition().x > x_limit
1283  // because the list is sorted by X values
1284  if( pad->GetPosition().x > x_limit )
1285  break;
1286 
1287  // No problem if pads which are on copper layers are on different copper layers,
1288  // (pads can be only on a technical layer, to build complex pads)
1289  // but their hole (if any ) can create DRC error because they are on all
1290  // copper layers, so we test them
1291  if( ( pad->GetLayerSet() & layerMask ) == 0 &&
1292  ( pad->GetLayerSet() & all_cu ) != 0 &&
1293  ( aRefPad->GetLayerSet() & all_cu ) != 0 )
1294  {
1295  // if holes are in the same location and have the same size and shape,
1296  // this can be accepted
1297  if( pad->GetPosition() == aRefPad->GetPosition()
1298  && pad->GetDrillSize() == aRefPad->GetDrillSize()
1299  && pad->GetDrillShape() == aRefPad->GetDrillShape() )
1300  {
1301  if( aRefPad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )
1302  continue;
1303 
1304  // for oval holes: must also have the same orientation
1305  if( pad->GetOrientation() == aRefPad->GetOrientation() )
1306  continue;
1307  }
1308 
1309  /* Here, we must test clearance between holes and pads
1310  * dummy pad size and shape is adjusted to pad drill size and shape
1311  */
1312  if( pad->GetDrillSize().x )
1313  {
1314  // pad under testing has a hole, test this hole against pad reference
1315  dummypad.SetPosition( pad->GetPosition() );
1316  dummypad.SetSize( pad->GetDrillSize() );
1317  dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
1319  dummypad.SetOrientation( pad->GetOrientation() );
1320 
1321  if( !checkClearancePadToPad( aRefPad, &dummypad ) )
1322  {
1323  // here we have a drc error on pad!
1324  m_currentMarker = newMarker( pad, aRefPad, DRCE_HOLE_NEAR_PAD );
1325  return false;
1326  }
1327  }
1328 
1329  if( aRefPad->GetDrillSize().x ) // pad reference has a hole
1330  {
1331  dummypad.SetPosition( aRefPad->GetPosition() );
1332  dummypad.SetSize( aRefPad->GetDrillSize() );
1333  dummypad.SetShape( aRefPad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
1335  dummypad.SetOrientation( aRefPad->GetOrientation() );
1336 
1337  if( !checkClearancePadToPad( pad, &dummypad ) )
1338  {
1339  // here we have a drc error on aRefPad!
1340  m_currentMarker = newMarker( aRefPad, pad, DRCE_HOLE_NEAR_PAD );
1341  return false;
1342  }
1343  }
1344 
1345  continue;
1346  }
1347 
1348  // The pad must be in a net (i.e pt_pad->GetNet() != 0 ),
1349  // But no problem if pads have the same netcode (same net)
1350  if( pad->GetNetCode() && ( aRefPad->GetNetCode() == pad->GetNetCode() ) )
1351  continue;
1352 
1353  // if pads are from the same footprint
1354  if( pad->GetParent() == aRefPad->GetParent() )
1355  {
1356  // and have the same pad number ( equivalent pads )
1357 
1358  // one can argue that this 2nd test is not necessary, that any
1359  // two pads from a single module are acceptable. This 2nd test
1360  // should eventually be a configuration option.
1361  if( pad->PadNameEqual( aRefPad ) )
1362  continue;
1363  }
1364 
1365  // if either pad has no drill and is only on technical layers, not a clearance violation
1366  if( ( ( pad->GetLayerSet() & layerMask ) == 0 && !pad->GetDrillSize().x ) ||
1367  ( ( aRefPad->GetLayerSet() & layerMask ) == 0 && !aRefPad->GetDrillSize().x ) )
1368  {
1369  continue;
1370  }
1371 
1372  if( !checkClearancePadToPad( aRefPad, pad ) )
1373  {
1374  // here we have a drc error!
1375  m_currentMarker = newMarker( aRefPad, pad, DRCE_PAD_NEAR_PAD1 );
1376  return false;
1377  }
1378  }
1379 
1380  return true;
1381 }
1382 
1383 
1385 {
1386  // Detects missing (or malformed) footprint courtyard,
1387  // and for footprint with courtyard, courtyards overlap.
1388  wxString msg;
1389  bool success = true;
1390 
1391  // Update courtyard polygons, and test for missing courtyard definition:
1392  for( MODULE* footprint = m_pcb->m_Modules; footprint; footprint = footprint->Next() )
1393  {
1394  wxPoint pos = footprint->GetPosition();
1395  bool is_ok = footprint->BuildPolyCourtyard();
1396 
1398  {
1400  success = false;
1401  }
1402 
1404  continue;
1405 
1406  if( footprint->GetPolyCourtyardFront().OutlineCount() == 0 &&
1407  footprint->GetPolyCourtyardBack().OutlineCount() == 0 &&
1408  is_ok )
1409  {
1411  success = false;
1412  }
1413  }
1414 
1416  return success;
1417 
1418  // Now test for overlapping on top layer:
1419  SHAPE_POLY_SET courtyard; // temporary storage of the courtyard of current footprint
1420 
1421  for( MODULE* footprint = m_pcb->m_Modules; footprint; footprint = footprint->Next() )
1422  {
1423  if( footprint->GetPolyCourtyardFront().OutlineCount() == 0 )
1424  continue; // No courtyard defined
1425 
1426  for( MODULE* candidate = footprint->Next(); candidate; candidate = candidate->Next() )
1427  {
1428  if( candidate->GetPolyCourtyardFront().OutlineCount() == 0 )
1429  continue; // No courtyard defined
1430 
1431  courtyard.RemoveAllContours();
1432  courtyard.Append( footprint->GetPolyCourtyardFront() );
1433 
1434  // Build the common area between footprint and the candidate:
1435  courtyard.BooleanIntersection( candidate->GetPolyCourtyardFront(),
1437 
1438  // If no overlap, courtyard is empty (no common area).
1439  // Therefore if a common polygon exists, this is a DRC error
1440  if( courtyard.OutlineCount() )
1441  {
1442  //Overlap between footprint and candidate
1443  VECTOR2I& pos = courtyard.Vertex( 0, 0, -1 );
1444  addMarkerToPcb( newMarker( wxPoint( pos.x, pos.y ), footprint, candidate,
1446  success = false;
1447  }
1448  }
1449  }
1450 
1451  // Test for overlapping on bottom layer:
1452  for( MODULE* footprint = m_pcb->m_Modules; footprint; footprint = footprint->Next() )
1453  {
1454  if( footprint->GetPolyCourtyardBack().OutlineCount() == 0 )
1455  continue; // No courtyard defined
1456 
1457  for( MODULE* candidate = footprint->Next(); candidate; candidate = candidate->Next() )
1458  {
1459  if( candidate->GetPolyCourtyardBack().OutlineCount() == 0 )
1460  continue; // No courtyard defined
1461 
1462  courtyard.RemoveAllContours();
1463  courtyard.Append( footprint->GetPolyCourtyardBack() );
1464 
1465  // Build the common area between footprint and the candidate:
1466  courtyard.BooleanIntersection( candidate->GetPolyCourtyardBack(),
1468 
1469  // If no overlap, courtyard is empty (no common area).
1470  // Therefore if a common polygon exists, this is a DRC error
1471  if( courtyard.OutlineCount() )
1472  {
1473  //Overlap between footprint and candidate
1474  VECTOR2I& pos = courtyard.Vertex( 0, 0, -1 );
1475  addMarkerToPcb( newMarker( wxPoint( pos.x, pos.y ), footprint, candidate,
1477  success = false;
1478  }
1479  }
1480  }
1481 
1482  return success;
1483 }
bool m_refillZones
Definition: drc.h:183
static TOOL_ACTION selectionClear
Clears the current selection.
Definition: pcb_actions.h:53
bool doNetClass(const std::shared_ptr< NETCLASS > &aNetClass, wxString &msg)
Definition: drc.cpp:563
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:673
#define DRCE_DISABLED_LAYER_ITEM
item on a disabled layer
Definition: drc.h:95
KICAD_T Type() const
Function Type()
Definition: base_struct.h:201
bool m_doCreateRptFile
Definition: drc.h:182
Class ZONE_CONTAINER handles a list of polygons defining a copper zone.
Definition: class_zone.h:60
#define OK_DRC
Definition: drc.h:36
void DestroyDRCDialog(int aReason)
Deletes this ui dialog box and zeros out its pointer to remember the state of the dialog&#39;s existence...
Definition: drc.cpp:119
bool PadNameEqual(const D_PAD *other) const
Definition: class_pad.h:207
DIALOG_DRC_CONTROL * m_drcDialog
Definition: drc.h:223
double GetLineLength(const wxPoint &aPointA, const wxPoint &aPointB)
Function GetLineLength returns the length of a line segment defined by aPointA and aPointB...
Definition: trigo.h:191
void UpdateDisplayedCounts()
Definition: dialog_drc.cpp:663
TEXTE_PCB class definition.
bool CommonLayerExists(const LSET aLayerSet) const
Function CommonLayerExist Test if this zone shares a common layer with the given layer set...
Definition: class_zone.cpp:194
Class DRC_ITEM is a holder for a DRC (in Pcbnew) or ERC (in Eeschema) error item. ...
Definition: drc_item.h:48
void testCopperTextAndGraphics()
Definition: drc.cpp:957
static int KiROUND(double v)
Round a floating point number to an integer using "round halfway cases away from zero".
Definition: common.h:120
#define DRCE_PAD_NEAR_PAD1
pad too close to pad
Definition: drc.h:63
int TestZoneToZoneOutline(ZONE_CONTAINER *aZone, bool aCreateMarkers)
Tests whether distance between zones complies with the DRC rules.
Definition: drc.cpp:213
int m_ycliplo
Definition: drc.h:217
Class BOARD_ITEM is a base class for any item which can be embedded within the BOARD container class...
const wxPoint GetCenter() const override
Function GetCenter()
#define DRCE_NETCLASS_TRACKWIDTH
netclass has TrackWidth < board.m_designSettings->m_TrackMinWidth
Definition: drc.h:76
#define DRCE_HOLE_NEAR_PAD
hole too close to pad
Definition: drc.h:69
COMMIT & Add(EDA_ITEM *aItem)
Adds a new item to the model
Definition: commit.h:78
virtual PCB_LAYER_ID GetLayer() const
Function GetLayer returns the primary layer this item is on.
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
virtual bool IsOnLayer(PCB_LAYER_ID) const override
Function IsOnLayer tests to see if this object is on the given layer.
Definition: class_zone.cpp:265
void testKeepoutAreas()
Definition: drc.cpp:910
void GetRptSettings(bool *aEnable, wxString &aFileName)
Definition: dialog_drc.cpp:184
void Check_All_Zones(wxWindow *aActiveWindow)
Function Check_All_Zones Checks for out-of-date fills and fills them if requested by the user...
void RebuildBezierToSegmentsPointsList(int aMinSegLen)
Rebuild the m_BezierPoints vertex list that approximate the Bezier curve by a list of segments Has me...
MODULE * Next() const
Definition: class_module.h:123
void GetSortedPadListByXthenYCoord(std::vector< D_PAD * > &aVector, int aNetCode=-1)
Function GetSortedPadListByXthenYCoord first empties then fills the vector with all pads and sorts th...
MODULE * GetParent() const
Definition: class_pad.h:162
static TOOL_ACTION cancelInteractive
Definition: actions.h:45
int m_ycliphi
Definition: drc.h:219
virtual PCB_LAYER_ID GetLayer() const override
Function GetLayer returns the primary layer this item is on.
Definition: class_zone.cpp:175
bool BuildSmoothedPoly(SHAPE_POLY_SET &aSmoothedPoly) const
Function GetSmoothedPoly returns a pointer to the corner-smoothed version of m_Poly if it exists...
#define DRCE_DRILLED_HOLES_TOO_CLOSE
overlapping drilled holes break drill bits
Definition: drc.h:96
SHAPE_POLY_SET * Outline()
Definition: class_zone.h:242
#define DRCE_VIA_INSIDE_KEEPOUT
Via in inside a keepout area.
Definition: drc.h:82
class TEXTE_PCB, text on a layer
Definition: typeinfo.h:92
void testCopperDrawItem(DRAWSEGMENT *aDrawing)
Definition: drc.cpp:997
bool RunAction(const std::string &aActionName, bool aNow=false, T aParam=NULL)
Function RunAction() Runs the specified action.
Definition: tool_manager.h:125
int m_segmLength
Definition: drc.h:211
BOARD * GetBoard() const
void SetPosition(const wxPoint &aPos) override
Definition: class_pad.h:219
Classes to handle copper zones.
void ListUnconnectedPads()
Gather a list of all the unconnected pads and shows them in the dialog, and optionally prints a repor...
Definition: drc.cpp:537
PAD_DRILL_SHAPE_T GetDrillShape() const
Definition: class_pad.h:388
usual segment : line with rounded ends
iterator end()
Definition: netclass.h:249
#define DRCE_NETCLASS_CLEARANCE
netclass has Clearance < board.m_designSettings->m_TrackClearance
Definition: drc.h:77
int GetClearanceBetweenSegments(int x1i, int y1i, int x1f, int y1f, int w1, int x2i, int y2i, int x2f, int y2f, int w2, int max_cl, int *x, int *y)
int OutlineCount() const
Returns the number of outlines in the set
#define DRCE_ZONES_INTERSECT
copper area outlines intersect
Definition: drc.h:66
const wxSize & GetDrillSize() const
Definition: class_pad.h:275
#define DRCE_VIA_NEAR_COPPER
via and copper graphic collide or are too close
Definition: drc.h:86
#define DRCE_UNCONNECTED_ITEMS
items are unconnected
Definition: drc.h:46
const wxPoint GetPosition() const override
Function GetPosition.
Definition: class_zone.cpp:169
DRCLISTBOX * m_UnconnectedListBox
LSET GetEnabledLayers() const
Function GetEnabledLayers is a proxy function that calls the corresponding function in m_BoardSetting...
void testCopperTextItem(BOARD_ITEM *aTextItem)
Definition: drc.cpp:1100
class EDGE_MODULE, a footprint edge
Definition: typeinfo.h:94
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
static const int delta[8][2]
Definition: solve.cpp:112
void DeactivateTool()
Function DeactivateTool() Deactivates the currently active tool.
const wxPoint & GetEnd() const
Definition: class_track.h:119
int GetClearance(BOARD_CONNECTED_ITEM *aItem=NULL) const override
Function GetClearance returns the clearance in internal units.
Definition: class_zone.cpp:778
#define DRCE_SUSPICIOUS_NET_FOR_ZONE_OUTLINE
copper area has a net but no pads in nets, which is suspicious
Definition: drc.h:68
#define DRCE_MALFORMED_COURTYARD_IN_FOOTPRINT
footprint has a courtyard but malformed
Definition: drc.h:91
#define DRCE_MISSING_COURTYARD_IN_FOOTPRINT
footprint has no courtyard defined
Definition: drc.h:90
Functions relatives to tracks, vias and segments used to fill zones.
int DrcOnCreatingTrack(TRACK *aRefSeg, TRACK *aList)
Function Drc tests the current segment and returns the result and displays the error in the status pa...
Definition: drc.cpp:169
class TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:95
int GetThickness() const
Function GetThickness returns pen width.
Definition: eda_text.h:167
bool doTrackKeepoutDrc(TRACK *aRefSeg)
Test the current segment or via.
Definition: drc.cpp:1205
BOARD * m_pcb
Definition: drc.h:222
const wxPoint & GetArcStart() const
VECTOR2I & Vertex(int aIndex, int aOutline, int aHole)
Returns the index-th vertex in a given hole outline within a given outline
bool GetIsKeepout() const
Accessors to parameters used in Keepout zones:
Definition: class_zone.h:623
Class EDA_TEXT is a mix-in class (via multiple inheritance) that handles texts such as labels...
Definition: eda_text.h:127
void testDrilledHoles()
Definition: drc.cpp:715
BOARD_ITEM * Next() const
Class TOOL_MANAGER.
Definition: tool_manager.h:49
#define DRCE_TRACK_NEAR_COPPER
track & copper graphic collide or are too close
Definition: drc.h:85
#define DRCE_NETCLASS_uVIADRILLSIZE
netclass has ViaSize < board.m_designSettings->m_MicroViasMinDrill
Definition: drc.h:81
#define DRCE_NETCLASS_VIASIZE
netclass has ViaSize < board.m_designSettings->m_ViasMinSize
Definition: drc.h:78
void addMarkerToPcb(MARKER_PCB *aMarker)
Adds a DRC marker to the PCB through the COMMIT mechanism.
Definition: drc.cpp:100
bool m_doKeepoutTest
Definition: drc.h:181
STROKE_T GetShape() const
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
Class LSET is a set of PCB_LAYER_IDs.
bool m_doZonesTest
Definition: drc.h:180
iterator begin()
Definition: netclass.h:248
Class NETCLASSES is a container for NETCLASS instances.
Definition: netclass.h:224
void SetList(EDA_UNITS_T aUnits, DRC_ITEM_LIST *aList)
Function SetList sets the DRC_ITEM_LIST for this listbox.
const wxPoint & GetEnd() const
Function GetEnd returns the ending point of the graphic.
DLIST_ITERATOR_WRAPPER< MODULE > Modules()
Definition: class_board.h:254
VIATYPE_T GetViaType() const
Definition: class_track.h:457
const wxPoint GetPosition() const override
Definition: class_track.h:113
void testZones()
Definition: drc.cpp:875
void SetMsgPanel(const std::vector< MSG_PANEL_ITEM > &aList)
Clear the message panel and populates it with the contents of aList.
int GetBoundingRadius() const
Function GetBoundingRadius returns the radius of a minimum sized circle which fully encloses this pad...
Definition: class_pad.h:612
Class SHAPE_POLY_SET.
DRCLISTBOX * m_ClearanceListBox
Class DRC_LIST_MARKERS is an implementation of the interface named DRC_ITEM_LIST which uses a BOARD i...
EDA_UNITS_T GetUserUnits() const override
Return the user units currently in use.
Definition: draw_frame.h:284
const wxPoint & GetStart() const
Definition: class_track.h:122
int m_TrackMinWidth
track min value for width ((min copper size value
Arcs (with rounded ends)
DRC(PCB_EDIT_FRAME *aPcbWindow)
Definition: drc.cpp:131
int m_ViasMinSize
vias (not micro vias) min diameter
void updatePointers()
Update needed pointers from the one pointer which is known not to change.
Definition: drc.cpp:546
int DrcOnCreatingZone(ZONE_CONTAINER *aArea, int aCornerIndex)
Function Drc tests the outline segment starting at CornerIndex and returns the result and displays th...
Definition: drc.cpp:363
LSET GetLayerSet() const override
Function GetLayerSet returns a "layer mask", which is a bitmap of all layers on which the TRACK segme...
Definition: class_pad.h:402
int m_ViasMinDrill
vias (not micro vias) min drill diameter
virtual LSET GetLayerSet() const
Function GetLayerSet returns a "layer mask", which is a bitmap of all layers on which the TRACK segme...
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Function GetDesignSettings.
Definition: class_board.h:538
void SetSize(const wxSize &aSize)
Definition: class_pad.h:268
MARKER_PCB * newMarker(TRACK *aTrack, BOARD_ITEM *aConflitItem, const SEG &aConflictSeg, int aErrorCode)
Function newMarker Creates a marker on a track, via or pad.
a few functions useful in geometry calculations.
#define DRCE_OVERLAPPING_FOOTPRINTS
footprint courtyards overlap
Definition: drc.h:89
int GetAreaCount() const
Function GetAreaCount.
Definition: class_board.h:1020
bool m_reportAllTrackErrors
Definition: drc.h:184
Bezier Curve.
#define DRCE_NETCLASS_VIADRILLSIZE
netclass has ViaDrillSize < board.m_designSettings->m_ViasMinDrill
Definition: drc.h:79
void testDisabledLayers()
Tests for items placed on disabled layers (causing false connections).
Definition: drc.cpp:1168
bool doPadToPadsDrc(D_PAD *aRefPad, D_PAD **aStart, D_PAD **aEnd, int x_limit)
Test the clearance between aRefPad and other pads.
Definition: drc.cpp:1252
int m_xcliphi
Definition: drc.h:218
int m_MicroViasMinSize
micro vias (not vias) min diameter
PCB_EDIT_FRAME * m_pcbEditorFrame
The pcb frame editor which owns the board.
Definition: drc.h:221
void BooleanIntersection(const SHAPE_POLY_SET &b, POLYGON_MODE aFastMode)
Performs boolean polyset intersection For aFastMode meaning, see function booleanOp ...
const wxPoint GetPosition() const override
Definition: class_track.h:429
bool m_doPad2PadTest
Definition: drc.h:178
void testPad2Pad()
Definition: drc.cpp:671
#define BAD_DRC
Definition: drc.h:37
bool Show(bool show) override
bool doEdgeZoneDrc(ZONE_CONTAINER *aArea, int aCornerIndex)
Test a segment in ZONE_CONTAINER * aArea: Test Edge inside other areas Test Edge too close other area...
Pad object description.
void SetLocalClearance(int aClearance)
Definition: class_pad.h:418
#define FmtVal(x)
friend class DIALOG_DRC_CONTROL
Definition: drc.h:173
bool checkClearancePadToPad(D_PAD *aRefPad, D_PAD *aPad)
int GetNetCode() const
Function GetNetCode.
MARKER_PCB * m_currentMarker
Definition: drc.h:188
class TEXTE_MODULE, text in a footprint
Definition: typeinfo.h:93
Definition: seg.h:36
bool doFootprintOverlappingDrc()
Test for footprint courtyard overlaps.
Definition: drc.cpp:1384
const std::vector< wxPoint > & GetBezierPoints() const
const std::vector< D_PAD * > GetPads()
Function GetPads returns a reference to a list of all the pads.
bool m_RequireCourtyards
require courtyard definitions in footprints
TOOL_MANAGER * GetToolManager() const
Return the tool manager instance, if any.
Definition: draw_frame.h:924
void SetLayerSet(LSET aLayerMask)
Definition: class_pad.h:401
bool IsOnCopperLayer() const
Function IsOnCopperLayer.
Definition: class_zone.cpp:181
bool GetDoNotAllowTracks() const
Definition: class_zone.h:626
ZONE_CONTAINERS & Zones()
Definition: class_board.h:256
bool testNetClasses()
Go through each NETCLASS and verifies that its clearance, via size, track width, and track clearance ...
Definition: drc.cpp:648
void testTracks(wxWindow *aActiveWindow, bool aShowProgressBar)
Perform the DRC on all tracks.
Definition: drc.cpp:788
TRACK * Next() const
Definition: class_track.h:99
void ShowDRCDialog(wxWindow *aParent=NULL)
Open a dialog and prompts the user, then if a test run button is clicked, runs the test(s) and create...
Definition: drc.cpp:61
static const wxChar * GetChars(const wxString &s)
Function GetChars returns a wxChar* to the actual wxChar* data within a wxString, and is helpful for ...
Definition: macros.h:92
double GetAngle() const
ZONE_CONTAINER * GetArea(int index) const
Function GetArea returns the Area (Zone Container) at a given index.
Definition: class_board.h:991
wxString m_rptFilename
Definition: drc.h:186
Class to handle a graphic segment.
bool GetDoNotAllowVias() const
Definition: class_zone.h:625
int GetDrillValue() const
Function GetDrillValue "calculates" the drill value for vias (m-Drill if > 0, or default drill value ...
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:170
DLIST< MODULE > m_Modules
Definition: class_board.h:248
int GetWidth() const
Definition: class_track.h:116
int Distance(VECTOR2I aPoint)
Function DistanceToPolygon computes the minimum distance between aPoint and all the polygons in the s...
void TransformTextShapeToSegmentList(std::vector< wxPoint > &aCornerBuffer) const
Convert the text shape to a list of segment each segment is stored as 2 wxPoints: the starting point ...
Definition: eda_text.cpp:480
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
size_t i
Definition: json11.cpp:597
void RemoveAllContours()
Removes all outlines & holes (clears) the polygon set.
double GetOrientation() const
Function GetOrientation returns the rotation angle of the pad in tenths of degrees, but soon degrees.
Definition: class_pad.h:382
VECTOR2I A
Definition: seg.h:46
#define DRCE_TRACK_INSIDE_KEEPOUT
Track in inside a keepout area.
Definition: drc.h:83
#define DRCE_ZONES_TOO_CLOSE
copper area outlines are too close
Definition: drc.h:67
Class PCB_EDIT_FRAME is the main frame for Pcbnew.
#define DRCE_PAD_NEAR_COPPER
pad and copper graphic collide or are too close
Definition: drc.h:87
int GetClearance(BOARD_CONNECTED_ITEM *aItem=NULL) const override
Function GetClearance returns the clearance in internal units.
Definition: class_pad.cpp:563
int GetWidth() const
virtual void Push(const wxString &aMessage=wxT("A commit"), bool aCreateUndoEntry=true, bool aSetDirtyBit=true) override
Executes the changes.
void SetShape(PAD_SHAPE_T aShape)
Definition: class_pad.h:217
void SetOrientation(double aAngle)
Function SetOrientation sets the rotation angle of the pad.
Definition: class_pad.cpp:418
bool IsCopperLayer(LAYER_NUM aLayerId)
Function IsCopperLayer tests whether a layer is a copper layer.
class VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:96
DLIST_ITERATOR_WRAPPER< TRACK > Tracks()
Definition: class_board.h:253
int Fill_All_Zones(wxWindow *aActiveWindow)
Function Fill_All_Zones Fill all zones on the board The old fillings are removed. ...
bool doTrackDrc(TRACK *aRefSeg, TRACK *aStart, bool doPads=true)
Test the current segment.
DLIST< TRACK > m_Track
Definition: class_board.h:249
Class DRC_LIST_UNCONNECTED is an implementation of the interface named DRC_ITEM_LIST which uses a vec...
Module description (excepted pads)
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
unsigned GetPriority() const
Function GetPriority.
Definition: class_zone.h:107
DRC_LIST m_unconnected
list of unconnected pads, as DRC_ITEMs
Definition: drc.h:225
const wxPoint GetPosition() const override
Definition: class_pad.h:220
EDGE_MODULE class definition.
class DRAWSEGMENT, a segment not on copper layers
Definition: typeinfo.h:91
~DRC()
Definition: drc.cpp:161
void testUnconnected()
Definition: drc.cpp:847
const wxPoint & GetStart() const
Function GetStart returns the starting point of the graphic.
void RunTests(wxTextCtrl *aMessages=NULL)
Run all the tests specified with a previous call to SetSettings()
Definition: drc.cpp:390
bool m_drcInLegacyRoutingMode
in legacy canvas, when creating a track, the drc test must only display the error message...
Definition: drc.h:196
int m_xcliplo
Definition: drc.h:216
#define DRCE_NETCLASS_uVIASIZE
netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize
Definition: drc.h:80
std::shared_ptr< CONNECTIVITY_DATA > GetConnectivity() const
Function GetConnectivity() returns list of missing connections between components/tracks.
Definition: class_board.h:296
#define mod(a, n)
Definition: greymap.cpp:24
bool m_doUnconnectedTest
Definition: drc.h:179
double m_segmAngle
Definition: drc.h:210
DLIST_ITERATOR_WRAPPER< BOARD_ITEM > Drawings()
Definition: class_board.h:255
void SetRptSettings(bool aEnable, const wxString &aFileName)
Enable/disable the report file creation.
Definition: dialog_drc.cpp:177
Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.
const SHAPE_LINE_CHAIN ConvertToPolyline(double aAccuracy=500.0) const
Constructs a SHAPE_LINE_CHAIN of segments from a given arc.
Definition: shape_arc.cpp:208
int Append(int x, int y, int aOutline=-1, int aHole=-1, bool aAllowDuplication=false)
Appends a vertex at the end of the given outline/hole (default: the last outline) ...
VECTOR2I B
Definition: seg.h:47
double GetCircletoPolyCorrectionFactor(int aSegCountforCircle)