KiCad PCB EDA Suite
class_board_design_settings.h
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24 
25 #ifndef BOARD_DESIGN_SETTINGS_H_
26 #define BOARD_DESIGN_SETTINGS_H_
27 
28 #include <pcbstruct.h> // NB_COLORS
29 #include <class_pad.h>
30 #include <class_track.h>
31 #include <class_netclass.h>
32 #include <config_params.h>
33 
34 // Some default values for the board editor and the fp editor (given in mm)
35 #define DEFAULT_TEXT_MODULE_SIZE 1.0
36 #define DEFAULT_GR_MODULE_THICKNESS 0.15 // given in mm
37 
38 // Board thickness, mainly for 3D view:
39 #define DEFAULT_BOARD_THICKNESS_MM 1.6
40 
41 // Default values for some board items (given in mm)
42 #define DEFAULT_TEXT_PCB_SIZE 1.5
43 #define DEFAULT_TEXT_PCB_THICKNESS 0.3
44 #define DEFAULT_PCB_EDGE_THICKNESS 0.15
45 #define DEFAULT_GRAPHIC_THICKNESS 0.2
46 
47 #define DEFAULT_SOLDERMASK_CLEARANCE 0.2
48 #define DEFAULT_SOLDERMASK_MIN_WIDTH Millimeter2iu( 0.0 )
49 
50 #define DEFAULT_CUSTOMTRACKWIDTH 0.2
51 #define DEFAULT_TRACKMINWIDTH 0.2 // track width min value
52 #define DEFAULT_VIASMINSIZE 0.4 // vias (not micro vias) min diameter
53 #define DEFAULT_VIASMINDRILL 0.3 // vias (not micro vias) min drill diameter
54 #define DEFAULT_MICROVIASMINSIZE 0.2 // micro vias (not vias) min diameter
55 #define DEFAULT_MICROVIASMINDRILL 0.1 // micro vias (not vias) min drill diameter
56 
63 {
64  int m_Diameter; // <= 0 means use Netclass via diameter
65  int m_Drill; // <= 0 means use Netclass via drill
66 
68  {
69  m_Diameter = 0;
70  m_Drill = 0;
71  }
72 
73  VIA_DIMENSION( int aDiameter, int aDrill )
74  {
75  m_Diameter = aDiameter;
76  m_Drill = aDrill;
77  }
78 
79  bool operator==( const VIA_DIMENSION& aOther ) const
80  {
81  return ( m_Diameter == aOther.m_Diameter ) && ( m_Drill == aOther.m_Drill );
82  }
83 
84  bool operator<( const VIA_DIMENSION& aOther ) const
85  {
86  if( m_Diameter != aOther.m_Diameter )
87  return m_Diameter < aOther.m_Diameter;
88 
89  return m_Drill < aOther.m_Drill;
90  }
91 };
92 
93 
99 {
100 public:
101  // The first value is the current netclass via size
103  std::vector<VIA_DIMENSION> m_ViasDimensionsList;
104 
105  // The first value is the current netclass track width
107  std::vector<int> m_TrackWidthList;
108 
111 
115 
121  wxSize m_PcbTextSize;
127 
128  // Global mask margins:
131  // 2 areas near than m_SolderMaskMinWidth
132  // are merged
135 
137  // Variables used in footprint edition (default value in item/footprint creation)
139  // Note: the default layer is the active layer
142 
143  wxString m_RefDefaultText;
144  // if empty, use footprint name as default
147  // should be a PCB_LAYER_ID, but use an int
148  // to save this param in config
149 
151  // if empty, use footprint name as default
154  // should be a PCB_LAYER_ID, but use an int
155  // to save this param in config
156 
157  // Miscellaneous
160 
162  // when importing values or create a new pad
163 
164 private:
167  unsigned m_viaSizeIndex;
168 
169  // Index for m_TrackWidthList to select the value.
172 
175 
178 
181 
183 
186 
189 
193 
194 public:
196 
201  inline NETCLASSPTR GetDefault() const
202  {
203  return m_NetClasses.GetDefault();
204  }
205 
210  inline const wxString& GetCurrentNetClassName() const
211  {
212  return m_currentNetClassName;
213  }
214 
219  inline bool UseNetClassTrack() const
220  {
221  return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
222  }
223 
228  inline bool UseNetClassVia() const
229  {
230  return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
231  }
232 
241  bool SetCurrentNetClass( const wxString& aNetClassName );
242 
248 
254 
261 
268 
273  inline unsigned GetTrackWidthIndex() const { return m_trackWidthIndex; }
274 
281  void SetTrackWidthIndex( unsigned aIndex );
282 
289  inline int GetCurrentTrackWidth() const
290  {
291  return m_useCustomTrackVia ? m_customTrackWidth : m_TrackWidthList[m_trackWidthIndex];
292  }
293 
301  inline void SetCustomTrackWidth( int aWidth )
302  {
303  m_customTrackWidth = aWidth;
304  }
305 
310  inline int GetCustomTrackWidth() const
311  {
312  return m_customTrackWidth;
313  }
314 
319  inline unsigned GetViaSizeIndex() const
320  {
321  return m_viaSizeIndex;
322  }
323 
330  void SetViaSizeIndex( unsigned aIndex );
331 
338  inline int GetCurrentViaSize() const
339  {
340  if( m_useCustomTrackVia )
341  return m_customViaSize.m_Diameter;
342  else
343  return m_ViasDimensionsList[m_viaSizeIndex].m_Diameter;
344  }
345 
353  inline void SetCustomViaSize( int aSize )
354  {
355  m_customViaSize.m_Diameter = aSize;
356  }
357 
362  inline int GetCustomViaSize() const
363  {
364  return m_customViaSize.m_Diameter;
365  }
366 
373  int GetCurrentViaDrill() const;
374 
382  inline void SetCustomViaDrill( int aDrill )
383  {
384  m_customViaSize.m_Drill = aDrill;
385  }
386 
391  inline int GetCustomViaDrill() const
392  {
393  return m_customViaSize.m_Drill;
394  }
395 
403  inline void UseCustomTrackViaSize( bool aEnabled )
404  {
405  m_useCustomTrackVia = aEnabled;
406  }
407 
412  inline bool UseCustomTrackViaSize() const
413  {
414  return m_useCustomTrackVia;
415  }
416 
422  inline LSET GetVisibleLayers() const
423  {
424  return m_visibleLayers;
425  }
426 
432  void SetVisibleAlls();
433 
439  inline void SetVisibleLayers( LSET aMask )
440  {
441  m_visibleLayers = aMask & m_enabledLayers;
442  }
443 
450  inline bool IsLayerVisible( PCB_LAYER_ID aLayerId ) const
451  {
452  // If a layer is disabled, it is automatically invisible
453  return (m_visibleLayers & m_enabledLayers)[aLayerId];
454  }
455 
462  void SetLayerVisibility( PCB_LAYER_ID aLayerId, bool aNewState );
463 
469  inline int GetVisibleElements() const
470  {
471  return m_visibleElements;
472  }
473 
479  inline void SetVisibleElements( int aMask )
480  {
481  m_visibleElements = aMask;
482  }
483 
492  inline bool IsElementVisible( GAL_LAYER_ID aElementCategory ) const
493  {
494  return ( m_visibleElements & ( 1 << GAL_LAYER_INDEX( aElementCategory ) ) );
495  }
496 
504  void SetElementVisibility( GAL_LAYER_ID aElementCategory, bool aNewState );
505 
511  inline LSET GetEnabledLayers() const
512  {
513  return m_enabledLayers;
514  }
515 
521  void SetEnabledLayers( LSET aMask );
522 
529  inline bool IsLayerEnabled( PCB_LAYER_ID aLayerId ) const
530  {
531  return m_enabledLayers[aLayerId];
532  }
533 
538  inline int GetCopperLayerCount() const
539  {
540  return m_copperLayerCount;
541  }
542 
548  void SetCopperLayerCount( int aNewLayerCount );
549 
556  void AppendConfigs( PARAM_CFG_ARRAY* aResult );
557 
558  inline int GetBoardThickness() const { return m_boardThickness; }
559  inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
560 
561 private:
562  void formatNetClass( NETCLASS* aNetClass, OUTPUTFORMATTER* aFormatter, int aNestLevel,
563  int aControlBits ) const throw( IO_ERROR );
564 };
565 
566 #endif // BOARD_DESIGN_SETTINGS_H_
int GetCurrentMicroViaSize()
Function GetCurrentMicroViaSize.
unsigned m_trackWidthIndex
0 is the index selection of the default value Netclass
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
VIA_DIMENSION m_customViaSize
Custom via size (used after UseCustomTrackViaSize( true ) was called).
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void SetEnabledLayers(LSET aMask)
Function SetEnabledLayers changes the bit-mask of enabled layers.
A list of parameters type.
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
VIATYPE_T m_CurrentViaType
via type (VIA_BLIND_BURIED, VIA_THROUGH VIA_MICROVIA)
int GetCurrentViaDrill() const
Function GetCurrentViaDrill.
int GetVisibleElements() const
Function GetVisibleElements returns a bit-mask of all the element categories that are visible...
wxString m_currentNetClassName
Current net class name used to display netclass info.
bool operator<(const VIA_DIMENSION &aOther) const
NETCLASSPTR GetDefault() const
Function GetDefault.
wxPoint m_GridOrigin
origin for grid offsets
int m_SolderPasteMargin
Solder paste margin absolute value.
int m_ModuleTextWidth
Default footprint texts thickness.
std::vector< int > m_TrackWidthList
Track width list.
int m_ModuleSegmentWidth
Default width for all graphic lines.
int GetSmallestClearanceValue()
Function GetSmallestClearanceValue.
int GetBiggestClearanceValue()
Function GetBiggestClearanceValue.
int GetCurrentMicroViaDrill()
Function GetCurrentMicroViaDrill.
int m_PcbTextWidth
current Pcb (not module) Text width
void SetCustomViaDrill(int aDrill)
Function SetCustomViaDrill Sets custom size for via drill (i.e.
void SetLayerVisibility(PCB_LAYER_ID aLayerId, bool aNewState)
Function SetLayerVisibility changes the visibility of a given layer.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
bool m_useCustomTrackVia
Use custom values for track/via sizes (not specified in net class nor in the size lists)...
GAL_LAYER_ID
GAL layers are "virtual" layers, i.e.
bool operator==(const VIA_DIMENSION &aOther) const
The common library.
Class OUTPUTFORMATTER is an important interface (abstract class) used to output 8 bit text in a conve...
Definition: richio.h:327
int m_ValueDefaultlayer
Default value text layer on fp creation.
void SetVisibleAlls()
Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers...
bool IsLayerVisible(PCB_LAYER_ID aLayerId) const
Function IsLayerVisible tests whether a given layer is visible.
wxSize m_ModuleTextSize
Default footprint texts size.
VIATYPE_T
Definition: class_track.h:49
void SetBoardThickness(int aThickness)
int GetCurrentViaSize() const
Function GetCurrentViaSize.
bool m_UseConnectedTrackWidth
if true, when creating a new track starting on an existing track, use this track width ...
void SetCustomViaSize(int aSize)
Function SetCustomViaSize Sets custom size for via diameter (i.e.
Functions relatives to tracks, vias and segments used to fill zones.
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
void formatNetClass(NETCLASS *aNetClass, OUTPUTFORMATTER *aFormatter, int aNestLevel, int aControlBits) const
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
PCB_LAYER_ID
A quick note on layer IDs:
Class LSET is a set of PCB_LAYER_IDs.
int GetCopperLayerCount() const
Function GetCopperLayerCount.
Class NETCLASSES is a container for NETCLASS instances.
const wxString & GetCurrentNetClassName() const
Function GetCurrentNetClassName.
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int GetCustomViaSize() const
Function GetCustomViaSize.
wxSize m_PcbTextSize
current Pcb (not module) Text size
int m_TrackMinWidth
track min value for width ((min copper size value
bool UseNetClassTrack() const
Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track ...
int m_ViasMinSize
vias (not micro vias) min diameter
Classes and definitions used in Pcbnew.
Class NETCLASS handles a collection of nets and the parameters used to route or test these nets...
int m_DrawSegmentWidth
current graphic line width (not EDGE layer)
int m_ViasMinDrill
vias (not micro vias) min drill diameter
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
int GetCustomViaDrill() const
Function GetCustomViaDrill.
wxString m_ValueDefaultText
Default value text on fp creation.
int m_MicroViasMinSize
micro vias (not vias) min diameter
bool IsElementVisible(GAL_LAYER_ID aElementCategory) const
Function IsElementVisible tests whether a given element category is visible.
int GetCustomTrackWidth() const
Function GetCustomTrackWidth.
void SetCustomTrackWidth(int aWidth)
Function SetCustomTrackWidth Sets custom width for track (i.e.
Pad object description.
LSET m_visibleLayers
Bit-mask for layer visibility.
int m_visibleElements
Bit-mask for element category visibility.
bool SetCurrentNetClass(const wxString &aNetClassName)
Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter ...
unsigned m_viaSizeIndex
Index for m_ViasDimensionsList to select the current via size.
NETCLASSPTR GetDefault() const
Function GetDefault.
bool UseNetClassVia() const
Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size...
D_PAD m_Pad_Master
A dummy pad to store all default parameters.
void SetVisibleElements(int aMask)
Function SetVisibleElements changes the bit-mask of visible element categories.
int m_RefDefaultlayer
Default ref text layer on fp creation.
void SetElementVisibility(GAL_LAYER_ID aElementCategory, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
std::vector< VIA_DIMENSION > m_ViasDimensionsList
Vias size and drill list.
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
VIA_DIMENSION(int aDiameter, int aDrill)
void AppendConfigs(PARAM_CFG_ARRAY *aResult)
Function AppendConfigs appends to aResult the configuration setting accessors which will later allow ...
int m_copperLayerCount
Number of copper layers for this design.
bool m_MicroViasAllowed
true to allow micro vias
LSET GetEnabledLayers() const
Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.
bool UseCustomTrackViaSize() const
Function UseCustomTrackViaSize.
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
int m_EdgeSegmentWidth
current graphic line width (EDGE layer only)
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values...
int GetCurrentTrackWidth() const
Function GetCurrentTrackWidth.
LSET GetVisibleLayers() const
Function GetVisibleLayers returns a bit-mask of all the layers that are visible.
Struct IO_ERROR is a class used to hold an error message and may be used when throwing exceptions con...
Definition: ki_exception.h:47
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
wxPoint m_AuxOrigin
origin for plot exports
int m_boardThickness
Board thickness for 3D viewer.
void UseCustomTrackViaSize(bool aEnabled)
Function UseCustomTrackViaSize Enables/disables custom track/via size settings.
NETCLASSES m_NetClasses
List of current netclasses. There is always the default netclass.
int m_SolderMaskMinWidth
Solder mask min width.
int m_customTrackWidth
Custom track width (used after UseCustomTrackViaSize( true ) was called).
Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.