KiCad PCB EDA Suite
class_board.cpp
Go to the documentation of this file.
1 
6 /*
7  * This program source code file is part of KiCad, a free EDA CAD application.
8  *
9  * Copyright (C) 2017 Jean-Pierre Charras, jp.charras at wanadoo.fr
10  * Copyright (C) 2012 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
11  * Copyright (C) 2011 Wayne Stambaugh <stambaughw@verizon.net>
12  *
13  * Copyright (C) 1992-2016 KiCad Developers, see AUTHORS.txt for contributors.
14  *
15  * This program is free software; you can redistribute it and/or
16  * modify it under the terms of the GNU General Public License
17  * as published by the Free Software Foundation; either version 2
18  * of the License, or (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, you may find one here:
27  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
28  * or you may search the http://www.gnu.org website for the version 2 license,
29  * or you may write to the Free Software Foundation, Inc.,
30  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
31  */
32 
33 #include <limits.h>
34 #include <algorithm>
35 #include <iterator>
36 
37 #include <fctsys.h>
38 #include <common.h>
39 #include <kicad_string.h>
40 #include <wxBasePcbFrame.h>
41 #include <msgpanel.h>
42 #include <pcb_netlist.h>
43 #include <reporter.h>
44 #include <base_units.h>
45 #include <ratsnest_data.h>
46 #include <ratsnest_viewitem.h>
47 #include <worksheet_viewitem.h>
48 
49 #include <pcbnew.h>
50 #include <collectors.h>
51 
52 #include <class_board.h>
53 #include <class_module.h>
54 #include <class_track.h>
55 #include <class_zone.h>
56 #include <class_marker_pcb.h>
57 #include <class_drawsegment.h>
58 #include <class_pcb_text.h>
59 #include <class_mire.h>
60 #include <class_dimension.h>
61 #include <connectivity.h>
62 
63 
64 /* This is an odd place for this, but CvPcb won't link if it is
65  * in class_board_item.cpp like I first tried it.
66  */
68 
69 // this is a dummy colors settings (defined colors are the vdefulat values)
70 // used to initialize the board.
71 // these settings will be overriden later, depending on the draw frame that displays the board.
72 // However, when a board is created by a python script, outside a frame, the colors must be set
73 // so dummyColorsSettings provide this default initialization
75 
78  m_paper( PAGE_INFO::A4 ), m_NetInfo( this )
79 {
80  // we have not loaded a board yet, assume latest until then.
81  m_fileFormatVersionAtLoad = LEGACY_BOARD_FILE_VERSION;
82 
84  m_Status_Pcb = 0; // Status word: bit 1 = calculate.
85  m_CurrentZoneContour = NULL; // This ZONE_CONTAINER handle the
86  // zone contour currently in progress
87 
88  BuildListOfNets(); // prepare pad and netlist containers.
89 
90  for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
91  {
92  m_Layer[layer].m_name = GetStandardLayerName( ToLAYER_ID( layer ) );
93 
94  if( IsCopperLayer( layer ) )
95  m_Layer[layer].m_type = LT_SIGNAL;
96  else
97  m_Layer[layer].m_type = LT_UNDEFINED;
98  }
99 
100  // Initialize default netclass.
101  NETCLASSPTR defaultClass = m_designSettings.GetDefault();
102  defaultClass->SetDescription( _( "This is the default net class." ) );
103  m_designSettings.SetCurrentNetClass( defaultClass->GetName() );
104 
105  // Set sensible initial values for custom track width & via size
110 
111  // Initialize ratsnest
112  m_connectivity.reset( new CONNECTIVITY_DATA() );
113 }
114 
115 
117 {
118  while( m_ZoneDescriptorList.size() )
119  {
120  ZONE_CONTAINER* area_to_remove = m_ZoneDescriptorList[0];
121  Delete( area_to_remove );
122  }
123 
124  DeleteMARKERs();
126 
127  delete m_CurrentZoneContour;
128  m_CurrentZoneContour = NULL;
129 }
130 
131 
133 {
134  GetConnectivity()->Build( this );
135 }
136 
137 
139 {
140  wxLogWarning( wxT( "This should not be called on the BOARD object") );
141 
142  return ZeroOffset;
143 }
144 
145 void BOARD::SetPosition( const wxPoint& aPos )
146 {
147  wxLogWarning( wxT( "This should not be called on the BOARD object") );
148 }
149 
150 
151 void BOARD::Move( const wxPoint& aMoveVector ) // overload
152 {
153  // @todo : anything like this elsewhere? maybe put into GENERAL_COLLECTOR class.
154  static const KICAD_T top_level_board_stuff[] = {
155  PCB_MARKER_T,
156  PCB_TEXT_T,
157  PCB_LINE_T,
159  PCB_TARGET_T,
160  PCB_VIA_T,
161  PCB_TRACE_T,
162  // PCB_PAD_T, Can't be at board level
163  // PCB_MODULE_TEXT_T, Can't be at board level
164  PCB_MODULE_T,
166  EOT
167  };
168 
169  INSPECTOR_FUNC inspector = [&] ( EDA_ITEM* item, void* testData )
170  {
171  BOARD_ITEM* brd_item = (BOARD_ITEM*) item;
172 
173  // aMoveVector was snapshotted, don't need "data".
174  brd_item->Move( aMoveVector );
175 
176  return SEARCH_CONTINUE;
177  };
178 
179  Visit( inspector, NULL, top_level_board_stuff );
180 }
181 
182 
183 TRACKS BOARD::TracksInNet( int aNetCode )
184 {
185  TRACKS ret;
186 
187  INSPECTOR_FUNC inspector = [aNetCode,&ret] ( EDA_ITEM* item, void* testData )
188  {
189  TRACK* t = (TRACK*) item;
190 
191  if( t->GetNetCode() == aNetCode )
192  ret.push_back( t );
193 
194  return SEARCH_CONTINUE;
195  };
196 
197  // visit this BOARD's TRACKs and VIAs with above TRACK INSPECTOR which
198  // appends all in aNetCode to ret.
199  Visit( inspector, NULL, GENERAL_COLLECTOR::Tracks );
200 
201  return ret;
202 }
203 
204 
209 static void removeTrack( TRACKS* aList, TRACK* aOneToRemove )
210 {
211  aList->erase( std::remove( aList->begin(), aList->end(), aOneToRemove ), aList->end() );
212 }
213 
214 
215 static void otherEnd( const TRACK& aTrack, const wxPoint& aNotThisEnd, wxPoint* aOtherEnd )
216 {
217  if( aTrack.GetStart() == aNotThisEnd )
218  {
219  *aOtherEnd = aTrack.GetEnd();
220  }
221  else
222  {
223  wxASSERT( aTrack.GetEnd() == aNotThisEnd );
224  *aOtherEnd = aTrack.GetStart();
225  }
226 }
227 
228 
233 static int find_vias_and_tracks_at( TRACKS& at_next, TRACKS& in_net, LSET& lset, const wxPoint& next )
234 {
235  // first find all vias (in this net) at 'next' location, and expand LSET with each
236  for( TRACKS::iterator it = in_net.begin(); it != in_net.end(); )
237  {
238  TRACK* t = *it;
239 
240  if( t->Type() == PCB_VIA_T && (t->GetLayerSet() & lset).any() &&
241  ( t->GetStart() == next || t->GetEnd() == next ) )
242  {
243  lset |= t->GetLayerSet();
244  at_next.push_back( t );
245  it = in_net.erase( it );
246  }
247  else
248  ++it;
249  }
250 
251  int track_count = 0;
252 
253  // with expanded lset, find all tracks with an end on any of the layers in lset
254  for( TRACKS::iterator it = in_net.begin(); it != in_net.end(); /* iterates in the loop body */ )
255  {
256  TRACK* t = *it;
257 
258  if( ( t->GetLayerSet() & lset ).any() && ( t->GetStart() == next || t->GetEnd() == next ) )
259  {
260  at_next.push_back( t );
261  it = in_net.erase( it );
262  ++track_count;
263  }
264  else
265  {
266  ++it;
267  }
268  }
269 
270  return track_count;
271 }
272 
273 
285 static void checkConnectedTo( BOARD* aBoard, TRACKS* aList, const TRACKS& aTracksInNet,
286  const wxPoint& aGoal, const wxPoint& aStart, TRACK* aFirstTrack )
287 {
288  TRACKS in_net = aTracksInNet; // copy source list so the copy can be modified
289  wxPoint next;
290 
291  otherEnd( *aFirstTrack, aStart, &next );
292 
293  aList->push_back( aFirstTrack );
294  removeTrack( &in_net, aFirstTrack );
295 
296  LSET lset( aFirstTrack->GetLayer() );
297 
298  while( in_net.size() )
299  {
300  if( next == aGoal )
301  return; // success
302 
303  // Want an exact match on the position of next, i.e. pad at next,
304  // not a forgiving HitTest() with tolerance type of match, otherwise the overall
305  // algorithm will not work. GetPadFast() is an exact match as I write this.
306  if( aBoard->GetPadFast( next, lset ) )
307  {
308  std::string m = StrPrintf(
309  "intervening pad at:(xy %s) between start:(xy %s) and goal:(xy %s)",
310  BOARD_ITEM::FormatInternalUnits( next ).c_str(),
311  BOARD_ITEM::FormatInternalUnits( aStart ).c_str(),
312  BOARD_ITEM::FormatInternalUnits( aGoal ).c_str()
313  );
314  THROW_IO_ERROR( m );
315  }
316 
317  int track_count = find_vias_and_tracks_at( *aList, in_net, lset, next );
318 
319  if( track_count != 1 )
320  {
321  std::string m = StrPrintf(
322  "found %d tracks intersecting at (xy %s), exactly 2 would be acceptable.",
323  track_count + aList->size() == 1 ? 1 : 0,
324  BOARD_ITEM::FormatInternalUnits( next ).c_str()
325  );
326  THROW_IO_ERROR( m );
327  }
328 
329  // reduce lset down to the layer that the last track at 'next' is on.
330  lset = aList->back()->GetLayerSet();
331 
332  otherEnd( *aList->back(), next, &next );
333  }
334 
335  std::string m = StrPrintf(
336  "not enough tracks connecting start:(xy %s) and goal:(xy %s).",
337  BOARD_ITEM::FormatInternalUnits( aStart ).c_str(),
338  BOARD_ITEM::FormatInternalUnits( aGoal ).c_str()
339  );
340  THROW_IO_ERROR( m );
341 }
342 
343 
344 TRACKS BOARD::TracksInNetBetweenPoints( const wxPoint& aStartPos, const wxPoint& aGoalPos, int aNetCode )
345 {
346  TRACKS in_between_pts;
347  TRACKS on_start_point;
348  TRACKS in_net = TracksInNet( aNetCode ); // a small subset of TRACKs and VIAs
349 
350  for( auto t : in_net )
351  {
352  if( t->Type() == PCB_TRACE_T && ( t->GetStart() == aStartPos || t->GetEnd() == aStartPos ) )
353  on_start_point.push_back( t );
354  }
355 
356  wxString per_path_problem_text;
357 
358  for( auto t : on_start_point ) // explore each trace (path) leaving aStartPos
359  {
360  // checkConnectedTo() fills in_between_pts on every attempt. For failures
361  // this set needs to be cleared.
362  in_between_pts.clear();
363 
364  try
365  {
366  checkConnectedTo( this, &in_between_pts, in_net, aGoalPos, aStartPos, t );
367  }
368  catch( const IO_ERROR& ioe ) // means not connected
369  {
370  per_path_problem_text += "\n\t";
371  per_path_problem_text += ioe.Problem();
372  continue; // keep trying, there may be other paths leaving from aStartPos
373  }
374 
375  // success, no exception means a valid connection,
376  // return this set of TRACKS without throwing.
377  return in_between_pts;
378  }
379 
380  wxString m = wxString::Format(
381  "no clean path connecting start:(xy %s) with goal:(xy %s)",
382  BOARD_ITEM::FormatInternalUnits( aStartPos ).c_str(),
383  BOARD_ITEM::FormatInternalUnits( aGoalPos ).c_str()
384  );
385 
386  THROW_IO_ERROR( m + per_path_problem_text );
387 }
388 
389 
390 void BOARD::chainMarkedSegments( wxPoint aPosition, const LSET& aLayerSet, TRACKS* aList )
391 {
392  LSET layer_set = aLayerSet;
393 
394  if( !m_Track ) // no tracks at all in board
395  return;
396 
397  /* Set the BUSY flag of all connected segments, first search starting at
398  * aPosition. The search ends when a pad is found (end of a track), a
399  * segment end has more than one other segment end connected, or when no
400  * connected item found.
401  *
402  * Vias are a special case because they must look for segments connected
403  * on other layers and they change the layer mask. They can be a track
404  * end or not. They will be analyzer later and vias on terminal points
405  * of the track will be considered as part of this track if they do not
406  * connect segments of another track together and will be considered as
407  * part of an other track when removing the via, the segments of that other
408  * track are disconnected.
409  */
410  for( ; ; )
411  {
412 
413 
414  if( GetPad( aPosition, layer_set ) != NULL )
415  return;
416 
417  /* Test for a via: a via changes the layer mask and can connect a lot
418  * of segments at location aPosition. When found, the via is just
419  * pushed in list. Vias will be examined later, when all connected
420  * segment are found and push in list. This is because when a via
421  * is found we do not know at this time the number of connected items
422  * and we do not know if this via is on the track or finish the track
423  */
424  TRACK* via = m_Track->GetVia( NULL, aPosition, layer_set );
425 
426  if( via )
427  {
428  layer_set = via->GetLayerSet();
429 
430  aList->push_back( via );
431  }
432 
433  int seg_count = 0;
434  TRACK* candidate = NULL;
435 
436  /* Search all segments connected to point aPosition.
437  * if only 1 segment at aPosition: then this segment is "candidate"
438  * if > 1 segment:
439  * then end of "track" (because more than 2 segments are connected at aPosition)
440  */
441  TRACK* segment = m_Track;
442 
443  while( ( segment = ::GetTrack( segment, NULL, aPosition, layer_set ) ) != NULL )
444  {
445  if( segment->GetState( BUSY ) ) // already found and selected: skip it
446  {
447  segment = segment->Next();
448  continue;
449  }
450 
451  if( segment == via ) // just previously found: skip it
452  {
453  segment = segment->Next();
454  continue;
455  }
456 
457  if( ++seg_count == 1 ) // if first connected item: then segment is candidate
458  {
459  candidate = segment;
460  segment = segment->Next();
461  }
462  else // More than 1 segment connected -> location is end of track
463  {
464  return;
465  }
466  }
467 
468  if( candidate ) // A candidate is found: flag it and push it in list
469  {
470  /* Initialize parameters to search items connected to this
471  * candidate:
472  * we must analyze connections to its other end
473  */
474  if( aPosition == candidate->GetStart() )
475  {
476  aPosition = candidate->GetEnd();
477  }
478  else
479  {
480  aPosition = candidate->GetStart();
481  }
482 
483  layer_set = candidate->GetLayerSet();
484 
485  // flag this item and push it in list of selected items
486  aList->push_back( candidate );
487  candidate->SetState( BUSY, true );
488  }
489  else
490  {
491  return;
492  }
493  }
494 }
495 
496 
498 {
500 }
501 
502 
504 {
507 }
508 
509 
510 bool BOARD::SetLayerDescr( PCB_LAYER_ID aIndex, const LAYER& aLayer )
511 {
512  if( unsigned( aIndex ) < DIM( m_Layer ) )
513  {
514  m_Layer[ aIndex ] = aLayer;
515  return true;
516  }
517 
518  return false;
519 }
520 
521 #include <stdio.h>
522 
523 const PCB_LAYER_ID BOARD::GetLayerID( const wxString& aLayerName ) const
524 {
525 
526  // Look for the BOARD specific copper layer names
527  for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
528  {
529  if ( IsCopperLayer( layer ) && ( m_Layer[ layer ].m_name == aLayerName ) )
530  {
531  return ToLAYER_ID( layer );
532  }
533  }
534 
535  // Otherwise fall back to the system standard layer names
536  for( LAYER_NUM layer = 0; layer < PCB_LAYER_ID_COUNT; ++layer )
537  {
538  if( GetStandardLayerName( ToLAYER_ID( layer ) ) == aLayerName )
539  {
540  return ToLAYER_ID( layer );
541  }
542  }
543 
544  return UNDEFINED_LAYER;
545 }
546 
547 const wxString BOARD::GetLayerName( PCB_LAYER_ID aLayer ) const
548 {
549  // All layer names are stored in the BOARD.
550  if( IsLayerEnabled( aLayer ) )
551  {
552  // Standard names were set in BOARD::BOARD() but they may be
553  // over-ridden by BOARD::SetLayerName().
554  // For copper layers, return the actual copper layer name,
555  // otherwise return the Standard English layer name.
556  if( IsCopperLayer( aLayer ) )
557  return m_Layer[aLayer].m_name;
558  }
559 
560  return GetStandardLayerName( aLayer );
561 }
562 
563 bool BOARD::SetLayerName( PCB_LAYER_ID aLayer, const wxString& aLayerName )
564 {
565  if( !IsCopperLayer( aLayer ) )
566  return false;
567 
568  if( aLayerName == wxEmptyString || aLayerName.Len() > 20 )
569  return false;
570 
571  // no quote chars in the name allowed
572  if( aLayerName.Find( wxChar( '"' ) ) != wxNOT_FOUND )
573  return false;
574 
575  wxString nameTemp = aLayerName;
576 
577  // replace any spaces with underscores before we do any comparing
578  nameTemp.Replace( wxT( " " ), wxT( "_" ) );
579 
580  if( IsLayerEnabled( aLayer ) )
581  {
582 #if 0
583  for( LAYER_NUM i = FIRST_COPPER_LAYER; i < NB_COPPER_LAYERS; ++i )
584  {
585  if( i != aLayer && IsLayerEnabled( i ) && nameTemp == m_Layer[i].m_Name )
586  return false;
587  }
588 #else
589  for( LSEQ cu = GetEnabledLayers().CuStack(); cu; ++cu )
590  {
591  PCB_LAYER_ID id = *cu;
592 
593  // veto changing the name if it exists elsewhere.
594  if( id != aLayer && nameTemp == m_Layer[id].m_name )
595 // if( id != aLayer && nameTemp == wxString( m_Layer[id].m_name ) )
596  return false;
597  }
598 #endif
599 
600  m_Layer[aLayer].m_name = nameTemp;
601 
602  return true;
603  }
604 
605  return false;
606 }
607 
608 
610 {
611  if( !IsCopperLayer( aLayer ) )
612  return LT_SIGNAL;
613 
614  //@@IMB: The original test was broken due to the discontinuity
615  // in the layer sequence.
616  if( IsLayerEnabled( aLayer ) )
617  return m_Layer[aLayer].m_type;
618 
619  return LT_SIGNAL;
620 }
621 
622 
623 bool BOARD::SetLayerType( PCB_LAYER_ID aLayer, LAYER_T aLayerType )
624 {
625  if( !IsCopperLayer( aLayer ) )
626  return false;
627 
628  //@@IMB: The original test was broken due to the discontinuity
629  // in the layer sequence.
630  if( IsLayerEnabled( aLayer ) )
631  {
632  m_Layer[aLayer].m_type = aLayerType;
633  return true;
634  }
635 
636  return false;
637 }
638 
639 
640 const char* LAYER::ShowType( LAYER_T aType )
641 {
642  const char* cp;
643 
644  switch( aType )
645  {
646  default:
647  case LT_SIGNAL:
648  cp = "signal";
649  break;
650 
651  case LT_POWER:
652  cp = "power";
653  break;
654 
655  case LT_MIXED:
656  cp = "mixed";
657  break;
658 
659  case LT_JUMPER:
660  cp = "jumper";
661  break;
662  }
663 
664  return cp;
665 }
666 
667 
668 LAYER_T LAYER::ParseType( const char* aType )
669 {
670  if( strcmp( aType, "signal" ) == 0 )
671  return LT_SIGNAL;
672  else if( strcmp( aType, "power" ) == 0 )
673  return LT_POWER;
674  else if( strcmp( aType, "mixed" ) == 0 )
675  return LT_MIXED;
676  else if( strcmp( aType, "jumper" ) == 0 )
677  return LT_JUMPER;
678  else
679  return LT_UNDEFINED;
680 }
681 
682 
684 {
686 }
687 
688 
689 void BOARD::SetCopperLayerCount( int aCount )
690 {
692 }
693 
694 
696 {
698 }
699 
700 
702 {
704 }
705 
706 
707 void BOARD::SetEnabledLayers( LSET aLayerSet )
708 {
709  m_designSettings.SetEnabledLayers( aLayerSet );
710 }
711 
712 
713 void BOARD::SetVisibleLayers( LSET aLayerSet )
714 {
715  m_designSettings.SetVisibleLayers( aLayerSet );
716 }
717 
718 
719 void BOARD::SetVisibleElements( int aMask )
720 {
721  // Call SetElementVisibility for each item
722  // to ensure specific calculations that can be needed by some items,
723  // just changing the visibility flags could be not sufficient.
725  {
726  int item_mask = 1 << GAL_LAYER_INDEX( ii );
727  SetElementVisibility( ii, aMask & item_mask );
728  }
729 }
730 
731 
733 {
734  SetVisibleLayers( LSET().set() );
735 
736  // Call SetElementVisibility for each item,
737  // to ensure specific calculations that can be needed by some items
739  SetElementVisibility( ii, true );
740 }
741 
742 
744 {
746 }
747 
748 
750 {
751  return m_designSettings.IsElementVisible( aLayer );
752 }
753 
754 
755 void BOARD::SetElementVisibility( GAL_LAYER_ID aLayer, bool isEnabled )
756 {
757  m_designSettings.SetElementVisibility( aLayer, isEnabled );
758 
759  switch( aLayer )
760  {
761  case LAYER_RATSNEST:
762  {
763  bool visible = IsElementVisible( LAYER_RATSNEST );
764  // we must clear or set the CH_VISIBLE flags to hide/show ratsnest
765  // because we have a tool to show/hide ratsnest relative to a pad or a module
766  // so the hide/show option is a per item selection
767 
768  for( unsigned int net = 1; net < GetNetCount(); net++ )
769  {
770  auto rn = GetConnectivity()->GetRatsnestForNet( net );
771  if( rn )
772  rn->SetVisible( visible );
773  }
774 
775  for( auto track : Tracks() )
776  track->SetLocalRatsnestVisible( isEnabled );
777 
778  for( auto mod : Modules() )
779  {
780  for( auto pad : mod->Pads() )
781  pad->SetLocalRatsnestVisible( isEnabled );
782  }
783 
784  for( int i = 0; i<GetAreaCount(); i++ )
785  {
786  auto zone = GetArea( i );
787  zone->SetLocalRatsnestVisible( isEnabled );
788  }
789 
790  m_Status_Pcb = 0;
791 
792  break;
793  }
794 
795  default:
796  ;
797  }
798 }
799 
800 
802 {
803  switch( aLayer )
804  {
805  case F_Cu:
806  return IsElementVisible( LAYER_MOD_FR );
807 
808  case B_Cu:
809  return IsElementVisible( LAYER_MOD_BK );
810 
811  default:
812  wxFAIL_MSG( wxT( "BOARD::IsModuleLayerVisible() param error: bad layer" ) );
813  return true;
814  }
815 }
816 
817 
818 void BOARD::Add( BOARD_ITEM* aBoardItem, ADD_MODE aMode )
819 {
820  if( aBoardItem == NULL )
821  {
822  wxFAIL_MSG( wxT( "BOARD::Add() param error: aBoardItem NULL" ) );
823  return;
824  }
825 
826  switch( aBoardItem->Type() )
827  {
828  case PCB_NETINFO_T:
829  m_NetInfo.AppendNet( (NETINFO_ITEM*) aBoardItem );
830  break;
831 
832  // this one uses a vector
833  case PCB_MARKER_T:
834  m_markers.push_back( (MARKER_PCB*) aBoardItem );
835  break;
836 
837  // this one uses a vector
838  case PCB_ZONE_AREA_T:
839  m_ZoneDescriptorList.push_back( (ZONE_CONTAINER*) aBoardItem );
840  break;
841 
842  case PCB_TRACE_T:
843  case PCB_VIA_T:
844  if( aMode == ADD_APPEND )
845  {
846  m_Track.PushBack( (TRACK*) aBoardItem );
847  }
848  else
849  {
850  TRACK* insertAid;
851  insertAid = ( (TRACK*) aBoardItem )->GetBestInsertPoint( this );
852  m_Track.Insert( (TRACK*) aBoardItem, insertAid );
853  }
854 
855  break;
856 
857  case PCB_ZONE_T:
858  if( aMode == ADD_APPEND )
859  m_Zone.PushBack( (SEGZONE*) aBoardItem );
860  else
861  m_Zone.PushFront( (SEGZONE*) aBoardItem );
862 
863  break;
864 
865  case PCB_MODULE_T:
866  if( aMode == ADD_APPEND )
867  m_Modules.PushBack( (MODULE*) aBoardItem );
868  else
869  m_Modules.PushFront( (MODULE*) aBoardItem );
870 
871  // Because the list of pads has changed, reset the status
872  // This indicate the list of pad and nets must be recalculated before use
873  m_Status_Pcb = 0;
874  break;
875 
876  case PCB_DIMENSION_T:
877  case PCB_LINE_T:
878  case PCB_TEXT_T:
879  case PCB_TARGET_T:
880  if( aMode == ADD_APPEND )
881  m_Drawings.PushBack( aBoardItem );
882  else
883  m_Drawings.PushFront( aBoardItem );
884 
885  break;
886 
887  // other types may use linked list
888  default:
889  {
890  wxString msg;
891  msg.Printf( wxT( "BOARD::Add() needs work: BOARD_ITEM type (%d) not handled" ),
892  aBoardItem->Type() );
893  wxFAIL_MSG( msg );
894  return;
895  }
896  break;
897  }
898 
899  aBoardItem->SetParent( this );
900  m_connectivity->Add( aBoardItem );
901 }
902 
903 
904 void BOARD::Remove( BOARD_ITEM* aBoardItem )
905 {
906  // find these calls and fix them! Don't send me no stinking' NULL.
907  wxASSERT( aBoardItem );
908 
909  switch( aBoardItem->Type() )
910  {
911  case PCB_NETINFO_T:
912  {
913  NETINFO_ITEM* item = (NETINFO_ITEM*) aBoardItem;
914  m_NetInfo.RemoveNet( item );
915  break;
916  }
917 
918  case PCB_MARKER_T:
919 
920  // find the item in the vector, then remove it
921  for( unsigned i = 0; i<m_markers.size(); ++i )
922  {
923  if( m_markers[i] == (MARKER_PCB*) aBoardItem )
924  {
925  m_markers.erase( m_markers.begin() + i );
926  break;
927  }
928  }
929 
930  break;
931 
932  case PCB_ZONE_AREA_T: // this one uses a vector
933  // find the item in the vector, then delete then erase it.
934  for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
935  {
936  if( m_ZoneDescriptorList[i] == (ZONE_CONTAINER*) aBoardItem )
937  {
938  m_ZoneDescriptorList.erase( m_ZoneDescriptorList.begin() + i );
939  break;
940  }
941  }
942  break;
943 
944  case PCB_MODULE_T:
945  m_Modules.Remove( (MODULE*) aBoardItem );
946  break;
947 
948  case PCB_TRACE_T:
949  case PCB_VIA_T:
950  m_Track.Remove( (TRACK*) aBoardItem );
951  break;
952 
953  case PCB_ZONE_T:
954  m_Zone.Remove( (SEGZONE*) aBoardItem );
955  break;
956 
957  case PCB_DIMENSION_T:
958  case PCB_LINE_T:
959  case PCB_TEXT_T:
960  case PCB_TARGET_T:
961  m_Drawings.Remove( aBoardItem );
962  break;
963 
964  // other types may use linked list
965  default:
966  wxFAIL_MSG( wxT( "BOARD::Remove() needs more ::Type() support" ) );
967  }
968 
969  m_connectivity->Remove( aBoardItem );
970 }
971 
972 
974 {
975  // the vector does not know how to delete the MARKER_PCB, it holds pointers
976  for( unsigned i = 0; i<m_markers.size(); ++i )
977  delete m_markers[i];
978 
979  m_markers.clear();
980 }
981 
982 
984 {
985  // the vector does not know how to delete the ZONE Outlines, it holds
986  // pointers
987  for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
988  delete m_ZoneDescriptorList[i];
989 
990  m_ZoneDescriptorList.clear();
991 }
992 
993 
995 {
996  return m_Track.GetCount();
997 }
998 
999 
1001 {
1002  return m_Zone.GetCount();
1003 }
1004 
1005 
1006 unsigned BOARD::GetNodesCount() const
1007 {
1008  return m_connectivity->GetPadCount();
1009 }
1010 
1011 
1013 {
1014  return m_connectivity->GetUnconnectedCount();
1015 }
1016 
1017 
1018 EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
1019 {
1020  bool hasItems = false;
1021  EDA_RECT area;
1022 
1023  // Check segments, dimensions, texts, and fiducials
1024  for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() )
1025  {
1026  if( aBoardEdgesOnly && (item->Type() != PCB_LINE_T || item->GetLayer() != Edge_Cuts ) )
1027  continue;
1028 
1029  if( !hasItems )
1030  area = item->GetBoundingBox();
1031  else
1032  area.Merge( item->GetBoundingBox() );
1033 
1034  hasItems = true;
1035  }
1036 
1037  if( !aBoardEdgesOnly )
1038  {
1039  // Check modules
1040  for( MODULE* module = m_Modules; module; module = module->Next() )
1041  {
1042  if( !hasItems )
1043  area = module->GetBoundingBox();
1044  else
1045  area.Merge( module->GetBoundingBox() );
1046 
1047  hasItems = true;
1048  }
1049 
1050  // Check tracks
1051  for( TRACK* track = m_Track; track; track = track->Next() )
1052  {
1053  if( !hasItems )
1054  area = track->GetBoundingBox();
1055  else
1056  area.Merge( track->GetBoundingBox() );
1057 
1058  hasItems = true;
1059  }
1060 
1061  // Check segment zones
1062  for( TRACK* track = m_Zone; track; track = track->Next() )
1063  {
1064  if( !hasItems )
1065  area = track->GetBoundingBox();
1066  else
1067  area.Merge( track->GetBoundingBox() );
1068 
1069  hasItems = true;
1070  }
1071 
1072  // Check polygonal zones
1073  for( unsigned int i = 0; i < m_ZoneDescriptorList.size(); i++ )
1074  {
1076 
1077  if( !hasItems )
1078  area = aZone->GetBoundingBox();
1079  else
1080  area.Merge( aZone->GetBoundingBox() );
1081 
1082  area.Merge( aZone->GetBoundingBox() );
1083  hasItems = true;
1084  }
1085  }
1086 
1087  return area;
1088 }
1089 
1090 
1091 // virtual, see pcbstruct.h
1092 void BOARD::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
1093 {
1094  wxString txt;
1095  int viasCount = 0;
1096  int trackSegmentsCount = 0;
1097 
1098  for( BOARD_ITEM* item = m_Track; item; item = item->Next() )
1099  {
1100  if( item->Type() == PCB_VIA_T )
1101  viasCount++;
1102  else
1103  trackSegmentsCount++;
1104  }
1105 
1106  txt.Printf( wxT( "%d" ), GetPadCount() );
1107  aList.push_back( MSG_PANEL_ITEM( _( "Pads" ), txt, DARKGREEN ) );
1108 
1109  txt.Printf( wxT( "%d" ), viasCount );
1110  aList.push_back( MSG_PANEL_ITEM( _( "Vias" ), txt, DARKGREEN ) );
1111 
1112  txt.Printf( wxT( "%d" ), trackSegmentsCount );
1113  aList.push_back( MSG_PANEL_ITEM( _( "Track Segments" ), txt, DARKGREEN ) );
1114 
1115  txt.Printf( wxT( "%d" ), GetNodesCount() );
1116  aList.push_back( MSG_PANEL_ITEM( _( "Nodes" ), txt, DARKCYAN ) );
1117 
1118  txt.Printf( wxT( "%d" ), m_NetInfo.GetNetCount() );
1119  aList.push_back( MSG_PANEL_ITEM( _( "Nets" ), txt, RED ) );
1120 
1121  txt.Printf( wxT( "%d" ), GetConnectivity()->GetUnconnectedCount() );
1122  aList.push_back( MSG_PANEL_ITEM( _( "Unconnected" ), txt, BLUE ) );
1123 }
1124 
1125 
1126 // virtual, see pcbstruct.h
1127 SEARCH_RESULT BOARD::Visit( INSPECTOR inspector, void* testData, const KICAD_T scanTypes[] )
1128 {
1129  KICAD_T stype;
1130  SEARCH_RESULT result = SEARCH_CONTINUE;
1131  const KICAD_T* p = scanTypes;
1132  bool done = false;
1133 
1134 #if 0 && defined(DEBUG)
1135  std::cout << GetClass().mb_str() << ' ';
1136 #endif
1137 
1138  while( !done )
1139  {
1140  stype = *p;
1141 
1142  switch( stype )
1143  {
1144  case PCB_T:
1145  result = inspector( this, testData ); // inspect me
1146  // skip over any types handled in the above call.
1147  ++p;
1148  break;
1149 
1150  /* Instances of the requested KICAD_T live in a list, either one
1151  * that I manage, or that my modules manage. If it's a type managed
1152  * by class MODULE, then simply pass it on to each module's
1153  * MODULE::Visit() function by way of the
1154  * IterateForward( m_Modules, ... ) call.
1155  */
1156 
1157  case PCB_MODULE_T:
1158  case PCB_PAD_T:
1159  case PCB_MODULE_TEXT_T:
1160  case PCB_MODULE_EDGE_T:
1161 
1162  // this calls MODULE::Visit() on each module.
1163  result = IterateForward( m_Modules, inspector, testData, p );
1164 
1165  // skip over any types handled in the above call.
1166  for( ; ; )
1167  {
1168  switch( stype = *++p )
1169  {
1170  case PCB_MODULE_T:
1171  case PCB_PAD_T:
1172  case PCB_MODULE_TEXT_T:
1173  case PCB_MODULE_EDGE_T:
1174  continue;
1175 
1176  default:
1177  ;
1178  }
1179 
1180  break;
1181  }
1182 
1183  break;
1184 
1185  case PCB_LINE_T:
1186  case PCB_TEXT_T:
1187  case PCB_DIMENSION_T:
1188  case PCB_TARGET_T:
1189  result = IterateForward( m_Drawings, inspector, testData, p );
1190 
1191  // skip over any types handled in the above call.
1192  for( ; ; )
1193  {
1194  switch( stype = *++p )
1195  {
1196  case PCB_LINE_T:
1197  case PCB_TEXT_T:
1198  case PCB_DIMENSION_T:
1199  case PCB_TARGET_T:
1200  continue;
1201 
1202  default:
1203  ;
1204  }
1205 
1206  break;
1207  }
1208 
1209  ;
1210  break;
1211 
1212 #if 0 // both these are on same list, so we must scan it twice in order
1213  // to get VIA priority, using new #else code below.
1214  // But we are not using separate lists for TRACKs and VIA, because
1215  // items are ordered (sorted) in the linked
1216  // list by netcode AND by physical distance:
1217  // when created, if a track or via is connected to an existing track or
1218  // via, it is put in linked list after this existing track or via
1219  // So usually, connected tracks or vias are grouped in this list
1220  // So the algorithm (used in ratsnest computations) which computes the
1221  // track connectivity is faster (more than 100 time regarding to
1222  // a non ordered list) because when it searches for a connection, first
1223  // it tests the near (near in term of linked list) 50 items
1224  // from the current item (track or via) in test.
1225  // Usually, because of this sort, a connected item (if exists) is
1226  // found.
1227  // If not found (and only in this case) an exhaustive (and time
1228  // consuming) search is made, but this case is statistically rare.
1229  case PCB_VIA_T:
1230  case PCB_TRACE_T:
1231  result = IterateForward( m_Track, inspector, testData, p );
1232 
1233  // skip over any types handled in the above call.
1234  for( ; ; )
1235  {
1236  switch( stype = *++p )
1237  {
1238  case PCB_VIA_T:
1239  case PCB_TRACE_T:
1240  continue;
1241 
1242  default:
1243  ;
1244  }
1245 
1246  break;
1247  }
1248 
1249  break;
1250 
1251 #else
1252  case PCB_VIA_T:
1253  result = IterateForward( m_Track, inspector, testData, p );
1254  ++p;
1255  break;
1256 
1257  case PCB_TRACE_T:
1258  result = IterateForward( m_Track, inspector, testData, p );
1259  ++p;
1260  break;
1261 #endif
1262 
1263  case PCB_MARKER_T:
1264 
1265  // MARKER_PCBS are in the m_markers std::vector
1266  for( unsigned i = 0; i<m_markers.size(); ++i )
1267  {
1268  result = m_markers[i]->Visit( inspector, testData, p );
1269 
1270  if( result == SEARCH_QUIT )
1271  break;
1272  }
1273 
1274  ++p;
1275  break;
1276 
1277  case PCB_ZONE_AREA_T:
1278 
1279  // PCB_ZONE_AREA_T are in the m_ZoneDescriptorList std::vector
1280  for( unsigned i = 0; i< m_ZoneDescriptorList.size(); ++i )
1281  {
1282  result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p );
1283 
1284  if( result == SEARCH_QUIT )
1285  break;
1286  }
1287 
1288  ++p;
1289  break;
1290 
1291  case PCB_ZONE_T:
1292  result = IterateForward( m_Zone, inspector, testData, p );
1293  ++p;
1294  break;
1295 
1296  default: // catch EOT or ANY OTHER type here and return.
1297  done = true;
1298  break;
1299  }
1300 
1301  if( result == SEARCH_QUIT )
1302  break;
1303  }
1304 
1305  return result;
1306 }
1307 
1308 
1309 NETINFO_ITEM* BOARD::FindNet( int aNetcode ) const
1310 {
1311  // the first valid netcode is 1 and the last is m_NetInfo.GetCount()-1.
1312  // zero is reserved for "no connection" and is not actually a net.
1313  // NULL is returned for non valid netcodes
1314 
1315  wxASSERT( m_NetInfo.GetNetCount() > 0 ); // net zero should exist
1316 
1317  if( aNetcode == NETINFO_LIST::UNCONNECTED && m_NetInfo.GetNetCount() == 0 )
1319  else
1320  return m_NetInfo.GetNetItem( aNetcode );
1321 }
1322 
1323 
1324 NETINFO_ITEM* BOARD::FindNet( const wxString& aNetname ) const
1325 {
1326  return m_NetInfo.GetNetItem( aNetname );
1327 }
1328 
1329 
1330 MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
1331 {
1332  MODULE* found = nullptr;
1333 
1334  // search only for MODULES
1335  static const KICAD_T scanTypes[] = { PCB_MODULE_T, EOT };
1336 
1337  INSPECTOR_FUNC inspector = [&] ( EDA_ITEM* item, void* testData )
1338  {
1339  MODULE* module = (MODULE*) item;
1340 
1341  if( aReference == module->GetReference() )
1342  {
1343  found = module;
1344  return SEARCH_QUIT;
1345  }
1346 
1347  return SEARCH_CONTINUE;
1348  };
1349 
1350  // visit this BOARD with the above inspector
1351  BOARD* nonconstMe = (BOARD*) this;
1352  nonconstMe->Visit( inspector, NULL, scanTypes );
1353 
1354  return found;
1355 }
1356 
1357 
1358 MODULE* BOARD::FindModule( const wxString& aRefOrTimeStamp, bool aSearchByTimeStamp ) const
1359 {
1360  if( aSearchByTimeStamp )
1361  {
1362  for( MODULE* module = m_Modules; module; module = module->Next() )
1363  {
1364  if( aRefOrTimeStamp.CmpNoCase( module->GetPath() ) == 0 )
1365  return module;
1366  }
1367  }
1368  else
1369  {
1370  return FindModuleByReference( aRefOrTimeStamp );
1371  }
1372 
1373  return NULL;
1374 }
1375 
1376 
1377 // Sort nets by decreasing pad count. For same pad count, sort by alphabetic names
1378 static bool sortNetsByNodes( const NETINFO_ITEM* a, const NETINFO_ITEM* b )
1379 {
1380  auto connectivity = a->GetParent()->GetConnectivity();
1381  int countA = connectivity->GetPadCount( a->GetNet() );
1382  int countB = connectivity->GetPadCount( b->GetNet() );
1383 
1384  if( countA == countB )
1385  return a->GetNetname() < b->GetNetname();
1386  else
1387  return countB < countA;
1388 }
1389 
1390 // Sort nets by alphabetic names
1391 static bool sortNetsByNames( const NETINFO_ITEM* a, const NETINFO_ITEM* b )
1392 {
1393  return a->GetNetname() < b->GetNetname();
1394 }
1395 
1396 int BOARD::SortedNetnamesList( wxArrayString& aNames, bool aSortbyPadsCount )
1397 {
1398  if( m_NetInfo.GetNetCount() == 0 )
1399  return 0;
1400 
1401  // Build the list
1402  std::vector <NETINFO_ITEM*> netBuffer;
1403 
1404  netBuffer.reserve( m_NetInfo.GetNetCount() );
1405 
1406  for( NETINFO_LIST::iterator net( m_NetInfo.begin() ), netEnd( m_NetInfo.end() );
1407  net != netEnd; ++net )
1408  {
1409  if( net->GetNet() > 0 )
1410  netBuffer.push_back( *net );
1411  }
1412 
1413  // sort the list
1414  if( aSortbyPadsCount )
1415  sort( netBuffer.begin(), netBuffer.end(), sortNetsByNodes );
1416  else
1417  sort( netBuffer.begin(), netBuffer.end(), sortNetsByNames );
1418 
1419  for( unsigned ii = 0; ii < netBuffer.size(); ii++ )
1420  aNames.Add( netBuffer[ii]->GetNetname() );
1421 
1422  return netBuffer.size();
1423 }
1424 
1425 
1426 void BOARD::RedrawAreasOutlines( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode, PCB_LAYER_ID aLayer )
1427 {
1428  if( !aDC )
1429  return;
1430 
1431  for( int ii = 0; ii < GetAreaCount(); ii++ )
1432  {
1433  ZONE_CONTAINER* edge_zone = GetArea( ii );
1434 
1435  if( (aLayer < 0) || ( aLayer == edge_zone->GetLayer() ) )
1436  edge_zone->Draw( panel, aDC, aDrawMode );
1437  }
1438 }
1439 
1440 
1441 void BOARD::RedrawFilledAreas( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode, PCB_LAYER_ID aLayer )
1442 {
1443  if( !aDC )
1444  return;
1445 
1446  for( int ii = 0; ii < GetAreaCount(); ii++ )
1447  {
1448  ZONE_CONTAINER* edge_zone = GetArea( ii );
1449 
1450  if( (aLayer < 0) || ( aLayer == edge_zone->GetLayer() ) )
1451  edge_zone->DrawFilledArea( panel, aDC, aDrawMode );
1452  }
1453 }
1454 
1455 
1457  PCB_LAYER_ID aStartLayer, PCB_LAYER_ID aEndLayer, int aNetCode )
1458 {
1459  if( aEndLayer < 0 )
1460  aEndLayer = aStartLayer;
1461 
1462  if( aEndLayer < aStartLayer )
1463  std::swap( aEndLayer, aStartLayer );
1464 
1465  for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ )
1466  {
1468  LAYER_NUM layer = area->GetLayer();
1469 
1470  if( layer < aStartLayer || layer > aEndLayer )
1471  continue;
1472 
1473  // In locate functions we must skip tagged items with BUSY flag set.
1474  if( area->GetState( BUSY ) )
1475  continue;
1476 
1477  if( aNetCode >= 0 && area->GetNetCode() != aNetCode )
1478  continue;
1479 
1480  if( area->HitTestFilledArea( aRefPos ) )
1481  return area;
1482  }
1483 
1484  return NULL;
1485 }
1486 
1487 
1489 {
1490  int error_count = 0;
1491 
1492  for( int ii = 0; ii < GetAreaCount(); ii++ )
1493  {
1494  ZONE_CONTAINER* it = GetArea( ii );
1495 
1496  if( !it->IsOnCopperLayer() )
1497  {
1499  continue;
1500  }
1501 
1502  if( it->GetNetCode() != 0 ) // i.e. if this zone is connected to a net
1503  {
1504  const NETINFO_ITEM* net = it->GetNet();
1505 
1506  if( net )
1507  {
1508  it->SetNetCode( net->GetNet() );
1509  }
1510  else
1511  {
1512  error_count++;
1513 
1514  // keep Net Name and set m_NetCode to -1 : error flag.
1515  it->SetNetCode( -1 );
1516  }
1517  }
1518  }
1519 
1520  return error_count;
1521 }
1522 
1523 
1524 VIA* BOARD::GetViaByPosition( const wxPoint& aPosition, PCB_LAYER_ID aLayer) const
1525 {
1526  for( VIA *via = GetFirstVia( m_Track); via; via = GetFirstVia( via->Next() ) )
1527  {
1528  if( (via->GetStart() == aPosition) &&
1529  (via->GetState( BUSY | IS_DELETED ) == 0) &&
1530  ((aLayer == UNDEFINED_LAYER) || (via->IsOnLayer( aLayer ))) )
1531  return via;
1532  }
1533 
1534  return NULL;
1535 }
1536 
1537 
1538 D_PAD* BOARD::GetPad( const wxPoint& aPosition, LSET aLayerSet )
1539 {
1540  if( !aLayerSet.any() )
1541  aLayerSet = LSET::AllCuMask();
1542 
1543  for( MODULE* module = m_Modules; module; module = module->Next() )
1544  {
1545  D_PAD* pad = module->GetPad( aPosition, aLayerSet );
1546 
1547  if( pad )
1548  return pad;
1549  }
1550 
1551  return NULL;
1552 }
1553 
1554 
1555 D_PAD* BOARD::GetPad( TRACK* aTrace, ENDPOINT_T aEndPoint )
1556 {
1557  const wxPoint& aPosition = aTrace->GetEndPoint( aEndPoint );
1558 
1559  LSET lset( aTrace->GetLayer() );
1560 
1561  for( MODULE* module = m_Modules; module; module = module->Next() )
1562  {
1563  D_PAD* pad = module->GetPad( aPosition, lset );
1564 
1565  if( pad )
1566  return pad;
1567  }
1568 
1569  return NULL;
1570 
1571 }
1572 
1573 
1574 std::list<TRACK*> BOARD::GetTracksByPosition( const wxPoint& aPosition, PCB_LAYER_ID aLayer ) const
1575 {
1576  std::list<TRACK*> tracks;
1577 
1578  for( TRACK* track = GetFirstTrack( m_Track ); track; track = GetFirstTrack( track->Next() ) )
1579  {
1580  if( ( ( track->GetStart() == aPosition ) || track->GetEnd() == aPosition ) &&
1581  ( track->GetState( BUSY | IS_DELETED ) == 0 ) &&
1582  ( ( aLayer == UNDEFINED_LAYER ) || ( track->IsOnLayer( aLayer ) ) ) )
1583 
1584  tracks.push_back( track );
1585  }
1586 
1587  return tracks;
1588 }
1589 
1590 
1591 D_PAD* BOARD::GetPadFast( const wxPoint& aPosition, LSET aLayerSet )
1592 {
1593  for( auto mod : Modules() )
1594  {
1595  for ( auto pad : mod->Pads() )
1596  {
1597  if( pad->GetPosition() != aPosition )
1598  continue;
1599 
1600  // Pad found, it must be on the correct layer
1601  if( ( pad->GetLayerSet() & aLayerSet ).any() )
1602  return pad;
1603  }
1604 }
1605 
1606  return nullptr;
1607 }
1608 
1609 
1610 D_PAD* BOARD::GetPad( std::vector<D_PAD*>& aPadList, const wxPoint& aPosition, LSET aLayerSet )
1611 {
1612  // Search aPadList for aPosition
1613  // aPadList is sorted by X then Y values, and a fast binary search is used
1614  int idxmax = aPadList.size()-1;
1615 
1616  int delta = aPadList.size();
1617 
1618  int idx = 0; // Starting index is the beginning of list
1619 
1620  while( delta )
1621  {
1622  // Calculate half size of remaining interval to test.
1623  // Ensure the computed value is not truncated (too small)
1624  if( (delta & 1) && ( delta > 1 ) )
1625  delta++;
1626 
1627  delta /= 2;
1628 
1629  D_PAD* pad = aPadList[idx];
1630 
1631  if( pad->GetPosition() == aPosition ) // candidate found
1632  {
1633  // The pad must match the layer mask:
1634  if( ( aLayerSet & pad->GetLayerSet() ).any() )
1635  return pad;
1636 
1637  // More than one pad can be at aPosition
1638  // search for a pad at aPosition that matched this mask
1639 
1640  // search next
1641  for( int ii = idx+1; ii <= idxmax; ii++ )
1642  {
1643  pad = aPadList[ii];
1644 
1645  if( pad->GetPosition() != aPosition )
1646  break;
1647 
1648  if( ( aLayerSet & pad->GetLayerSet() ).any() )
1649  return pad;
1650  }
1651  // search previous
1652  for( int ii = idx-1 ;ii >=0; ii-- )
1653  {
1654  pad = aPadList[ii];
1655 
1656  if( pad->GetPosition() != aPosition )
1657  break;
1658 
1659  if( ( aLayerSet & pad->GetLayerSet() ).any() )
1660  return pad;
1661  }
1662 
1663  // Not found:
1664  return 0;
1665  }
1666 
1667  if( pad->GetPosition().x == aPosition.x ) // Must search considering Y coordinate
1668  {
1669  if( pad->GetPosition().y < aPosition.y ) // Must search after this item
1670  {
1671  idx += delta;
1672 
1673  if( idx > idxmax )
1674  idx = idxmax;
1675  }
1676  else // Must search before this item
1677  {
1678  idx -= delta;
1679 
1680  if( idx < 0 )
1681  idx = 0;
1682  }
1683  }
1684  else if( pad->GetPosition().x < aPosition.x ) // Must search after this item
1685  {
1686  idx += delta;
1687 
1688  if( idx > idxmax )
1689  idx = idxmax;
1690  }
1691  else // Must search before this item
1692  {
1693  idx -= delta;
1694 
1695  if( idx < 0 )
1696  idx = 0;
1697  }
1698  }
1699 
1700  return NULL;
1701 }
1702 
1703 
1709 bool sortPadsByXthenYCoord( D_PAD* const & ref, D_PAD* const & comp )
1710 {
1711  if( ref->GetPosition().x == comp->GetPosition().x )
1712  return ref->GetPosition().y < comp->GetPosition().y;
1713  return ref->GetPosition().x < comp->GetPosition().x;
1714 }
1715 
1716 
1717 void BOARD::GetSortedPadListByXthenYCoord( std::vector<D_PAD*>& aVector, int aNetCode )
1718 {
1719  for ( auto mod : Modules() )
1720  {
1721  for ( auto pad : mod->Pads( ) )
1722  {
1723  if( aNetCode < 0 || pad->GetNetCode() == aNetCode )
1724  {
1725  aVector.push_back( pad );
1726  }
1727  }
1728  }
1729 
1730  std::sort( aVector.begin(), aVector.end(), sortPadsByXthenYCoord );
1731 }
1732 
1733 
1735 {
1736  aPad->DeleteStructure();
1737 }
1738 
1739 
1740 TRACK* BOARD::GetVisibleTrack( TRACK* aStartingTrace, const wxPoint& aPosition,
1741  LSET aLayerSet ) const
1742 {
1743  for( TRACK* track = aStartingTrace; track; track = track->Next() )
1744  {
1745  PCB_LAYER_ID layer = track->GetLayer();
1746 
1747  if( track->GetState( BUSY | IS_DELETED ) )
1748  continue;
1749 
1750  // track's layer is not visible
1751  if( m_designSettings.IsLayerVisible( layer ) == false )
1752  continue;
1753 
1754  if( track->Type() == PCB_VIA_T ) // VIA encountered.
1755  {
1756  if( track->HitTest( aPosition ) )
1757  return track;
1758  }
1759  else
1760  {
1761  if( !aLayerSet[layer] )
1762  continue; // track's layer is not in aLayerSet
1763 
1764  if( track->HitTest( aPosition ) )
1765  return track;
1766  }
1767  }
1768 
1769  return NULL;
1770 }
1771 
1772 
1773 #if defined(DEBUG) && 0
1774 static void dump_tracks( const char* aName, const TRACKS& aList )
1775 {
1776  printf( "%s: count=%zd\n", aName, aList.size() );
1777 
1778  for( unsigned i = 0; i < aList.size(); ++i )
1779  {
1780  TRACK* seg = aList[i];
1781  ::VIA* via = dynamic_cast< ::VIA* >( seg );
1782 
1783  if( via )
1784  printf( " via[%u]: (%d, %d)\n", i, via->GetStart().x, via->GetStart().y );
1785  else
1786  printf( " seg[%u]: (%d, %d) (%d, %d)\n", i,
1787  seg->GetStart().x, seg->GetStart().y,
1788  seg->GetEnd().x, seg->GetEnd().y );
1789  }
1790 }
1791 #endif
1792 
1793 
1794 
1795 
1796 TRACK* BOARD::MarkTrace( TRACK* aTrace, int* aCount,
1797  double* aTraceLength, double* aPadToDieLength,
1798  bool aReorder )
1799 {
1800  TRACKS trackList;
1801 
1802  if( aCount )
1803  *aCount = 0;
1804 
1805  if( aTraceLength )
1806  *aTraceLength = 0;
1807 
1808  if( aTrace == NULL )
1809  return NULL;
1810 
1811  // Ensure the flag BUSY of all tracks of the board is cleared
1812  // because we use it to mark segments of the track
1813  for( TRACK* track = m_Track; track; track = track->Next() )
1814  track->SetState( BUSY, false );
1815 
1816  // Set flags of the initial track segment
1817  aTrace->SetState( BUSY, true );
1818  LSET layer_set = aTrace->GetLayerSet();
1819 
1820  trackList.push_back( aTrace );
1821 
1822  /* Examine the initial track segment : if it is really a segment, this is
1823  * easy.
1824  * If it is a via, one must search for connected segments.
1825  * If <=2, this via connect 2 segments (or is connected to only one
1826  * segment) and this via and these 2 segments are a part of a track.
1827  * If > 2 only this via is flagged (the track has only this via)
1828  */
1829  if( aTrace->Type() == PCB_VIA_T )
1830  {
1831  TRACK* segm1 = ::GetTrack( m_Track, NULL, aTrace->GetStart(), layer_set );
1832  TRACK* segm2 = NULL;
1833  TRACK* segm3 = NULL;
1834 
1835  if( segm1 )
1836  {
1837  segm2 = ::GetTrack( segm1->Next(), NULL, aTrace->GetStart(), layer_set );
1838  }
1839 
1840  if( segm2 )
1841  {
1842  segm3 = ::GetTrack( segm2->Next(), NULL, aTrace->GetStart(), layer_set );
1843  }
1844 
1845  if( segm3 )
1846  {
1847  // More than 2 segments are connected to this via.
1848  // The "track" is only this via.
1849 
1850  if( aCount )
1851  *aCount = 1;
1852 
1853  return aTrace;
1854  }
1855 
1856  if( segm1 ) // search for other segments connected to the initial segment start point
1857  {
1858  layer_set = segm1->GetLayerSet();
1859  chainMarkedSegments( aTrace->GetStart(), layer_set, &trackList );
1860  }
1861 
1862  if( segm2 ) // search for other segments connected to the initial segment end point
1863  {
1864  layer_set = segm2->GetLayerSet();
1865  chainMarkedSegments( aTrace->GetStart(), layer_set, &trackList );
1866  }
1867  }
1868  else // mark the chain using both ends of the initial segment
1869  {
1870  TRACKS from_start;
1871  TRACKS from_end;
1872 
1873  chainMarkedSegments( aTrace->GetStart(), layer_set, &from_start );
1874  chainMarkedSegments( aTrace->GetEnd(), layer_set, &from_end );
1875 
1876  // DBG( dump_tracks( "first_clicked", trackList ); )
1877  // DBG( dump_tracks( "from_start", from_start ); )
1878  // DBG( dump_tracks( "from_end", from_end ); )
1879 
1880  // combine into one trackList:
1881  trackList.insert( trackList.end(), from_start.begin(), from_start.end() );
1882  trackList.insert( trackList.end(), from_end.begin(), from_end.end() );
1883  }
1884 
1885  // Now examine selected vias and flag them if they are on the track
1886  // If a via is connected to only one or 2 segments, it is flagged (is on the track)
1887  // If a via is connected to more than 2 segments, it is a track end, and it
1888  // is removed from the list.
1889  // Go through the list backwards.
1890  for( int i = trackList.size() - 1; i>=0; --i )
1891  {
1892  ::VIA* via = dynamic_cast< ::VIA* >( trackList[i] );
1893 
1894  if( !via )
1895  continue;
1896 
1897  if( via == aTrace )
1898  continue;
1899 
1900  via->SetState( BUSY, true ); // Try to flag it. the flag will be cleared later if needed
1901 
1902  layer_set = via->GetLayerSet();
1903 
1904  TRACK* track = ::GetTrack( m_Track, NULL, via->GetStart(), layer_set );
1905 
1906  // GetTrace does not consider tracks flagged BUSY.
1907  // So if no connected track found, this via is on the current track
1908  // only: keep it
1909  if( track == NULL )
1910  continue;
1911 
1912  /* If a track is found, this via connects also other segments of
1913  * another track. This case happens when a via ends the selected
1914  * track but must we consider this via is on the selected track, or
1915  * on another track.
1916  * (this is important when selecting a track for deletion: must this
1917  * via be deleted or not?)
1918  * We consider this via to be on our track if other segments connected
1919  * to this via remain connected when removing this via.
1920  * We search for all other segments connected together:
1921  * if they are on the same layer, then the via is on the selected track;
1922  * if they are on different layers, the via is on another track.
1923  */
1924  LAYER_NUM layer = track->GetLayer();
1925 
1926  while( ( track = ::GetTrack( track->Next(), NULL, via->GetStart(), layer_set ) ) != NULL )
1927  {
1928  if( layer != track->GetLayer() )
1929  {
1930  // The via connects segments of another track: it is removed
1931  // from list because it is member of another track
1932 
1933  DBG(printf( "%s: omit track (%d, %d) (%d, %d) on layer:%d (!= our_layer:%d)\n",
1934  __func__,
1935  track->GetStart().x, track->GetStart().y,
1936  track->GetEnd().x, track->GetEnd().y,
1937  track->GetLayer(), layer
1938  ); )
1939 
1940  via->SetState( BUSY, false );
1941  break;
1942  }
1943  }
1944  }
1945 
1946  /* Rearrange the track list in order to have flagged segments linked
1947  * from firstTrack so the NbSegmBusy segments are consecutive segments
1948  * in list, the first item in the full track list is firstTrack, and
1949  * the NbSegmBusy-1 next items (NbSegmBusy when including firstTrack)
1950  * are the flagged segments
1951  */
1952  int busy_count = 0;
1953  TRACK* firstTrack;
1954 
1955  for( firstTrack = m_Track; firstTrack; firstTrack = firstTrack->Next() )
1956  {
1957  // Search for the first flagged BUSY segments
1958  if( firstTrack->GetState( BUSY ) )
1959  {
1960  busy_count = 1;
1961  break;
1962  }
1963  }
1964 
1965  if( firstTrack == NULL )
1966  return NULL;
1967 
1968  // First step: calculate the track length and find the pads (when exist)
1969  // at each end of the trace.
1970  double full_len = 0;
1971  double lenPadToDie = 0;
1972  // Because we have a track (a set of track segments between 2 nodes),
1973  // only 2 pads (maximum) will be taken in account:
1974  // that are on each end of the track, if any.
1975  // keep trace of them, to know the die length and the track length ibside each pad.
1976  D_PAD* s_pad = NULL; // the pad on one end of the trace
1977  D_PAD* e_pad = NULL; // the pad on the other end of the trace
1978  int dist_fromstart = INT_MAX;
1979  int dist_fromend = INT_MAX;
1980 
1981  for( TRACK* track = firstTrack; track; track = track->Next() )
1982  {
1983  if( !track->GetState( BUSY ) )
1984  continue;
1985 
1986  layer_set = track->GetLayerSet();
1987  D_PAD * pad_on_start = GetPad( track->GetStart(), layer_set );
1988  D_PAD * pad_on_end = GetPad( track->GetEnd(), layer_set );
1989 
1990  // a segment fully inside a pad does not contribute to the track len
1991  // (an other track end inside this pad will contribute to this lenght)
1992  if( pad_on_start && ( pad_on_start == pad_on_end ) )
1993  continue;
1994 
1995  full_len += track->GetLength();
1996 
1997  if( pad_on_start == NULL && pad_on_end == NULL )
1998  // This most of time the case
1999  continue;
2000 
2001  // At this point, we can have one track end on a pad, or the 2 track ends on
2002  // 2 different pads.
2003  // We don't know what pad (s_pad or e_pad) must be used to store the
2004  // start point and the end point of the track, so if a pad is already set,
2005  // use the other
2006  if( pad_on_start )
2007  {
2008  SEG segm( track->GetStart(), pad_on_start->GetPosition() );
2009  int dist = segm.Length();
2010 
2011  if( s_pad == NULL )
2012  {
2013  dist_fromstart = dist;
2014  s_pad = pad_on_start;
2015  }
2016  else if( e_pad == NULL )
2017  {
2018  dist_fromend = dist;
2019  e_pad = pad_on_start;
2020  }
2021  else // Should not occur, at least for basic pads
2022  {
2023  // wxLogMessage( "BOARD::MarkTrace: multiple pad_on_start" );
2024  }
2025  }
2026 
2027  if( pad_on_end )
2028  {
2029  SEG segm( track->GetEnd(), pad_on_end->GetPosition() );
2030  int dist = segm.Length();
2031 
2032  if( s_pad == NULL )
2033  {
2034  dist_fromstart = dist;
2035  s_pad = pad_on_end;
2036  }
2037  else if( e_pad == NULL )
2038  {
2039  dist_fromend = dist;
2040  e_pad = pad_on_end;
2041  }
2042  else // Should not occur, at least for basic pads
2043  {
2044  // wxLogMessage( "BOARD::MarkTrace: multiple pad_on_end" );
2045  }
2046  }
2047  }
2048 
2049  if( aReorder )
2050  {
2051  DLIST<TRACK>* list = (DLIST<TRACK>*)firstTrack->GetList();
2052  wxASSERT( list );
2053 
2054  /* Rearrange the chain starting at firstTrack
2055  * All other BUSY flagged items are moved from their position to the end
2056  * of the flagged list
2057  */
2058  TRACK* next;
2059 
2060  for( TRACK* track = firstTrack->Next(); track; track = next )
2061  {
2062  next = track->Next();
2063 
2064  if( track->GetState( BUSY ) ) // move it!
2065  {
2066  busy_count++;
2067  track->UnLink();
2068  list->Insert( track, firstTrack->Next() );
2069 
2070  }
2071  }
2072  }
2073  else if( aTraceLength )
2074  {
2075  busy_count = 0;
2076 
2077  for( TRACK* track = firstTrack; track; track = track->Next() )
2078  {
2079  if( track->GetState( BUSY ) )
2080  {
2081  busy_count++;
2082  track->SetState( BUSY, false );
2083  }
2084  }
2085 
2086  DBG( printf( "%s: busy_count:%d\n", __func__, busy_count ); )
2087  }
2088 
2089  if( s_pad )
2090  {
2091  full_len += dist_fromstart;
2092  lenPadToDie += (double) s_pad->GetPadToDieLength();
2093  }
2094 
2095  if( e_pad )
2096  {
2097  full_len += dist_fromend;
2098  lenPadToDie += (double) e_pad->GetPadToDieLength();
2099  }
2100 
2101  if( aTraceLength )
2102  *aTraceLength = full_len;
2103 
2104  if( aPadToDieLength )
2105  *aPadToDieLength = lenPadToDie;
2106 
2107  if( aCount )
2108  *aCount = busy_count;
2109 
2110  return firstTrack;
2111 }
2112 
2113 
2114 MODULE* BOARD::GetFootprint( const wxPoint& aPosition, PCB_LAYER_ID aActiveLayer,
2115  bool aVisibleOnly, bool aIgnoreLocked )
2116 {
2117  MODULE* pt_module;
2118  MODULE* module = NULL;
2119  MODULE* alt_module = NULL;
2120  int min_dim = 0x7FFFFFFF;
2121  int alt_min_dim = 0x7FFFFFFF;
2122  bool current_layer_back = IsBackLayer( aActiveLayer );
2123 
2124  for( pt_module = m_Modules; pt_module; pt_module = pt_module->Next() )
2125  {
2126  // is the ref point within the module's bounds?
2127  if( !pt_module->HitTest( aPosition ) )
2128  continue;
2129 
2130  // if caller wants to ignore locked modules, and this one is locked, skip it.
2131  if( aIgnoreLocked && pt_module->IsLocked() )
2132  continue;
2133 
2134  PCB_LAYER_ID layer = pt_module->GetLayer();
2135 
2136  // Filter non visible modules if requested
2137  if( !aVisibleOnly || IsModuleLayerVisible( layer ) )
2138  {
2139  EDA_RECT bb = pt_module->GetFootprintRect();
2140 
2141  int offx = bb.GetX() + bb.GetWidth() / 2;
2142  int offy = bb.GetY() + bb.GetHeight() / 2;
2143 
2144  // off x & offy point to the middle of the box.
2145  int dist = ( aPosition.x - offx ) * ( aPosition.x - offx ) +
2146  ( aPosition.y - offy ) * ( aPosition.y - offy );
2147 
2148  if( current_layer_back == IsBackLayer( layer ) )
2149  {
2150  if( dist <= min_dim )
2151  {
2152  // better footprint shown on the active side
2153  module = pt_module;
2154  min_dim = dist;
2155  }
2156  }
2157  else if( aVisibleOnly && IsModuleLayerVisible( layer ) )
2158  {
2159  if( dist <= alt_min_dim )
2160  {
2161  // better footprint shown on the other side
2162  alt_module = pt_module;
2163  alt_min_dim = dist;
2164  }
2165  }
2166  }
2167  }
2168 
2169  if( module )
2170  {
2171  return module;
2172  }
2173 
2174  if( alt_module)
2175  {
2176  return alt_module;
2177  }
2178 
2179  return NULL;
2180 }
2181 
2182 
2183 BOARD_CONNECTED_ITEM* BOARD::GetLockPoint( const wxPoint& aPosition, LSET aLayerSet )
2184 {
2185  for( MODULE* module = m_Modules; module; module = module->Next() )
2186  {
2187  D_PAD* pad = module->GetPad( aPosition, aLayerSet );
2188 
2189  if( pad )
2190  return pad;
2191  }
2192 
2193  // No pad has been located so check for a segment of the trace.
2194  TRACK* segment = ::GetTrack( m_Track, NULL, aPosition, aLayerSet );
2195 
2196  if( !segment )
2197  segment = GetVisibleTrack( m_Track, aPosition, aLayerSet );
2198 
2199  return segment;
2200 }
2201 
2202 
2204 {
2205  /* creates an intermediate point on aSegment and break it into two segments
2206  * at aPosition.
2207  * The new segment starts from aPosition and ends at the end point of
2208  * aSegment. The original segment now ends at aPosition.
2209  */
2210  if( aSegment->GetStart() == aPosition || aSegment->GetEnd() == aPosition )
2211  return NULL;
2212 
2213  // A via is a good lock point
2214  if( aSegment->Type() == PCB_VIA_T )
2215  {
2216  aPosition = aSegment->GetStart();
2217  return aSegment;
2218  }
2219 
2220  // Calculation coordinate of intermediate point relative to the start point of aSegment
2221  wxPoint delta = aSegment->GetEnd() - aSegment->GetStart();
2222 
2223  // calculate coordinates of aPosition relative to aSegment->GetStart()
2224  wxPoint lockPoint = aPosition - aSegment->GetStart();
2225 
2226  // lockPoint must be on aSegment:
2227  // Ensure lockPoint.y/lockPoint.y = delta.y/delta.x
2228  if( delta.x == 0 )
2229  lockPoint.x = 0; // horizontal segment
2230  else
2231  lockPoint.y = KiROUND( ( (double)lockPoint.x * delta.y ) / delta.x );
2232 
2233  /* Create the intermediate point (that is to say creation of a new
2234  * segment, beginning at the intermediate point.
2235  */
2236  lockPoint += aSegment->GetStart();
2237 
2238  TRACK* newTrack = (TRACK*)aSegment->Clone();
2239  // The new segment begins at the new point,
2240  newTrack->SetStart(lockPoint);
2241  newTrack->start = aSegment;
2242  newTrack->SetState( BEGIN_ONPAD, false );
2243 
2244  DLIST<TRACK>* list = (DLIST<TRACK>*)aSegment->GetList();
2245  wxASSERT( list );
2246  list->Insert( newTrack, aSegment->Next() );
2247 
2248  if( aList )
2249  {
2250  // Prepare the undo command for the now track segment
2251  ITEM_PICKER picker( newTrack, UR_NEW );
2252  aList->PushItem( picker );
2253  // Prepare the undo command for the old track segment
2254  // before modifications
2255  picker.SetItem( aSegment );
2256  picker.SetStatus( UR_CHANGED );
2257  picker.SetLink( aSegment->Clone() );
2258  aList->PushItem( picker );
2259  }
2260 
2261  // Old track segment now ends at new point.
2262  aSegment->SetEnd(lockPoint);
2263  aSegment->end = newTrack;
2264  aSegment->SetState( END_ONPAD, false );
2265 
2266  D_PAD * pad = GetPad( newTrack, ENDPOINT_START );
2267 
2268  if( pad )
2269  {
2270  newTrack->start = pad;
2271  newTrack->SetState( BEGIN_ONPAD, true );
2272  aSegment->end = pad;
2273  aSegment->SetState( END_ONPAD, true );
2274  }
2275 
2276  aPosition = lockPoint;
2277  return newTrack;
2278 }
2279 
2280 
2281 ZONE_CONTAINER* BOARD::AddArea( PICKED_ITEMS_LIST* aNewZonesList, int aNetcode,
2282  PCB_LAYER_ID aLayer, wxPoint aStartPointPosition, int aHatch )
2283 {
2284  ZONE_CONTAINER* new_area = InsertArea( aNetcode,
2285  m_ZoneDescriptorList.size( ) - 1,
2286  aLayer, aStartPointPosition.x,
2287  aStartPointPosition.y, aHatch );
2288 
2289  if( aNewZonesList )
2290  {
2291  ITEM_PICKER picker( new_area, UR_NEW );
2292  aNewZonesList->PushItem( picker );
2293  }
2294 
2295  return new_area;
2296 }
2297 
2298 
2299 void BOARD::RemoveArea( PICKED_ITEMS_LIST* aDeletedList, ZONE_CONTAINER* area_to_remove )
2300 {
2301  if( area_to_remove == NULL )
2302  return;
2303 
2304  if( aDeletedList )
2305  {
2306  ITEM_PICKER picker( area_to_remove, UR_DELETED );
2307  aDeletedList->PushItem( picker );
2308  Remove( area_to_remove ); // remove from zone list, but does not delete it
2309  }
2310  else
2311  {
2312  Delete( area_to_remove );
2313  }
2314 }
2315 
2316 
2317 ZONE_CONTAINER* BOARD::InsertArea( int aNetcode, int aAreaIdx, PCB_LAYER_ID aLayer,
2318  int aCornerX, int aCornerY, int aHatch )
2319 {
2320  ZONE_CONTAINER* new_area = new ZONE_CONTAINER( this );
2321 
2322  new_area->SetNetCode( aNetcode );
2323  new_area->SetLayer( aLayer );
2324  new_area->SetTimeStamp( GetNewTimeStamp() );
2325 
2326  if( aAreaIdx < (int) ( m_ZoneDescriptorList.size() - 1 ) )
2327  m_ZoneDescriptorList.insert( m_ZoneDescriptorList.begin() + aAreaIdx + 1, new_area );
2328  else
2329  m_ZoneDescriptorList.push_back( new_area );
2330 
2331  new_area->SetHatchStyle( (ZONE_CONTAINER::HATCH_STYLE) aHatch );
2332 
2333  // Add the first corner to the new zone
2334  new_area->AppendCorner( wxPoint( aCornerX, aCornerY ), -1 );
2335 
2336  return new_area;
2337 }
2338 
2339 
2341 {
2342  // mark all areas as unmodified except this one, if modified
2343  for( unsigned ia = 0; ia < m_ZoneDescriptorList.size(); ia++ )
2344  m_ZoneDescriptorList[ia]->SetLocalFlags( 0 );
2345 
2346  aCurrArea->SetLocalFlags( 1 );
2347 
2348  if( aCurrArea->Outline()->IsSelfIntersecting() )
2349  {
2350  aCurrArea->UnHatch();
2351 
2352  // Normalize copied area and store resulting number of polygons
2353  int n_poly = aCurrArea->Outline()->NormalizeAreaOutlines();
2354 
2355  // If clipping has created some polygons, we must add these new copper areas.
2356  if( n_poly > 1 )
2357  {
2358  ZONE_CONTAINER* NewArea;
2359 
2360  // Move the newly created polygons to new areas, removing them from the current area
2361  for( int ip = 1; ip < n_poly; ip++ )
2362  {
2363  // Create new copper area and copy poly into it
2364  SHAPE_POLY_SET* new_p = new SHAPE_POLY_SET( aCurrArea->Outline()->UnitSet( ip ) );
2365  NewArea = AddArea( aNewZonesList, aCurrArea->GetNetCode(), aCurrArea->GetLayer(),
2366  wxPoint(0, 0), aCurrArea->GetHatchStyle() );
2367 
2368  // remove the poly that was automatically created for the new area
2369  // and replace it with a poly from NormalizeAreaOutlines
2370  delete NewArea->Outline();
2371  NewArea->SetOutline( new_p );
2372  NewArea->Hatch();
2373  NewArea->SetLocalFlags( 1 );
2374  }
2375 
2376  SHAPE_POLY_SET* new_p = new SHAPE_POLY_SET( aCurrArea->Outline()->UnitSet( 0 ) );
2377  delete aCurrArea->Outline();
2378  aCurrArea->SetOutline( new_p );
2379  }
2380  }
2381 
2382  aCurrArea->Hatch();
2383 
2384  return true;
2385 }
2386 
2387 
2388 void BOARD::ReplaceNetlist( NETLIST& aNetlist, bool aDeleteSinglePadNets,
2389  std::vector<MODULE*>* aNewFootprints, REPORTER* aReporter )
2390 {
2391  unsigned i;
2392  wxPoint bestPosition;
2393  wxString msg;
2394  std::vector<MODULE*> newFootprints;
2395 
2396  if( !IsEmpty() )
2397  {
2398  // Position new components below any existing board features.
2400 
2401  if( bbbox.GetWidth() || bbbox.GetHeight() )
2402  {
2403  bestPosition.x = bbbox.Centre().x;
2404  bestPosition.y = bbbox.GetBottom() + Millimeter2iu( 10 );
2405  }
2406  }
2407  else
2408  {
2409  // Position new components in the center of the page when the board is empty.
2410  wxSize pageSize = m_paper.GetSizeIU();
2411 
2412  bestPosition.x = pageSize.GetWidth() / 2;
2413  bestPosition.y = pageSize.GetHeight() / 2;
2414  }
2415 
2416  m_Status_Pcb = 0;
2417 
2418  for( i = 0; i < aNetlist.GetCount(); i++ )
2419  {
2420  COMPONENT* component = aNetlist.GetComponent( i );
2421  MODULE* footprint;
2422 
2423  if( aReporter )
2424  {
2425 
2426  msg.Printf( _( "Checking netlist component footprint \"%s:%s:%s\".\n" ),
2427  GetChars( component->GetReference() ),
2428  GetChars( component->GetTimeStamp() ),
2429  GetChars( component->GetFPID().Format() ) );
2430  aReporter->Report( msg, REPORTER::RPT_INFO );
2431  }
2432 
2433  if( aNetlist.IsFindByTimeStamp() )
2434  footprint = FindModule( aNetlist.GetComponent( i )->GetTimeStamp(), true );
2435  else
2436  footprint = FindModule( aNetlist.GetComponent( i )->GetReference() );
2437 
2438  if( footprint == NULL ) // A new footprint.
2439  {
2440  if( aReporter )
2441  {
2442  if( component->GetModule() != NULL )
2443  {
2444  msg.Printf( _( "Adding new component \"%s:%s\" footprint \"%s\".\n" ),
2445  GetChars( component->GetReference() ),
2446  GetChars( component->GetTimeStamp() ),
2447  GetChars( component->GetFPID().Format() ) );
2448 
2449  aReporter->Report( msg, REPORTER::RPT_ACTION );
2450  }
2451  else
2452  {
2453  msg.Printf( _( "Cannot add new component \"%s:%s\" due to missing "
2454  "footprint \"%s\".\n" ),
2455  GetChars( component->GetReference() ),
2456  GetChars( component->GetTimeStamp() ),
2457  GetChars( component->GetFPID().Format() ) );
2458 
2459  aReporter->Report( msg, REPORTER::RPT_ERROR );
2460  }
2461  }
2462 
2463  if( !aNetlist.IsDryRun() && (component->GetModule() != NULL) )
2464  {
2465  // Owned by NETLIST, can only copy it.
2466  footprint = new MODULE( *component->GetModule() );
2467  footprint->SetParent( this );
2468  footprint->SetPosition( bestPosition );
2469  footprint->SetTimeStamp( GetNewTimeStamp() );
2470  newFootprints.push_back( footprint );
2471  Add( footprint, ADD_APPEND );
2472  m_connectivity->Add( footprint );
2473  }
2474  }
2475  else // An existing footprint.
2476  {
2477  // Test for footprint change.
2478  if( !component->GetFPID().empty() &&
2479  footprint->GetFPID() != component->GetFPID() )
2480  {
2481  if( aNetlist.GetReplaceFootprints() )
2482  {
2483  if( aReporter )
2484  {
2485  if( component->GetModule() != NULL )
2486  {
2487  msg.Printf( _( "Replacing component \"%s:%s\" footprint \"%s\" with "
2488  "\"%s\".\n" ),
2489  GetChars( footprint->GetReference() ),
2490  GetChars( footprint->GetPath() ),
2491  GetChars( footprint->GetFPID().Format() ),
2492  GetChars( component->GetFPID().Format() ) );
2493 
2494  aReporter->Report( msg, REPORTER::RPT_ACTION );
2495  }
2496  else
2497  {
2498  msg.Printf( _( "Cannot replace component \"%s:%s\" due to missing "
2499  "footprint \"%s\".\n" ),
2500  GetChars( footprint->GetReference() ),
2501  GetChars( footprint->GetPath() ),
2502  GetChars( component->GetFPID().Format() ) );
2503 
2504  aReporter->Report( msg, REPORTER::RPT_ERROR );
2505  }
2506  }
2507 
2508  if( !aNetlist.IsDryRun() && (component->GetModule() != NULL) )
2509  {
2510  wxASSERT( footprint != NULL );
2511  MODULE* newFootprint = new MODULE( *component->GetModule() );
2512 
2513  if( aNetlist.IsFindByTimeStamp() )
2514  newFootprint->SetReference( footprint->GetReference() );
2515  else
2516  newFootprint->SetPath( footprint->GetPath() );
2517 
2518  // Copy placement and pad net names.
2519  // optionally, copy or not local settings (like local clearances)
2520  // if the second parameter is "true", previous values will be used.
2521  // if "false", the default library values of the new footprint
2522  // will be used
2523  footprint->CopyNetlistSettings( newFootprint, false );
2524 
2525  // Compare the footprint name only, in case the nickname is empty or in case
2526  // user moved the footprint to a new library. Chances are if footprint name is
2527  // same then the footprint is very nearly the same and the two texts should
2528  // be kept at same size, position, and rotation.
2529  if( newFootprint->GetFPID().GetLibItemName() == footprint->GetFPID().GetLibItemName() )
2530  {
2531  newFootprint->Reference().SetEffects( footprint->Reference() );
2532  newFootprint->Value().SetEffects( footprint->Value() );
2533  }
2534 
2535  m_connectivity->Remove( footprint );
2536  Remove( footprint );
2537 
2538  Add( newFootprint, ADD_APPEND );
2539  m_connectivity->Add( footprint );
2540 
2541  footprint = newFootprint;
2542  }
2543  }
2544  }
2545 
2546  // Test for reference designator field change.
2547  if( footprint->GetReference() != component->GetReference() )
2548  {
2549  if( aReporter )
2550  {
2551  msg.Printf( _( "Changing component \"%s:%s\" reference to \"%s\".\n" ),
2552  GetChars( footprint->GetReference() ),
2553  GetChars( footprint->GetPath() ),
2554  GetChars( component->GetReference() ) );
2555  aReporter->Report( msg, REPORTER::RPT_ACTION );
2556  }
2557 
2558  if( !aNetlist.IsDryRun() )
2559  footprint->SetReference( component->GetReference() );
2560  }
2561 
2562  // Test for value field change.
2563  if( footprint->GetValue() != component->GetValue() )
2564  {
2565  if( aReporter )
2566  {
2567  msg.Printf( _( "Changing component \"%s:%s\" value from \"%s\" to \"%s\".\n" ),
2568  GetChars( footprint->GetReference() ),
2569  GetChars( footprint->GetPath() ),
2570  GetChars( footprint->GetValue() ),
2571  GetChars( component->GetValue() ) );
2572  aReporter->Report( msg, REPORTER::RPT_ACTION );
2573  }
2574 
2575  if( !aNetlist.IsDryRun() )
2576  footprint->SetValue( component->GetValue() );
2577  }
2578 
2579  // Test for time stamp change.
2580  if( footprint->GetPath() != component->GetTimeStamp() )
2581  {
2582  if( aReporter )
2583  {
2584  msg.Printf( _( "Changing component path \"%s:%s\" to \"%s\".\n" ),
2585  GetChars( footprint->GetReference() ),
2586  GetChars( footprint->GetPath() ),
2587  GetChars( component->GetTimeStamp() ) );
2588  aReporter->Report( msg, REPORTER::RPT_INFO );
2589  }
2590 
2591  if( !aNetlist.IsDryRun() )
2592  footprint->SetPath( component->GetTimeStamp() );
2593  }
2594  }
2595 
2596  if( footprint == NULL )
2597  continue;
2598 
2599  // At this point, the component footprint is updated. Now update the nets.
2600  for( auto pad : footprint->Pads() )
2601  {
2602  COMPONENT_NET net = component->GetNet( pad->GetName() );
2603 
2604  if( !net.IsValid() ) // Footprint pad had no net.
2605  {
2606  if( aReporter && !pad->GetNetname().IsEmpty() )
2607  {
2608  msg.Printf( _( "Clearing component \"%s:%s\" pin \"%s\" net name.\n" ),
2609  GetChars( footprint->GetReference() ),
2610  GetChars( footprint->GetPath() ),
2611  GetChars( pad->GetName() ) );
2612  aReporter->Report( msg, REPORTER::RPT_ACTION );
2613  }
2614 
2615  if( !aNetlist.IsDryRun() )
2616  {
2617  m_connectivity->Remove( pad );
2618  pad->SetNetCode( NETINFO_LIST::UNCONNECTED );
2619  }
2620  }
2621  else // Footprint pad has a net.
2622  {
2623  if( net.GetNetName() != pad->GetNetname() )
2624  {
2625  if( aReporter )
2626  {
2627  msg.Printf( _( "Changing component \"%s:%s\" pin \"%s\" net name from "
2628  "\"%s\" to \"%s\".\n" ),
2629  GetChars( footprint->GetReference() ),
2630  GetChars( footprint->GetPath() ),
2631  GetChars( pad->GetName() ),
2632  GetChars( pad->GetNetname() ),
2633  GetChars( net.GetNetName() ) );
2634  aReporter->Report( msg, REPORTER::RPT_ACTION );
2635  }
2636 
2637  if( !aNetlist.IsDryRun() )
2638  {
2639  NETINFO_ITEM* netinfo = FindNet( net.GetNetName() );
2640 
2641  if( netinfo == NULL )
2642  {
2643  // It is a new net, we have to add it
2644  netinfo = new NETINFO_ITEM( this, net.GetNetName() );
2645  Add( netinfo );
2646  }
2647 
2648  m_connectivity->Remove( pad );
2649  pad->SetNetCode( netinfo->GetNet() );
2650  m_connectivity->Add( pad );
2651  }
2652  }
2653  }
2654  }
2655  }
2656 
2657  // Remove all components not in the netlist.
2658  if( aNetlist.GetDeleteExtraFootprints() )
2659  {
2660  MODULE* nextModule;
2661  const COMPONENT* component;
2662 
2663  for( MODULE* module = m_Modules; module != NULL; module = nextModule )
2664  {
2665  nextModule = module->Next();
2666 
2667  if( module->IsLocked() )
2668  continue;
2669 
2670  if( aNetlist.IsFindByTimeStamp() )
2671  component = aNetlist.GetComponentByTimeStamp( module->GetPath() );
2672  else
2673  component = aNetlist.GetComponentByReference( module->GetReference() );
2674 
2675  if( component == NULL )
2676  {
2677  if( aReporter )
2678  {
2679  msg.Printf( _( "Removing unused component \"%s:%s\".\n" ),
2680  GetChars( module->GetReference() ),
2681  GetChars( module->GetPath() ) );
2682  aReporter->Report( msg, REPORTER::RPT_ACTION );
2683  }
2684 
2685  if( !aNetlist.IsDryRun() )
2686  {
2687  m_connectivity->Remove( module );
2688  module->DeleteStructure();
2689  }
2690  }
2691  }
2692  }
2693 
2694  BuildListOfNets();
2695  std::vector<D_PAD*> padlist = GetPads();
2696  auto connAlgo = m_connectivity->GetConnectivityAlgo();
2697 
2698  // If needed, remove the single pad nets:
2699  if( aDeleteSinglePadNets && !aNetlist.IsDryRun() )
2700  {
2701  std::vector<unsigned int> padCount( connAlgo->NetCount() );
2702 
2703  for( const auto cnItem : connAlgo->PadList() )
2704  {
2705  int net = cnItem->Parent()->GetNetCode();
2706 
2707  if( net > 0 )
2708  ++padCount[net];
2709  }
2710 
2711  for( i = 0; i < (unsigned)connAlgo->NetCount(); ++i )
2712  {
2713  // First condition: only one pad in the net
2714  if( padCount[i] == 1 )
2715  {
2716  // Second condition, no zones attached to the pad
2717  D_PAD* pad = nullptr;
2718  int zoneCount = 0;
2719  const KICAD_T types[] = { PCB_PAD_T, PCB_ZONE_AREA_T, EOT };
2720  auto netItems = m_connectivity->GetNetItems( i, types );
2721 
2722  for( const auto item : netItems )
2723  {
2724  if( item->Type() == PCB_ZONE_AREA_T )
2725  {
2726  wxASSERT( !pad || pad->GetNet() == item->GetNet() );
2727  ++zoneCount;
2728  }
2729  else if( item->Type() == PCB_PAD_T )
2730  {
2731  wxASSERT( !pad );
2732  pad = static_cast<D_PAD*>( item );
2733  }
2734  }
2735 
2736  wxASSERT( pad ); // pad = 0 means the pad list is not up to date
2737 
2738  if( pad && zoneCount == 0 )
2739  {
2740  if( aReporter )
2741  {
2742  msg.Printf( _( "Remove single pad net \"%s\" on \"%s\" pad '%s'\n" ),
2743  GetChars( pad->GetNetname() ),
2744  GetChars( pad->GetParent()->GetReference() ),
2745  GetChars( pad->GetName() ) );
2746  aReporter->Report( msg, REPORTER::RPT_ACTION );
2747  }
2748 
2749  m_connectivity->Remove( pad );
2751  }
2752  }
2753  }
2754  }
2755 
2756  // Last step: Some tests:
2757  // verify all pads found in netlist:
2758  // They should exist in footprints, otherwise the footprint is wrong
2759  // note also references or time stamps are updated, so we use only
2760  // the reference to find a footprint
2761  //
2762  // Also verify if zones have acceptable nets, i.e. nets with pads.
2763  // Zone with no pad belongs to a "dead" net which happens after changes in schematic
2764  // when no more pad use this net name.
2765  if( aReporter )
2766  {
2767  wxString padname;
2768  for( i = 0; i < aNetlist.GetCount(); i++ )
2769  {
2770  const COMPONENT* component = aNetlist.GetComponent( i );
2771  MODULE* footprint = FindModuleByReference( component->GetReference() );
2772 
2773  if( footprint == NULL ) // It can be missing in partial designs
2774  continue;
2775 
2776  // Explore all pins/pads in component
2777  for( unsigned jj = 0; jj < component->GetNetCount(); jj++ )
2778  {
2779  COMPONENT_NET net = component->GetNet( jj );
2780  padname = net.GetPinName();
2781 
2782  if( footprint->FindPadByName( padname ) )
2783  continue; // OK, pad found
2784 
2785  // not found: bad footprint, report error
2786  msg.Printf( _( "Component '%s' pad '%s' not found in footprint '%s'\n" ),
2787  GetChars( component->GetReference() ),
2788  GetChars( padname ),
2789  GetChars( footprint->GetFPID().Format() ) );
2790  aReporter->Report( msg, REPORTER::RPT_ERROR );
2791  }
2792  }
2793 
2794  // Test copper zones to detect "dead" nets (nets without any pad):
2795  for( int ii = 0; ii < GetAreaCount(); ii++ )
2796  {
2797  ZONE_CONTAINER* zone = GetArea( ii );
2798 
2799  if( !zone->IsOnCopperLayer() || zone->GetIsKeepout() )
2800  continue;
2801 
2802  if( m_connectivity->GetPadCount( zone->GetNetCode() ) == 0 )
2803  {
2804  msg.Printf( _( "Copper zone (net name '%s'): net has no pads connected." ),
2805  GetChars( zone->GetNet()->GetNetname() ) );
2806  aReporter->Report( msg, REPORTER::RPT_WARNING );
2807  }
2808  }
2809  }
2810 
2811  m_connectivity->RecalculateRatsnest();
2812 
2813  std::swap( newFootprints, *aNewFootprints );
2814 }
2815 
2816 
2818  bool aAddToBoard )
2819 {
2820  BOARD_ITEM* new_item = NULL;
2821 
2822  switch( aItem->Type() )
2823  {
2824  case PCB_MODULE_T:
2825  case PCB_TEXT_T:
2826  case PCB_LINE_T:
2827  case PCB_TRACE_T:
2828  case PCB_VIA_T:
2829  case PCB_ZONE_AREA_T:
2830  case PCB_TARGET_T:
2831  case PCB_DIMENSION_T:
2832  new_item = static_cast<BOARD_ITEM*>( aItem->Clone() );
2833  break;
2834 
2835  default:
2836  // Un-handled item for duplication
2837  new_item = NULL;
2838  break;
2839  }
2840 
2841  if( new_item && aAddToBoard )
2842  Add( new_item );
2843 
2844  return new_item;
2845 }
2846 
2847 
2848 /* Extracts the board outlines and build a closed polygon
2849  * from lines, arcs and circle items on edge cut layer
2850  * Any closed outline inside the main outline is a hole
2851  * All contours should be closed, i.e. are valid vertices for a closed polygon
2852  * return true if success, false if a contour is not valid
2853  */
2854 extern bool BuildBoardPolygonOutlines( BOARD* aBoard,
2855  SHAPE_POLY_SET& aOutlines,
2856  wxString* aErrorText );
2857 
2858 
2860  wxString* aErrorText )
2861 {
2862  bool success = BuildBoardPolygonOutlines( this, aOutlines, aErrorText );
2863 
2864  // Make polygon strictly simple to avoid issues (especially in 3D viewer)
2866 
2867  return success;
2868 
2869 }
2870 
2871 
2872 const std::vector<D_PAD*> BOARD::GetPads()
2873 {
2874  std::vector<D_PAD*> rv;
2875  for ( auto mod: Modules() )
2876  {
2877  for ( auto pad: mod->Pads() )
2878  rv.push_back ( pad );
2879 
2880  }
2881 
2882  return rv;
2883 }
2884 
2885 
2886 unsigned BOARD::GetPadCount() const
2887 {
2888  return m_connectivity->GetPadCount();
2889 }
2890 
2891 
2896 D_PAD* BOARD::GetPad( unsigned aIndex ) const
2897 {
2898  unsigned count = 0;
2899 
2900  for( MODULE* mod = m_Modules; mod ; mod = mod->Next() ) // FIXME: const DLIST_ITERATOR
2901  {
2902  for( D_PAD* pad = mod->PadsList(); pad; pad = pad->Next() )
2903  {
2904  if( count == aIndex )
2905  return pad;
2906 
2907  count++;
2908  }
2909  }
2910 
2911  return nullptr;
2912 }
2913 
2915 {
2916  for ( auto zone : Zones() )
2917  zone->SetNetCode( 0 );
2918 
2919  for ( auto mod : Modules() )
2920  for ( auto pad : mod->Pads() )
2921  pad->SetNetCode( 0 );
2922 
2923  for ( auto track : Tracks() )
2924  track->SetNetCode( 0 );
2925 
2926 }
Definition: colors.h:57
DHEAD * GetList() const
Definition: base_struct.h:223
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:646
CITER next(CITER it)
Definition: ptree.cpp:130
KICAD_T Type() const
Function Type()
Definition: base_struct.h:212
#define DIM(x)
of elements in an array
Definition: macros.h:98
Wrapper class, so you can iterate through NETINFO_ITEM*s, not std::pair
const wxString & GetPinName() const
Definition: pcb_netlist.h:61
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
void BuildListOfNets()
Definition: class_board.h:722
void Draw(EDA_DRAW_PANEL *panel, wxDC *DC, GR_DRAWMODE aDrawMode, const wxPoint &offset=ZeroOffset) override
Function Draw Draws the zone outline.
Definition: class_zone.cpp:283
void SetEnabledLayers(LSET aMask)
Function SetEnabledLayers changes the bit-mask of enabled layers.
Class ZONE_CONTAINER handles a list of polygons defining a copper zone.
Definition: class_zone.h:78
static SEARCH_RESULT IterateForward(EDA_ITEM *listStart, INSPECTOR inspector, void *testData, const KICAD_T scanTypes[])
Function IterateForward walks through the object tree calling the inspector() on each object type req...
TRACK * CreateLockPoint(wxPoint &aPosition, TRACK *aSegment, PICKED_ITEMS_LIST *aList)
Function CreateLockPoint creates an intermediate point on aSegment and break it into two segments at ...
TRACK * GetTrack(TRACK *aStartTrace, const TRACK *aEndTrace, const wxPoint &aPosition, LSET aLayerMask)
Function GetTrack is a helper function to locate a trace segment having an end point at aPosition on ...
Definition: class_track.cpp:67
TEXTE_MODULE & Reference()
Definition: class_module.h:463
bool empty() const
Function empty.
Definition: lib_id.h:198
Class that draws missing connections on a PCB.
int GetCurrentViaDrill() const
Function GetCurrentViaDrill.
void DeleteZONEOutlines()
Function DeleteZONEOutlines deletes ALL zone outlines from the board.
int GetVisibleElements() const
Function GetVisibleElements returns a bit-mask of all the element categories that are visible...
Definition: typeinfo.h:97
const LIB_ID & GetFPID() const
Definition: pcb_netlist.h:164
PCB_TARGET class definition.
std::function< SEARCH_RESULT(EDA_ITEM *aItem, void *aTestData) > INSPECTOR_FUNC
Typedef INSPECTOR is used to inspect and possibly collect the (search) results of iterating over a li...
Definition: base_struct.h:93
NETCLASSPTR GetDefault() const
Function GetDefault.
void Merge(const EDA_RECT &aRect)
Function Merge modifies the position and size of the rectangle in order to contain aRect...
void SetElementVisibility(GAL_LAYER_ID aLayer, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
T * Remove(T *aElement)
Function Remove removes aElement from the list, but does not delete it.
Definition: dlist.h:211
TEXTE_PCB class definition.
static const KICAD_T Tracks[]
A scan list for only TRACKS.
Definition: collectors.h:285
#define END_ONPAD
Pcbnew: flag set for track segment ending on a pad.
Definition: base_struct.h:147
unsigned GetUnconnectedNetCount() const
Function GetUnconnectedNetCount.
virtual LSET GetLayerSet() const override
Function GetLayerSet returns a "layer mask", which is a bitmap of all layers on which the TRACK segme...
static int KiROUND(double v)
KiROUND rounds a floating point number to an int using "round halfway cases away from zero"...
Definition: common.h:107
wxString m_name
The name of the layer, there should be no spaces in this name.
Definition: class_board.h:111
void PadDelete(D_PAD *aPad)
Function PadDelete deletes a given bad from the BOARD by removing it from its module and from the m_N...
void PushFront(T *aNewElement)
Function PushFront puts aNewElement at front of list sequence.
Definition: dlist.h:240
void SetVisibleElements(int aMask)
Function SetVisibleElements is a proxy function that calls the correspondent function in m_BoardSetti...
Implementation of conversion functions that require both schematic and board internal units...
Class BOARD_ITEM is a base class for any item which can be embedded within the BOARD container class...
static void removeTrack(TRACKS *aList, TRACK *aOneToRemove)
Function removeTrack removes aOneToRemove from aList, which is a non-owning std::vector.
void SetEnd(const wxPoint &aEnd)
Definition: class_track.h:117
bool GetBoardPolygonOutlines(SHAPE_POLY_SET &aOutlines, wxString *aErrorText=NULL)
Function GetBoardPolygonOutlines Extracts the board outlines and build a closed polygon from lines...
const EDA_RECT GetBoundingBox() const override
Function GetBoundingBox (virtual)
Definition: class_zone.cpp:525
D_PAD * GetPadFast(const wxPoint &aPosition, LSET aLayerMask)
Function GetPadFast return pad found at aPosition on aLayerMask using the fast search method...
virtual EDA_ITEM * Clone() const
Function Clone creates a duplicate of this item with linked list members set to NULL.
static void otherEnd(const TRACK &aTrack, const wxPoint &aNotThisEnd, wxPoint *aOtherEnd)
virtual PCB_LAYER_ID GetLayer() const
Function GetLayer returns the primary layer this item is on.
PAGE_INFO m_paper
Definition: class_board.h:196
void SetStatus(UNDO_REDO_T aStatus)
EDA_RECT ComputeBoundingBox(bool aBoardEdgesOnly=false) const
Function ComputeBoundingBox calculates the bounding box containing all board items (or board edge seg...
TRACKS TracksInNetBetweenPoints(const wxPoint &aStartPos, const wxPoint &aGoalPos, int aNetCode)
Function TrackInNetBetweenPoints collects all the TRACKs and VIAs that are members of a net given by ...
MODULE * GetModule(bool aRelease=false)
Definition: pcb_netlist.h:177
bool IsBackLayer(PCB_LAYER_ID aLayerId)
Layer classification: check if it's a back layer.
void SetCustomViaDrill(int aDrill)
Function SetCustomViaDrill Sets custom size for via drill (i.e.
int GetPadToDieLength() const
Definition: class_pad.h:401
Class BOARD to handle a board.
void DrawFilledArea(EDA_DRAW_PANEL *panel, wxDC *DC, GR_DRAWMODE aDrawMode, const wxPoint &offset=ZeroOffset)
Function DrawDrawFilledArea Draws the filled area for this zone (polygon list .m_FilledPolysList) ...
Definition: class_zone.cpp:413
bool IsLayerEnabled(PCB_LAYER_ID aLayer) const
Function IsLayerEnabled is a proxy function that calls the correspondent function in m_BoardSettings ...
Definition: class_board.h:439
Class that computes missing connections on a PCB.
LAYER_T m_type
The type of the layer.
Definition: class_board.h:113
D_PAD * FindPadByName(const wxString &aPadName) const
Function FindPadByName returns a D_PAD* with a matching name.
MODULE * Next() const
Definition: class_module.h:100
void GetSortedPadListByXthenYCoord(std::vector< D_PAD * > &aVector, int aNetCode=-1)
Function GetSortedPadListByXthenYCoord first empties then fills the vector with all pads and sorts th...
NETINFO_ITEM * GetNetItem(int aNetCode) const
Function GetItem.
MODULE * GetParent() const
Definition: class_pad.h:162
COLORS_DESIGN_SETTINGS * m_colorsSettings
Definition: class_board.h:195
int NormalizeAreaOutlines()
Function NormalizeAreaOutlines Convert a self-intersecting polygon to one (or more) non self-intersec...
int GetCopperLayerCount() const
Function GetCopperLayerCount.
class ZONE_CONTAINER, a zone area
Definition: typeinfo.h:114
virtual PCB_LAYER_ID GetLayer() const override
Function GetLayer returns the primary layer this item is on.
Definition: class_zone.cpp:182
std::list< TRACK * > GetTracksByPosition(const wxPoint &aPosition, PCB_LAYER_ID aLayer=PCB_LAYER_ID(-1)) const
Function GetTracksByPosition finds the list of tracks that starts or ends at aPosition on aLayer...
static const int dist[10][10]
Definition: dist.cpp:57
ZONE_CONTAINER * m_CurrentZoneContour
zone contour currently in progress
Definition: class_board.h:259
show modules on back
time_t GetNewTimeStamp()
Definition: common.cpp:166
DLIST_ITERATOR_WRAPPER< D_PAD > Pads()
Definition: class_module.h:140
unsigned GetNetCount() const
Function GetNetCount.
int GetHeight() const
SHAPE_POLY_SET * Outline()
Definition: class_zone.h:262
void DeleteStructure()
Function DeleteStructure deletes this object after UnLink()ing it from its owner if it has one...
GAL_LAYER_ID
GAL layers are "virtual" layers, i.e.
void SetCopperLayerCount(int aCount)
virtual EDA_ITEM * Clone() const override
Function Clone creates a duplicate of this item with linked list members set to NULL.
class TEXTE_PCB, text on a layer
Definition: typeinfo.h:104
void RemoveArea(PICKED_ITEMS_LIST *aDeletedList, ZONE_CONTAINER *area_to_remove)
Function RemoveArea remove copper area from net, and put it in a deleted list (if exists) ...
MODULE * FindModuleByReference(const wxString &aReference) const
Function FindModuleByReference searches for a MODULE within this board with the given reference desig...
Classes to handle copper zones.
const wxString & GetValue() const
Function GetValue.
Definition: class_module.h:447
DLIST< SEGZONE > m_Zone
Definition: class_board.h:247
void SetVisibleAlls()
Function SetVisibleAlls changes the bit-mask of visible element categories and layers.
void PushItem(const ITEM_PICKER &aItem)
Function PushItem pushes aItem to the top of the list.
class D_PAD, a pad in a footprint
Definition: typeinfo.h:102
D_PAD * GetPad(unsigned aIndex) const
Function GetPad.
#define BUSY
Pcbnew: flag indicating that the structure has.
Definition: base_struct.h:148
virtual void SetPosition(const wxPoint &aPos) override
bool IsValid() const
Definition: pcb_netlist.h:65
This is the end of the layers used for visibility bitmasks in Pcbnew There can be at most 32 layers a...
MODULE * FindModule(const wxString &aRefOrTimeStamp, bool aSearchByTimeStamp=false) const
Function FindModule searches for a module matching aRefOrTimeStamp depending on the state of aSearchB...
bool SetLayerType(PCB_LAYER_ID aLayer, LAYER_T aLayerType)
Function SetLayerType changes the type of the layer given by aLayer.
HIGH_LIGHT_INFO m_highLight
Definition: class_board.h:186
NETINFO_LIST m_NetInfo
net info list (name, design constraints ..
Definition: class_board.h:199
bool IsLayerVisible(PCB_LAYER_ID aLayerId) const
Function IsLayerVisible tests whether a given layer is visible.
Class REPORTER is a pure virtual class used to derive REPORTER objects from.
Definition: reporter.h:61
HIGH_LIGHT_INFO m_highLightPrevious
Definition: class_board.h:187
int GetVisibleElements() const
Function GetVisibleElements is a proxy function that calls the correspondent function in m_BoardSetti...
virtual void UnLink()
Function UnLink detaches this object from its owner.
int GetState(int type) const
Definition: base_struct.h:251
#define cu(a)
Definition: auxiliary.h:88
#define BEGIN_ONPAD
Pcbnew: flag set for track segment starting on a pad.
Definition: base_struct.h:146
int GetCurrentViaSize() const
Function GetCurrentViaSize.
Class BOARD_CONNECTED_ITEM is a base class derived from BOARD_ITEM for items that can be connected an...
LSET GetEnabledLayers() const
Function GetEnabledLayers is a proxy function that calls the corresponding function in m_BoardSetting...
void SetLink(EDA_ITEM *aItem)
wxString GetLayerName() const
Function GetLayerName returns the name of the PCB layer on which the item resides.
class EDGE_MODULE, a footprint edge
Definition: typeinfo.h:106
static COLORS_DESIGN_SETTINGS dummyColorsSettings(FRAME_PCB)
void SetOutline(SHAPE_POLY_SET *aOutline)
Definition: class_zone.h:265
BOARD_CONNECTED_ITEM * GetLockPoint(const wxPoint &aPosition, LSET aLayerMask)
Function GetLockPoint returns the item at the "attachment" point at the end of a trace at aPosition o...
static const int delta[8][2]
Definition: solve.cpp:112
const wxPoint & GetEnd() const
Definition: class_track.h:118
void SetCustomViaSize(int aSize)
Function SetCustomViaSize Sets custom size for via diameter (i.e.
static int find_vias_and_tracks_at(TRACKS &at_next, TRACKS &in_net, LSET &lset, const wxPoint &next)
Function find_vias_and_tracks_at collects TRACKs and VIAs at aPos and returns the track_count which e...
search types array terminator (End Of Types)
Definition: typeinfo.h:94
KICAD_T
Enum KICAD_T is the set of class identification values, stored in EDA_ITEM::m_StructType.
Definition: typeinfo.h:90
static wxPoint ZeroOffset
A value of wxPoint(0,0) which can be passed to the Draw() functions.
static std::string FormatInternalUnits(int aValue)
Function FormatInternalUnits converts aValue from board internal units to a string appropriate for wr...
void SetTimeStamp(time_t aNewTimeStamp)
Definition: base_struct.h:217
Functions relatives to tracks, vias and segments used to fill zones.
class TRACK, a track segment (segment on a copper layer)
Definition: typeinfo.h:107
ENDPOINT_T
Flag used in locate routines (from which endpoint work)
Definition: pcbnew.h:54
static const char * ShowType(LAYER_T aType)
Function ShowType converts a LAYER_T enum to a const char*.
ZONE_CONTAINER * HitTestForAnyFilledArea(const wxPoint &aRefPos, PCB_LAYER_ID aStartLayer, PCB_LAYER_ID aEndLayer, int aNetCode)
Function HitTestForAnyFilledArea tests if the given wxPoint is within the bounds of a filled area of ...
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
void PushBack(T *aNewElement)
Function PushBack puts aNewElement at the end of the list sequence.
Definition: dlist.h:250
SEGZONE * Next() const
Definition: class_track.h:358
const EDA_RECT GetBoardEdgesBoundingBox() const
Function GetBoardEdgesBoundingBox Returns the board bounding box calculated using exclusively the boa...
Definition: class_board.h:797
void AppendNet(NETINFO_ITEM *aNewElement)
Function AppendNet adds aNewElement to the end of the net list.
bool GetIsKeepout() const
Accessors to parameters used in Keepout zones:
Definition: class_zone.h:672
show modules on front
int StrPrintf(std::string *result, const char *format,...)
Function StrPrintf is like sprintf() but the output is appended to a std::string instead of to a char...
Definition: richio.cpp:75
const wxString & GetReference() const
Definition: pcb_netlist.h:149
BOARD_ITEM * Next() const
Class that handles properties and drawing of worksheet layout.
Class COMPONENT_NET is used to store the component pin name to net name associations stored in a netl...
Definition: pcb_netlist.h:48
const INSPECTOR_FUNC & INSPECTOR
Definition: base_struct.h:118
const LIB_ID & GetFPID() const
Definition: class_module.h:164
SEARCH_RESULT Visit(INSPECTOR inspector, void *testData, const KICAD_T scanTypes[]) override
Function Visit may be re-implemented for each derived class in order to handle all the types given by...
const wxString & GetValue() const
Definition: pcb_netlist.h:151
DIMENSION class definition.
VIA * GetVia(const wxPoint &aPosition, PCB_LAYER_ID aLayer=UNDEFINED_LAYER)
Function GetVia finds the first VIA object at aPosition on aLayer starting at the trace...
class MODULE, a footprint
Definition: typeinfo.h:101
Markers used to show a drc problem on boards.
PCB_LAYER_ID
A quick note on layer IDs:
bool GetDeleteExtraFootprints() const
Definition: pcb_netlist.h:296
ZONE_CONTAINER * InsertArea(int aNetcode, int aAreaIdx, PCB_LAYER_ID aLayer, int aCornerX, int aCornerY, int aHatch)
Add a copper area to net, inserting after m_ZoneDescriptorList[aAreaIdx].
void RemoveNet(NETINFO_ITEM *aNet)
Function RemoveNet Removes a new from the net list.
Class LSET is a set of PCB_LAYER_IDs.
void PopHighLight()
Function PopHighLight retrieve a previously saved high light info.
int GetCopperLayerCount() const
Function GetCopperLayerCount.
void ReplaceNetlist(NETLIST &aNetlist, bool aDeleteSinglePadNets, std::vector< MODULE * > *aNewFootprints, REPORTER *aReporter=NULL)
Function ReplaceNetlist updates the BOARD according to aNetlist.
Classes used in Pcbnew, CvPcb and GerbView.
bool GetReplaceFootprints() const
Definition: pcb_netlist.h:311
Class NETLIST stores all of information read from a netlist along with the flags used to update the N...
Definition: pcb_netlist.h:205
DLIST_ITERATOR_WRAPPER< MODULE > Modules()
Definition: class_board.h:250
virtual const wxString Problem() const
what was the problem?
Definition: exceptions.cpp:49
bool NormalizeAreaPolygon(PICKED_ITEMS_LIST *aNewZonesList, ZONE_CONTAINER *aCurrArea)
Function NormalizeAreaPolygon Process an area that has been modified, by normalizing its polygon agai...
void DeleteMARKERs()
Function DeleteMARKERs deletes ALL MARKERS from the board.
ZONE_CONTAINER * AddArea(PICKED_ITEMS_LIST *aNewZonesList, int aNetcode, PCB_LAYER_ID aLayer, wxPoint aStartPointPosition, int aHatch)
Function AddArea Add an empty copper area to board areas list.
void SetParent(EDA_ITEM *aParent)
Definition: base_struct.h:227
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
GR_DRAWMODE
Drawmode. Compositing mode plus a flag or two.
Definition: gr_basic.h:41
virtual void Move(const wxPoint &aMoveVector)
Function Move move this object.
Class SHAPE_POLY_SET.
TEXTE_MODULE & Value()
read/write accessors:
Definition: class_module.h:462
void SetVisibleLayers(LSET aLayerMask)
Function SetVisibleLayers is a proxy function that calls the correspondent function in m_BoardSetting...
SHAPE_LINE_CHAIN & Outline(int aIndex)
Returns the reference to aIndex-th outline in the set
EDA_RECT GetFootprintRect() const
Function GetFootprintRect() Returns the area of the module footprint excluding any text...
#define IS_DELETED
Definition: base_struct.h:130
const UTF8 & GetLibItemName() const
Function GetLibItemName.
Definition: lib_id.h:129
Class PAGE_INFO describes the page size and margins of a paper page on which to eventually print or p...
bool IsEmpty() const
Definition: class_board.h:268
const wxPoint & GetStart() const
Definition: class_track.h:121
const wxPoint & GetPosition() const override
Definition: class_pad.h:220
bool sortPadsByXthenYCoord(D_PAD *const &ref, D_PAD *const &comp)
Function SortPadsByXCoord is used by GetSortedPadListByXCoord to Sort a pad list by x coordinate valu...
LAYER_T
Enum LAYER_T gives the allowed types of layers, same as Specctra DSN spec.
Definition: class_board.h:71
LSET GetLayerSet() const override
Function GetLayerSet returns a "layer mask", which is a bitmap of all layers on which the TRACK segme...
Definition: class_pad.h:395
bool SetLayerName(PCB_LAYER_ID aLayer, const wxString &aLayerName)
Function SetLayerName changes the name of the layer given by aLayer.
const wxPoint & GetEndPoint(ENDPOINT_T aEndPoint) const
Return the selected endpoint (start or end)
Definition: class_track.h:125
void Add(BOARD_ITEM *aItem, ADD_MODE aMode=ADD_INSERT) override
Adds an item to the container.
const wxString & GetNetName() const
Definition: pcb_netlist.h:63
bool SetLayerDescr(PCB_LAYER_ID aIndex, const LAYER &aLayer)
Function SetLayerDescr returns the type of the copper layer given by aLayer.
bool IsFindByTimeStamp() const
Definition: pcb_netlist.h:304
virtual LSET GetLayerSet() const
Function GetLayerSet returns a "layer mask", which is a bitmap of all layers on which the TRACK segme...
int SortedNetnamesList(wxArrayString &aNames, bool aSortbyPadsCount)
Function SortedNetnamesList.
virtual void SetLayer(PCB_LAYER_ID aLayer) override
Function SetLayer sets the layer this item is on.
Definition: class_zone.cpp:209
DLIST< BOARD_ITEM > m_Drawings
Definition: class_board.h:241
bool SetNetCode(int aNetCode, bool aNoAssert=false)
Function SetNetCode sets net using a net code.
const wxString & GetName() const
Definition: class_pad.h:190
Definition: colors.h:60
TRACK * GetVisibleTrack(TRACK *aStartingTrace, const wxPoint &aPosition, LSET aLayerSet) const
Function GetVisibleTrack finds the neighboring visible segment of aTrace at aPosition that is on a la...
void Simplify(POLYGON_MODE aFastMode)
Simplifies the polyset (merges overlapping polys, eliminates degeneracy/self-intersections) For aFast...
void SetReference(const wxString &aReference)
Function SetReference.
Definition: class_module.h:429
class SEGZONE, a segment used to fill a zone area (segment on a copper layer)
Definition: typeinfo.h:109
int SetAreasNetCodesFromNetNames(void)
Function SetAreasNetCodesFromNetNames Set the .m_NetCode member of all copper areas, according to the area Net Name The SetNetCodesFromNetNames is an equivalent to net name, for fast comparisons.
int GetAreaCount() const
Function GetAreaCount.
Definition: class_board.h:1011
void BuildConnectivity()
Builds or rebuilds the board connectivity database for the board, especially the list of connected it...
const wxString & GetTimeStamp() const
Definition: pcb_netlist.h:168
MARKERS m_markers
MARKER_PCBs for clearance problems, owned by pointer.
Definition: class_board.h:178
int GetBottom() const
HATCH_STYLE
Zone hatch styles.
Definition: class_zone.h:85
wxPoint Centre() const
TRACK * MarkTrace(TRACK *aTrace, int *aCount, double *aTraceLength, double *aInPackageLength, bool aReorder)
Function MarkTrace marks a chain of trace segments, connected to aTrace.
void SetPosition(const wxPoint &aPos) override
Class PICKED_ITEMS_LIST is a holder to handle information on schematic or board items.
int GetNet() const
Function GetNet.
static LAYER_T ParseType(const char *aType)
Function ParseType converts a string to a LAYER_T.
void SetItem(EDA_ITEM *aItem)
class DIMENSION, a dimension (graphic item)
Definition: typeinfo.h:112
bool IsLocked() const override
Function IsLocked.
Definition: class_module.h:236
unsigned GetPadCount() const
Function GetPadCount.
bool IsElementVisible(GAL_LAYER_ID aElementCategory) const
Function IsElementVisible tests whether a given element category is visible.
int GetNumSegmTrack() const
Functions to get some items count.
void SetCustomTrackWidth(int aWidth)
Function SetCustomTrackWidth Sets custom width for track (i.e.
Class LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
const PCB_LAYER_ID GetLayerID(const wxString &aLayerName) const
Function GetLayerID returns the ID of a layer given by aLayerName.
class PCB_TARGET, a target (graphic item)
Definition: typeinfo.h:113
int LAYER_NUM
Type LAYER_NUM can be replaced with int and removed.
Class COMPONENT is used to store components and all of their related information found in a netlist...
Definition: pcb_netlist.h:83
static bool sortNetsByNames(const NETINFO_ITEM *a, const NETINFO_ITEM *b)
TRACKS TracksInNet(int aNetCode)
Function TrackInNet collects all the TRACKs and VIAs that are members of a net given by aNetCode...
int GetNetCode() const
Function GetNetCode.
class TEXTE_MODULE, text in a footprint
Definition: typeinfo.h:105
COMPONENT * GetComponent(unsigned aIndex)
Function GetComponent returns the COMPONENT at aIndex.
Definition: pcb_netlist.h:256
Definition: seg.h:37
void Move(const wxPoint &aMoveVector) override
Function Move move this object.
VIA * GetViaByPosition(const wxPoint &aPosition, PCB_LAYER_ID aLayer=PCB_LAYER_ID(-1)) const
Function GetViaByPosition finds the first via at aPosition on aLayer.
const std::vector< D_PAD * > GetPads()
Function GetPads returns a reference to a list of all the pads.
Class NETINFO_ITEM handles the data for a net.
Definition: class_netinfo.h:69
bool IsElementVisible(GAL_LAYER_ID aLayer) const
Function IsElementVisible tests whether a given element category is visible.
bool IsOnCopperLayer() const
Function IsOnCopperLayer.
Definition: class_zone.cpp:188
iterator begin() const
TRACK * GetBestInsertPoint(BOARD *aPcb)
Function GetBestInsertPoint searches the "best" insertion point within the track linked list...
class MARKER_PCB, a marker used to show something
Definition: typeinfo.h:111
ZONE_CONTAINERS & Zones()
Definition: class_board.h:252
bool SetCurrentNetClass(const wxString &aNetClassName)
Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter ...
TRACK * Next() const
Definition: class_track.h:98
static const wxChar * GetChars(const wxString &s)
Function GetChars returns a wxChar* to the actual wxChar* data within a wxString, and is helpful for ...
Definition: macros.h:92
const wxString & GetNetname() const
Function GetNetname.
void SetState(int type, int state)
Definition: base_struct.h:256
ZONE_CONTAINER * GetArea(int index) const
Function GetArea returns the Area (Zone Container) at a given index.
Definition: class_board.h:982
void UnHatch()
Function UnHatch clears the zone's hatch.
SHAPE_POLY_SET UnitSet(int aPolygonIndex)
Class to handle a graphic segment.
void Format(OUTPUTFORMATTER *out, int aNestLevel, int aCtl, CPTREE &aTree)
Function Format outputs a PTREE into s-expression format via an OUTPUTFORMATTER derivative.
Definition: ptree.cpp:205
BOARD * GetParent() const
int m_fileFormatVersionAtLoad
the version loaded from the file
Definition: class_board.h:189
iterator end() const
static NETINFO_ITEM ORPHANED_ITEM
NETINFO_ITEM meaning that there was no net assigned for an item, as there was no board storing net li...
Class LAYER holds information pertinent to a layer of a BOARD.
Definition: class_board.h:85
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:169
const wxString & GetReference() const
Function GetReference.
Definition: class_module.h:419
unsigned GetNodesCount() const
Function GetNodesCount.
DLIST< MODULE > m_Modules
Definition: class_board.h:245
void RedrawFilledAreas(EDA_DRAW_PANEL *aPanel, wxDC *aDC, GR_DRAWMODE aDrawMode, PCB_LAYER_ID aLayer)
Function RedrawFilledAreas Redraw all filled areas on layer aLayer ( redraw all if aLayer < 0 ) ...
LSET GetVisibleLayers() const
Function GetVisibleLayers is a proxy function that calls the correspondent function in m_BoardSetting...
ZONE_CONTAINERS m_ZoneDescriptorList
edge zone descriptors, owned by pointer.
Definition: class_board.h:181
class NETINFO_ITEM, a description of a net
Definition: typeinfo.h:116
LAYER m_Layer[PCB_LAYER_ID_COUNT]
Definition: class_board.h:183
std::shared_ptr< CONNECTIVITY_DATA > m_connectivity
Definition: class_board.h:191
bool HitTestFilledArea(const wxPoint &aRefPos) const
Function HitTestFilledArea tests if the given wxPoint is within the bounds of a filled area of this z...
Definition: class_zone.cpp:814
int GetNumSegmZone() const
Calculate the zone segment count.
Class EDA_RECT handles the component boundary box.
void SetValue(const wxString &aValue)
Function SetValue.
Definition: class_module.h:456
int GetX() const
HATCH_STYLE GetHatchStyle() const
Definition: class_zone.h:564
void Hatch()
Function Hatch computes the hatch lines depending on the hatch parameters and stores it in the zone's...
void chainMarkedSegments(wxPoint aPosition, const LSET &aLayerSet, TRACKS *aList)
Function chainMarkedSegments is used by MarkTrace() to set the BUSY flag of connected segments of the...
void PushHighLight()
Function PushHighLight save current high light info for later use.
NETINFO_ITEM * FindNet(int aNetcode) const
Function FindNet searches for a net with the given netcode.
void SetHatchStyle(HATCH_STYLE aStyle)
Definition: class_zone.h:569
Class EDA_ITEM is a base class for most all the KiCad significant classes, used in schematics and boa...
Definition: base_struct.h:165
static bool sortNetsByNodes(const NETINFO_ITEM *a, const NETINFO_ITEM *b)
void SetLocalFlags(int aFlags)
Definition: class_zone.h:257
The common library.
int GetWidth() const
bool IsModuleLayerVisible(PCB_LAYER_ID aLayer)
Function IsModuleLayerVisible expects either of the two layers on which a module can reside...
wxString GetClass() const override
Function GetClass returns the class name.
Definition: class_board.h:918
void SetElementVisibility(GAL_LAYER_ID aElementCategory, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
virtual REPORTER & Report(const wxString &aText, SEVERITY aSeverity=RPT_UNDEFINED)=0
Function Report is a pure virtual function to override in the derived object.
UTF8 Format() const
Function Format.
Definition: lib_id.cpp:263
int GetY() const
#define FIRST_COPPER_LAYER
Class COLORS_DESIGN_SETTINGS is a list of color settings for designs in Pcbnew.
bool IsCopperLayer(LAYER_NUM aLayerId)
Function IsCopperLayer tests whether a layer is a copper layer.
virtual void Delete(BOARD_ITEM *aItem)
Removes an item from the containter and deletes it.
virtual const wxPoint & GetPosition() const override
unsigned GetCount() const
Function GetCount returns the number of elements in the list.
Definition: dlist.h:126
bool AppendCorner(wxPoint aPosition, int aHoleIdx, bool aAllowDuplication=false)
Add a new corner to the zone outline (to the main outline or a hole)
void SetEffects(const TEXTE_MODULE &aSrc)
Function SetEffects sets the text effects from another instance.
void SetStart(const wxPoint &aStart)
Definition: class_track.h:120
COMPONENT * GetComponentByReference(const wxString &aReference)
Function GetComponentByReference returns a COMPONENT by aReference.
class VIA, a via (like a track segment on a copper layer)
Definition: typeinfo.h:108
const COMPONENT_NET & GetNet(unsigned aIndex) const
Definition: pcb_netlist.h:137
#define DBG(x)
Definition: fctsys.h:33
void CopyNetlistSettings(MODULE *aModule, bool aCopyLocalSettings)
Function CopyNetlistSettings copies the netlist settings to aModule.
DLIST_ITERATOR_WRAPPER< TRACK > Tracks()
Definition: class_board.h:249
bool BuildBoardPolygonOutlines(BOARD *aBoard, SHAPE_POLY_SET &aOutlines, wxString *aErrorText)
void RedrawAreasOutlines(EDA_DRAW_PANEL *aPanel, wxDC *aDC, GR_DRAWMODE aDrawMode, PCB_LAYER_ID aLayer)
Function RedrawAreasOutlines Redraw all areas outlines on layer aLayer ( redraw all if aLayer < 0 ) ...
DLIST< TRACK > m_Track
Definition: class_board.h:246
bool IsDryRun() const
Definition: pcb_netlist.h:300
BOARD_DESIGN_SETTINGS m_designSettings
Definition: class_board.h:193
Module description (excepted pads)
const wxString & GetNetname() const
Function GetNetname.
Abstract interface for BOARD_ITEMs capable of storing other items inside.
LSET GetEnabledLayers() const
Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.
static void checkConnectedTo(BOARD *aBoard, TRACKS *aList, const TRACKS &aTracksInNet, const wxPoint &aGoal, const wxPoint &aStart, TRACK *aFirstTrack)
Function checkConnectedTo returns if aTracksInNet contains a copper pathway to aGoal when starting wi...
Class EDA_MSG_ITEM is used EDA_MSG_PANEL as the item type for displaying messages.
Definition: msgpanel.h:53
const wxString & GetPath() const
Definition: class_module.h:173
SEARCH_RESULT
Definition: base_struct.h:82
int GetCurrentTrackWidth() const
Function GetCurrentTrackWidth.
class DRAWSEGMENT, a segment not on copper layers
Definition: typeinfo.h:103
Message panel definition file.
bool IsSelfIntersecting()
Function IsSelfIntersecting Checks whether any of the polygons in the set is self intersecting...
MODULE * GetFootprint(const wxPoint &aPosition, PCB_LAYER_ID aActiveLayer, bool aVisibleOnly, bool aIgnoreLocked=false)
Function GetFootprint get a footprint by its bounding rectangle at aPosition on aLayer.
unsigned GetCount() const
Function GetCount.
Definition: pcb_netlist.h:247
LSET GetVisibleLayers() const
Function GetVisibleLayers returns a bit-mask of all the layers that are visible.
BOARD_CONNECTED_ITEM * end
Definition: class_track.h:90
static const int UNCONNECTED
Constant that holds the "unconnected net" number (typically 0) all items "connected" to this net are ...
unsigned GetNetCount() const
Definition: pcb_netlist.h:135
Struct IO_ERROR is a class used to hold an error message and may be used when throwing exceptions con...
Definition: ki_exception.h:47
#define THROW_IO_ERROR(msg)
Definition: ki_exception.h:38
BOARD_CONNECTED_ITEM * start
Definition: class_track.h:89
LAYER_T GetLayerType(PCB_LAYER_ID aLayer) const
Function GetLayerType returns the type of the copper layer given by aLayer.
void ClearAllNetCodes()
Function ClearAllNetCodes() Resets all items' netcodes to 0 (no net).
PCB_LAYER_ID ToLAYER_ID(int aLayer)
Definition: lset.cpp:774
std::shared_ptr< CONNECTIVITY_DATA > GetConnectivity() const
Function GetConnectivity() returns list of missing connections between components/tracks.
Definition: class_board.h:290
void SetEnabledLayers(LSET aLayerMask)
Function SetEnabledLayers is a proxy function that calls the correspondent function in m_BoardSetting...
#define mod(a, n)
Definition: greymap.cpp:24
void GetMsgPanelInfo(std::vector< MSG_PANEL_ITEM > &aList) override
Function GetMsgPanelInfo populates aList of MSG_PANEL_ITEM objects with it's internal state for displ...
void SetPath(const wxString &aPath)
Definition: class_module.h:174
void Remove(BOARD_ITEM *aBoardItem) override
Removes an item from the container.
NETINFO_ITEM * GetNet() const
Function GetNet Returns NET_INFO object for a given item.
void UseCustomTrackViaSize(bool aEnabled)
Function UseCustomTrackViaSize Enables/disables custom track/via size settings.
void Insert(T *aNewElement, T *aElementAfterMe)
Function Insert puts aNewElement just in front of aElementAfterMe in the list sequence.
Definition: dlist.h:200
COMPONENT * GetComponentByTimeStamp(const wxString &aTimeStamp)
Function GetComponentByTimeStamp returns a COMPONENT by aTimeStamp.
unsigned GetNetCount() const
Function GetNetCount.
Definition: class_board.h:772
static wxString GetStandardLayerName(PCB_LAYER_ID aLayerId)
Function GetStandardLayerName returns an "English Standard" name of a PCB layer when given aLayerNumb...
Definition: class_board.h:647
TRACK * GetFirstTrack(TRACK *aTrk, const TRACK *aStopPoint=NULL)
Scan a track list for the first TRACK object. Returns NULL if not found (or NULL passed) ...
Definition: class_track.h:504
int m_Status_Pcb
Flags used in ratsnest calculation and update.
Definition: class_board.h:237
BOARD_ITEM * Duplicate(const BOARD_ITEM *aItem, bool aAddToBoard=false)
bool HitTest(const wxPoint &aPosition) const override
Function HitTest tests if aPosition is contained within or on the bounding area of an item...
VIA * GetFirstVia(TRACK *aTrk, const TRACK *aStopPoint=NULL)
Scan a track list for the first VIA o NULL if not found (or NULL passed)
Definition: class_track.h:490