KiCad PCB EDA Suite
BOARD_DESIGN_SETTINGS Class Reference

Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object. More...

#include <board_design_settings.h>

Public Member Functions

 BOARD_DESIGN_SETTINGS ()
 
NETCLASSPTR GetDefault () const
 Function GetDefault. More...
 
const wxString & GetCurrentNetClassName () const
 Function GetCurrentNetClassName. More...
 
bool UseNetClassTrack () const
 Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track width. More...
 
bool UseNetClassVia () const
 Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size. More...
 
bool SetCurrentNetClass (const wxString &aNetClassName)
 Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter change Initialize vias and tracks values displayed in comb boxes of the auxiliary toolbar and some others parameters (netclass name ....) More...
 
int GetBiggestClearanceValue ()
 Function GetBiggestClearanceValue. More...
 
int GetSmallestClearanceValue ()
 Function GetSmallestClearanceValue. More...
 
int GetCurrentMicroViaSize ()
 Function GetCurrentMicroViaSize. More...
 
int GetCurrentMicroViaDrill ()
 Function GetCurrentMicroViaDrill. More...
 
unsigned GetTrackWidthIndex () const
 Function GetTrackWidthIndex. More...
 
void SetTrackWidthIndex (unsigned aIndex)
 Function SetTrackWidthIndex sets the current track width list index to aIndex. More...
 
int GetCurrentTrackWidth () const
 Function GetCurrentTrackWidth. More...
 
void SetCustomTrackWidth (int aWidth)
 Function SetCustomTrackWidth Sets custom width for track (i.e. More...
 
int GetCustomTrackWidth () const
 Function GetCustomTrackWidth. More...
 
unsigned GetViaSizeIndex () const
 Function GetViaSizeIndex. More...
 
void SetViaSizeIndex (unsigned aIndex)
 Function SetViaSizeIndex sets the current via size list index to aIndex. More...
 
int GetCurrentViaSize () const
 Function GetCurrentViaSize. More...
 
void SetCustomViaSize (int aSize)
 Function SetCustomViaSize Sets custom size for via diameter (i.e. More...
 
int GetCustomViaSize () const
 Function GetCustomViaSize. More...
 
int GetCurrentViaDrill () const
 Function GetCurrentViaDrill. More...
 
void SetCustomViaDrill (int aDrill)
 Function SetCustomViaDrill Sets custom size for via drill (i.e. More...
 
int GetCustomViaDrill () const
 Function GetCustomViaDrill. More...
 
void UseCustomTrackViaSize (bool aEnabled)
 Function UseCustomTrackViaSize Enables/disables custom track/via size settings. More...
 
bool UseCustomTrackViaSize () const
 Function UseCustomTrackViaSize. More...
 
unsigned GetDiffPairIndex () const
 Function GetDiffPairIndex. More...
 
void SetDiffPairIndex (unsigned aIndex)
 Function SetDiffPairIndex. More...
 
void SetCustomDiffPairWidth (int aWidth)
 Function SetCustomDiffPairWidth Sets custom track width for differential pairs (i.e. More...
 
int GetCustomDiffPairWidth ()
 Function GetCustomDiffPairWidth. More...
 
void SetCustomDiffPairGap (int aGap)
 Function SetCustomDiffPairGap Sets custom gap for differential pairs (i.e. More...
 
int GetCustomDiffPairGap ()
 Function GetCustomDiffPairGap. More...
 
void SetCustomDiffPairViaGap (int aGap)
 Function SetCustomDiffPairViaGap Sets custom via gap for differential pairs (i.e. More...
 
int GetCustomDiffPairViaGap ()
 Function GetCustomDiffPairViaGap. More...
 
void UseCustomDiffPairDimensions (bool aEnabled)
 Function UseCustomDiffPairDimensions Enables/disables custom differential pair dimensions. More...
 
bool UseCustomDiffPairDimensions () const
 Function UseCustomDiffPairDimensions. More...
 
void SetMinHoleSeparation (int aDistance)
 Function SetMinHoleSeparation. More...
 
void SetRequireCourtyardDefinitions (bool aRequire)
 Function SetRequireCourtyardDefinitions. More...
 
void SetProhibitOverlappingCourtyards (bool aProhibit)
 Function SetProhibitOverlappingCourtyards. More...
 
LSET GetVisibleLayers () const
 Function GetVisibleLayers returns a bit-mask of all the layers that are visible. More...
 
void SetVisibleAlls ()
 Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers. More...
 
void SetVisibleLayers (LSET aMask)
 Function SetVisibleLayers changes the bit-mask of visible layers. More...
 
bool IsLayerVisible (PCB_LAYER_ID aLayerId) const
 Function IsLayerVisible tests whether a given layer is visible. More...
 
void SetLayerVisibility (PCB_LAYER_ID aLayerId, bool aNewState)
 Function SetLayerVisibility changes the visibility of a given layer. More...
 
int GetVisibleElements () const
 Function GetVisibleElements returns a bit-mask of all the element categories that are visible. More...
 
void SetVisibleElements (int aMask)
 Function SetVisibleElements changes the bit-mask of visible element categories. More...
 
bool IsElementVisible (GAL_LAYER_ID aElementCategory) const
 Function IsElementVisible tests whether a given element category is visible. More...
 
void SetElementVisibility (GAL_LAYER_ID aElementCategory, bool aNewState)
 Function SetElementVisibility changes the visibility of an element category. More...
 
LSET GetEnabledLayers () const
 Function GetEnabledLayers returns a bit-mask of all the layers that are enabled. More...
 
void SetEnabledLayers (LSET aMask)
 Function SetEnabledLayers changes the bit-mask of enabled layers. More...
 
bool IsLayerEnabled (PCB_LAYER_ID aLayerId) const
 Function IsLayerEnabled tests whether a given layer is enabled. More...
 
int GetCopperLayerCount () const
 Function GetCopperLayerCount. More...
 
void SetCopperLayerCount (int aNewLayerCount)
 Function SetCopperLayerCount do what its name says... More...
 
void AppendConfigs (BOARD *aBoard, PARAM_CFG_ARRAY *aResult)
 Function AppendConfigs appends to aResult the configuration setting accessors which will later allow reading or writing of configuration file information directly into this object. More...
 
int GetBoardThickness () const
 
void SetBoardThickness (int aThickness)
 
int GetLineThickness (PCB_LAYER_ID aLayer) const
 Function GetLineThickness Returns the default graphic segment thickness from the layer class for the given layer. More...
 
wxSize GetTextSize (PCB_LAYER_ID aLayer) const
 Function GetTextSize Returns the default text size from the layer class for the given layer. More...
 
int GetTextThickness (PCB_LAYER_ID aLayer) const
 Function GetTextThickness Returns the default text thickness from the layer class for the given layer. More...
 
bool GetTextItalic (PCB_LAYER_ID aLayer) const
 
bool GetTextUpright (PCB_LAYER_ID aLayer) const
 
int GetLayerClass (PCB_LAYER_ID aLayer) const
 

Public Attributes

std::vector< int > m_TrackWidthList
 
std::vector< VIA_DIMENSIONm_ViasDimensionsList
 
std::vector< DIFF_PAIR_DIMENSIONm_DiffPairDimensionsList
 
NETCLASSES m_NetClasses
 
bool m_MicroViasAllowed
 true to allow micro vias More...
 
bool m_BlindBuriedViaAllowed
 true to allow blind/buried vias More...
 
VIATYPE_T m_CurrentViaType
 (VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA) More...
 
bool m_RequireCourtyards
 require courtyard definitions in footprints More...
 
bool m_ProhibitOverlappingCourtyards
 check for overlapping courtyards in DRC More...
 
bool m_UseConnectedTrackWidth
 
int m_TrackMinWidth
 track min value for width ((min copper size value More...
 
int m_ViasMinSize
 vias (not micro vias) min diameter More...
 
int m_ViasMinDrill
 vias (not micro vias) min drill diameter More...
 
int m_MicroViasMinSize
 micro vias (not vias) min diameter More...
 
int m_MicroViasMinDrill
 micro vias (not vias) min drill diameter More...
 
int m_SolderMaskMargin
 Solder mask margin. More...
 
int m_SolderMaskMinWidth
 Solder mask min width. More...
 
int m_SolderPasteMargin
 Solder paste margin absolute value. More...
 
double m_SolderPasteMarginRatio
 Solder pask margin ratio value of pad size The final margin is the sum of these 2 values. More...
 
int m_HoleToHoleMin
 Min width of peninsula between two drilled holes. More...
 
int m_LineThickness [LAYER_CLASS_COUNT]
 
wxSize m_TextSize [LAYER_CLASS_COUNT]
 
int m_TextThickness [LAYER_CLASS_COUNT]
 
bool m_TextItalic [LAYER_CLASS_COUNT]
 
bool m_TextUpright [LAYER_CLASS_COUNT]
 
wxString m_RefDefaultText
 Default ref text on fp creation. More...
 
bool m_RefDefaultVisibility
 Default ref text visibility on fp creation. More...
 
int m_RefDefaultlayer
 Default ref text layer on fp creation. More...
 
wxString m_ValueDefaultText
 Default value text on fp creation. More...
 
bool m_ValueDefaultVisibility
 Default value text visibility on fp creation. More...
 
int m_ValueDefaultlayer
 Default value text layer on fp creation. More...
 
wxPoint m_AuxOrigin
 origin for plot exports More...
 
wxPoint m_GridOrigin
 origin for grid offsets More...
 
D_PAD m_Pad_Master
 A dummy pad to store all default parameters. More...
 

Private Member Functions

void formatNetClass (NETCLASS *aNetClass, OUTPUTFORMATTER *aFormatter, int aNestLevel, int aControlBits) const
 

Private Attributes

unsigned m_trackWidthIndex
 
unsigned m_viaSizeIndex
 
unsigned m_diffPairIndex
 
bool m_useCustomTrackVia
 
int m_customTrackWidth
 
VIA_DIMENSION m_customViaSize
 
bool m_useCustomDiffPair
 
DIFF_PAIR_DIMENSION m_customDiffPair
 
int m_copperLayerCount
 Number of copper layers for this design. More...
 
LSET m_enabledLayers
 Bit-mask for layer enabling. More...
 
LSET m_visibleLayers
 Bit-mask for layer visibility. More...
 
int m_visibleElements
 Bit-mask for element category visibility. More...
 
int m_boardThickness
 Board thickness for 3D viewer. More...
 
wxString m_currentNetClassName
 Current net class name used to display netclass info. More...
 

Detailed Description

Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.

Definition at line 165 of file board_design_settings.h.

Constructor & Destructor Documentation

BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS ( )

Definition at line 390 of file board_design_settings.cpp.

References DEFAULT_BOARD_THICKNESS_MM, DEFAULT_COPPER_LINE_WIDTH, DEFAULT_COPPER_TEXT_SIZE, DEFAULT_COPPER_TEXT_WIDTH, DEFAULT_CUSTOMDPAIRGAP, DEFAULT_CUSTOMDPAIRVIAGAP, DEFAULT_CUSTOMDPAIRWIDTH, DEFAULT_CUSTOMTRACKWIDTH, DEFAULT_EDGE_WIDTH, DEFAULT_LINE_WIDTH, DEFAULT_MICROVIASMINDRILL, DEFAULT_MICROVIASMINSIZE, DEFAULT_SILK_LINE_WIDTH, DEFAULT_SILK_TEXT_SIZE, DEFAULT_SILK_TEXT_WIDTH, DEFAULT_SOLDERMASK_CLEARANCE, DEFAULT_SOLDERMASK_MIN_WIDTH, DEFAULT_TEXT_SIZE, DEFAULT_TEXT_WIDTH, DEFAULT_TRACKMINWIDTH, DEFAULT_VIASMINDRILL, DEFAULT_VIASMINSIZE, F_Fab, F_SilkS, GAL_LAYER_INDEX, LAYER_CLASS_COPPER, LAYER_CLASS_EDGES, LAYER_CLASS_OTHERS, LAYER_CLASS_SILK, LAYER_MOD_TEXT_INVISIBLE, m_BlindBuriedViaAllowed, m_boardThickness, m_CurrentViaType, m_customDiffPair, m_customTrackWidth, m_customViaSize, VIA_DIMENSION::m_Diameter, m_diffPairIndex, VIA_DIMENSION::m_Drill, m_enabledLayers, DIFF_PAIR_DIMENSION::m_Gap, m_LineThickness, m_MicroViasAllowed, m_MicroViasMinDrill, m_MicroViasMinSize, m_RefDefaultlayer, m_RefDefaultText, m_RefDefaultVisibility, m_SolderMaskMargin, m_SolderMaskMinWidth, m_SolderPasteMargin, m_SolderPasteMarginRatio, m_TextItalic, m_TextSize, m_TextThickness, m_TextUpright, m_TrackMinWidth, m_trackWidthIndex, m_UseConnectedTrackWidth, m_useCustomDiffPair, m_useCustomTrackVia, m_ValueDefaultlayer, m_ValueDefaultText, m_ValueDefaultVisibility, DIFF_PAIR_DIMENSION::m_ViaGap, m_viaSizeIndex, m_ViasMinDrill, m_ViasMinSize, m_visibleElements, DIFF_PAIR_DIMENSION::m_Width, SetCopperLayerCount(), SetVisibleLayers(), and VIA_THROUGH.

390  :
391  m_Pad_Master( NULL )
392 {
393  LSET all_set = LSET().set();
394 
395  m_enabledLayers = all_set; // All layers enabled at first.
396  // SetCopperLayerCount() will adjust this.
397  SetVisibleLayers( all_set );
398 
399  // set all but hidden text as visible.
401 
402  SetCopperLayerCount( 2 ); // Default design is a double sided board
403 
405 
406  // if true, when creating a new track starting on an existing track, use this track width
407  m_UseConnectedTrackWidth = false;
408 
409  m_BlindBuriedViaAllowed = false;
410  m_MicroViasAllowed = false;
411 
413  m_TextSize[ LAYER_CLASS_SILK ] = wxSize( Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ),
414  Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ) );
416  m_TextItalic[ LAYER_CLASS_SILK ] = false;
418 
420  m_TextSize[ LAYER_CLASS_COPPER ] = wxSize( Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ),
421  Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ) );
423  m_TextItalic[ LAYER_CLASS_COPPER ] = false;
425 
426  // Edges & Courtyards; text properties aren't used but better to have them holding
427  // reasonable values than not.
429  m_TextSize[ LAYER_CLASS_EDGES ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
430  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
432  m_TextItalic[ LAYER_CLASS_EDGES ] = false;
434 
436  m_TextSize[ LAYER_CLASS_OTHERS ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
437  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
439  m_TextItalic[ LAYER_CLASS_OTHERS ] = false;
441 
442  m_useCustomTrackVia = false;
443  m_customTrackWidth = Millimeter2iu( DEFAULT_CUSTOMTRACKWIDTH );
445  m_customViaSize.m_Drill = Millimeter2iu( DEFAULT_VIASMINDRILL );
446 
447  m_useCustomDiffPair = false;
449  m_customDiffPair.m_Gap = Millimeter2iu( DEFAULT_CUSTOMDPAIRGAP );
451 
452  m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH );
453  m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE );
454  m_ViasMinDrill = Millimeter2iu( DEFAULT_VIASMINDRILL );
455  m_MicroViasMinSize = Millimeter2iu( DEFAULT_MICROVIASMINSIZE );
457 
458  // Global mask margins:
461  m_SolderPasteMargin = 0; // Solder paste margin absolute value
462  m_SolderPasteMarginRatio = 0.0; // Solder paste margin as a ratio of pad size
463  // The final margin is the sum of these 2 values
464  // Usually < 0 because the mask is smaller than pad
465  // Layer thickness for 3D viewer
466  m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );
467 
468  m_viaSizeIndex = 0;
469  m_trackWidthIndex = 0;
470  m_diffPairIndex = 0;
471 
472  // Default ref text on fp creation. If empty, use footprint name as default
473  m_RefDefaultText = wxT( "REF**" );
474  m_RefDefaultVisibility = true;
475  m_RefDefaultlayer = int( F_SilkS );
476  // Default value text on fp creation. If empty, use footprint name as default
477  m_ValueDefaultText = wxEmptyString;
479  m_ValueDefaultlayer = int( F_Fab );
480 }
#define DEFAULT_EDGE_WIDTH
#define DEFAULT_SILK_TEXT_WIDTH
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
#define DEFAULT_TRACKMINWIDTH
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
VIATYPE_T m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
int m_SolderPasteMargin
Solder paste margin absolute value.
#define DEFAULT_VIASMINSIZE
#define DEFAULT_BOARD_THICKNESS_MM
#define DEFAULT_LINE_WIDTH
#define DEFAULT_COPPER_LINE_WIDTH
int m_ValueDefaultlayer
Default value text layer on fp creation.
DIFF_PAIR_DIMENSION m_customDiffPair
#define DEFAULT_CUSTOMDPAIRGAP
#define DEFAULT_CUSTOMDPAIRVIAGAP
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
#define DEFAULT_CUSTOMDPAIRWIDTH
#define DEFAULT_SILK_TEXT_SIZE
int m_TextThickness[LAYER_CLASS_COUNT]
Class LSET is a set of PCB_LAYER_IDs.
#define DEFAULT_SILK_LINE_WIDTH
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
#define DEFAULT_MICROVIASMINSIZE
wxString m_ValueDefaultText
Default value text on fp creation.
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
int m_visibleElements
Bit-mask for element category visibility.
D_PAD m_Pad_Master
A dummy pad to store all default parameters.
int m_RefDefaultlayer
Default ref text layer on fp creation.
#define DEFAULT_COPPER_TEXT_WIDTH
#define DEFAULT_CUSTOMTRACKWIDTH
#define DEFAULT_SOLDERMASK_CLEARANCE
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values...
#define DEFAULT_TEXT_SIZE
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
#define DEFAULT_VIASMINDRILL
int m_boardThickness
Board thickness for 3D viewer.
bool m_TextUpright[LAYER_CLASS_COUNT]
int m_SolderMaskMinWidth
Solder mask min width.

Member Function Documentation

void BOARD_DESIGN_SETTINGS::AppendConfigs ( BOARD aBoard,
PARAM_CFG_ARRAY aResult 
)

Function AppendConfigs appends to aResult the configuration setting accessors which will later allow reading or writing of configuration file information directly into this object.

Definition at line 484 of file board_design_settings.cpp.

References DEFAULT_COPPER_TEXT_SIZE, DEFAULT_COPPER_TEXT_WIDTH, DEFAULT_HOLETOHOLEMIN, DEFAULT_MICROVIASMINDRILL, DEFAULT_MICROVIASMINSIZE, DEFAULT_SILK_LINE_WIDTH, DEFAULT_SILK_TEXT_SIZE, DEFAULT_SILK_TEXT_WIDTH, DEFAULT_SOLDERMASK_CLEARANCE, DEFAULT_SOLDERMASK_MIN_WIDTH, DEFAULT_SOLDERPASTE_CLEARANCE, DEFAULT_SOLDERPASTE_RATIO, DEFAULT_TEXT_SIZE, DEFAULT_TEXT_WIDTH, DEFAULT_TRACKMINWIDTH, DEFAULT_VIASMINDRILL, DEFAULT_VIASMINSIZE, LAYER_CLASS_COPPER, LAYER_CLASS_EDGES, LAYER_CLASS_OTHERS, LAYER_CLASS_SILK, m_BlindBuriedViaAllowed, m_DiffPairDimensionsList, m_HoleToHoleMin, m_LineThickness, m_MicroViasAllowed, m_MicroViasMinDrill, m_MicroViasMinSize, m_NetClasses, m_ProhibitOverlappingCourtyards, m_RequireCourtyards, m_SolderMaskMargin, m_SolderMaskMinWidth, m_SolderPasteMargin, m_SolderPasteMarginRatio, m_TextItalic, m_TextSize, m_TextThickness, m_TextUpright, m_TrackMinWidth, m_TrackWidthList, m_ViasDimensionsList, m_ViasMinDrill, m_ViasMinSize, TEXTS_MAX_SIZE, TEXTS_MAX_WIDTH, and TEXTS_MIN_SIZE.

Referenced by PCB_EDIT_FRAME::GetProjectFileParameters(), and DIALOG_BOARD_SETUP::OnAuxiliaryAction().

485 {
486  aResult->push_back( new PARAM_CFG_LAYERS( aBoard ) );
487 
488  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowMicroVias" ),
489  &m_MicroViasAllowed, false ) );
490 
491  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowBlindVias" ),
492  &m_BlindBuriedViaAllowed, false ) );
493 
494  aResult->push_back( new PARAM_CFG_BOOL( wxT( "RequireCourtyardDefinitions" ),
495  &m_RequireCourtyards, false ) );
496 
497  aResult->push_back( new PARAM_CFG_BOOL( wxT( "ProhibitOverlappingCourtyards" ),
499 
500  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinTrackWidth" ),
502  Millimeter2iu( DEFAULT_TRACKMINWIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
503  nullptr, MM_PER_IU ) );
504 
505  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDiameter" ),
506  &m_ViasMinSize,
507  Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
508  nullptr, MM_PER_IU ) );
509 
510  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDrill" ),
512  Millimeter2iu( DEFAULT_VIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
513  nullptr, MM_PER_IU ) );
514 
515  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDiameter" ),
517  Millimeter2iu( DEFAULT_MICROVIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
518  nullptr, MM_PER_IU ) );
519 
520  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDrill" ),
522  Millimeter2iu( DEFAULT_MICROVIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
523  nullptr, MM_PER_IU ) );
524 
525  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinHoleToHole" ),
527  Millimeter2iu( DEFAULT_HOLETOHOLEMIN ), 0, Millimeter2iu( 10.0 ),
528  nullptr, MM_PER_IU ) );
529 
530  aResult->push_back( new PARAM_CFG_TRACKWIDTHS( &m_TrackWidthList ) );
531  aResult->push_back( new PARAM_CFG_VIADIMENSIONS( &m_ViasDimensionsList ) );
532  aResult->push_back( new PARAM_CFG_DIFFPAIRDIMENSIONS( &m_DiffPairDimensionsList ) );
533 
534  aResult->push_back( new PARAM_CFG_NETCLASSES( wxT( "Netclasses" ), &m_NetClasses ) );
535 
536  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkLineWidth" ),
538  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
539  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
540 
541  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeV" ),
542  &m_TextSize[ LAYER_CLASS_SILK ].y,
544  nullptr, MM_PER_IU, wxT( "ModuleTextSizeV" ) ) );
545 
546  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeH" ),
547  &m_TextSize[ LAYER_CLASS_SILK ].x,
549  nullptr, MM_PER_IU, wxT( "ModuleTextSizeH" ) ) );
550 
551  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeThickness" ),
552  &m_TextThickness[ LAYER_CLASS_SILK ],
553  Millimeter2iu( DEFAULT_SILK_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
554  nullptr, MM_PER_IU, wxT( "ModuleTextSizeThickness" ) ) );
555 
556  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextItalic" ),
557  &m_TextItalic[ LAYER_CLASS_SILK ], false ) );
558 
559  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextUpright" ),
560  &m_TextUpright[ LAYER_CLASS_SILK ], true ) );
561 
562  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperLineWidth" ),
564  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
565  nullptr, MM_PER_IU, wxT( "DrawSegmentWidth" ) ) );
566 
567  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeV" ),
568  &m_TextSize[ LAYER_CLASS_COPPER ].y,
570  nullptr, MM_PER_IU, wxT( "PcbTextSizeV" ) ) );
571 
572  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeH" ),
573  &m_TextSize[ LAYER_CLASS_COPPER ].x,
575  nullptr, MM_PER_IU, wxT( "PcbTextSizeH" ) ) );
576 
577  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextThickness" ),
578  &m_TextThickness[ LAYER_CLASS_COPPER ],
579  Millimeter2iu( DEFAULT_COPPER_TEXT_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
580  nullptr, MM_PER_IU, wxT( "PcbTextThickness" ) ) );
581 
582  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextItalic" ),
583  &m_TextItalic[ LAYER_CLASS_COPPER ], false ) );
584 
585  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextUpright" ),
586  &m_TextUpright[ LAYER_CLASS_COPPER ], true ) );
587 
588  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "EdgesAndCourtyardsLineWidth" ),
590  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
591  nullptr, MM_PER_IU, wxT( "BoardOutlineThickness" ) ) );
592 
593  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersLineWidth" ),
595  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
596  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
597 
598  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeV" ),
599  &m_TextSize[ LAYER_CLASS_OTHERS ].x,
601  nullptr, MM_PER_IU ) );
602 
603  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeH" ),
604  &m_TextSize[ LAYER_CLASS_OTHERS ].y,
606  nullptr, MM_PER_IU ) );
607 
608  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeThickness" ),
609  &m_TextThickness[ LAYER_CLASS_OTHERS ],
610  Millimeter2iu( DEFAULT_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
611  nullptr, MM_PER_IU ) );
612 
613  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextItalic" ),
614  &m_TextItalic[ LAYER_CLASS_OTHERS ], false ) );
615 
616  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextUpright" ),
617  &m_TextUpright[ LAYER_CLASS_OTHERS ], true ) );
618 
619  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskClearance" ),
621  Millimeter2iu( DEFAULT_SOLDERMASK_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
622  nullptr, MM_PER_IU ) );
623 
624  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskMinWidth" ),
626  Millimeter2iu( DEFAULT_SOLDERMASK_MIN_WIDTH ), 0, Millimeter2iu( 1.0 ),
627  nullptr, MM_PER_IU ) );
628 
629  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderPasteClearance" ),
631  Millimeter2iu( DEFAULT_SOLDERPASTE_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
632  nullptr, MM_PER_IU ) );
633 
634  aResult->push_back( new PARAM_CFG_DOUBLE( wxT( "SolderPasteRatio" ),
636  DEFAULT_SOLDERPASTE_RATIO, 0, 10.0 ) );
637 }
#define DEFAULT_SILK_TEXT_WIDTH
int m_SolderMaskMargin
Solder mask margin.
#define DEFAULT_TRACKMINWIDTH
#define DEFAULT_SOLDERPASTE_RATIO
int m_SolderPasteMargin
Solder paste margin absolute value.
#define DEFAULT_VIASMINSIZE
#define TEXTS_MAX_WIDTH
Maximum text width in Pcbnew units value (0.5 inches)
Definition: pcbnew.h:68
std::vector< int > m_TrackWidthList
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Configuration parameter - Double Precision Class.
#define DEFAULT_HOLETOHOLEMIN
Configuration parameter - Integer Class with unit conversion.
#define DEFAULT_SOLDERPASTE_CLEARANCE
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
#define DEFAULT_SILK_TEXT_SIZE
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
#define DEFAULT_SILK_LINE_WIDTH
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
Configuration parameter - Boolean Class.
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
#define TEXTS_MAX_SIZE
Maximum text size in Pcbnew units value (1 inch) )
Definition: pcbnew.h:67
#define DEFAULT_MICROVIASMINSIZE
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
#define TEXTS_MIN_SIZE
Minimum text size in Pcbnew units value (5 mils)
Definition: pcbnew.h:66
bool m_RequireCourtyards
require courtyard definitions in footprints
#define DEFAULT_COPPER_TEXT_WIDTH
std::vector< VIA_DIMENSION > m_ViasDimensionsList
#define DEFAULT_SOLDERMASK_CLEARANCE
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values...
#define DEFAULT_TEXT_SIZE
#define DEFAULT_VIASMINDRILL
bool m_TextUpright[LAYER_CLASS_COUNT]
int m_SolderMaskMinWidth
Solder mask min width.
void BOARD_DESIGN_SETTINGS::formatNetClass ( NETCLASS aNetClass,
OUTPUTFORMATTER aFormatter,
int  aNestLevel,
int  aControlBits 
) const
private
int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue ( )

Function GetBiggestClearanceValue.

Returns
the biggest clearance value found in NetClasses list

Definition at line 722 of file board_design_settings.cpp.

References NETCLASSES::begin(), NETCLASSES::end(), NETCLASSES::GetDefault(), m_NetClasses, and max.

Referenced by ZONE_FILLER::buildUnconnectedThermalStubsPolygonList(), ZONE_FILLER::buildZoneFeatureHoleList(), MODULE::GetBoundingPoly(), PNS_KICAD_IFACE::SyncWorld(), and MODULE::ViewBBox().

723 {
724  int clearance = m_NetClasses.GetDefault()->GetClearance();
725 
726  //Read list of Net Classes
727  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
728  {
729  NETCLASSPTR netclass = nc->second;
730  clearance = std::max( clearance, netclass->GetClearance() );
731  }
732 
733  return clearance;
734 }
iterator end()
Definition: netclass.h:249
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
iterator begin()
Definition: netclass.h:248
#define max(a, b)
Definition: auxiliary.h:86
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
int BOARD_DESIGN_SETTINGS::GetCopperLayerCount ( ) const
inline

Function GetCopperLayerCount.

Returns
int - the number of neabled copper layers

Definition at line 714 of file board_design_settings.h.

Referenced by DRC::doTrackDrc(), BOARD::GetCopperLayerCount(), and ROUTER_TOOL::onViaCommand().

715  {
716  return m_copperLayerCount;
717  }
int m_copperLayerCount
Number of copper layers for this design.
int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaDrill ( )

Function GetCurrentMicroViaDrill.

Returns
the current micro via drill, that is the current netclass value

Definition at line 760 of file board_design_settings.cpp.

References NETCLASSES::Find(), m_currentNetClassName, and m_NetClasses.

Referenced by ROUTER_TOOL::onViaCommand().

761 {
762  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
763 
764  return netclass->GetuViaDrill();
765 }
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:146
int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaSize ( )

Function GetCurrentMicroViaSize.

Returns
the current micro via size, that is the current netclass value

Definition at line 752 of file board_design_settings.cpp.

References NETCLASSES::Find(), m_currentNetClassName, and m_NetClasses.

Referenced by ROUTER_TOOL::onViaCommand().

753 {
754  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
755 
756  return netclass->GetuViaDiameter();
757 }
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:146
const wxString& BOARD_DESIGN_SETTINGS::GetCurrentNetClassName ( ) const
inline

Function GetCurrentNetClassName.

Returns
the current net class name.

Definition at line 276 of file board_design_settings.h.

Referenced by DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::buildFilterLists().

277  {
278  return m_currentNetClassName;
279  }
wxString m_currentNetClassName
Current net class name used to display netclass info.
int BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth ( ) const
inline
int BOARD_DESIGN_SETTINGS::GetCurrentViaDrill ( ) const

Function GetCurrentViaDrill.

Returns
the current via size, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_TrackWidthList[0]

Definition at line 775 of file board_design_settings.cpp.

References m_customViaSize, VIA_DIMENSION::m_Drill, m_useCustomTrackVia, m_ViasDimensionsList, and m_viaSizeIndex.

Referenced by BOARD::BOARD(), EDIT_TOOL::changeTrackWidthOnClick(), PNS::SIZES_SETTINGS::ImportCurrent(), PNS::SIZES_SETTINGS::Init(), ROUTER_TOOL::onViaCommand(), and PCB_EDIT_FRAME::SetTrackSegmentWidth().

776 {
777  int drill;
778 
779  if( m_useCustomTrackVia )
780  drill = m_customViaSize.m_Drill;
781  else
782  drill = m_ViasDimensionsList[m_viaSizeIndex].m_Drill;
783 
784  return drill > 0 ? drill : -1;
785 }
std::vector< VIA_DIMENSION > m_ViasDimensionsList
int BOARD_DESIGN_SETTINGS::GetCurrentViaSize ( ) const
inline

Function GetCurrentViaSize.

Returns
the current via size, according to the selected options ( using the default netclass value or a preset/custom value ) the default netclass is always in m_TrackWidthList[0]

Definition at line 404 of file board_design_settings.h.

References VIA_DIMENSION::m_Diameter.

Referenced by AddNewTrace(), BOARD::BOARD(), EDIT_TOOL::changeTrackWidthOnClick(), PNS::SIZES_SETTINGS::ImportCurrent(), PNS::SIZES_SETTINGS::Init(), ROUTER_TOOL::onViaCommand(), OrCell_Trace(), PCB_EDIT_FRAME::SetTrackSegmentWidth(), and ShowNewTrackWhenMovingCursor().

405  {
406  if( m_useCustomTrackVia )
408  else
409  return m_ViasDimensionsList[m_viaSizeIndex].m_Diameter;
410  }
std::vector< VIA_DIMENSION > m_ViasDimensionsList
int BOARD_DESIGN_SETTINGS::GetCustomDiffPairGap ( )
inline

Function GetCustomDiffPairGap.

Returns
Current custom gap width for differential pairs.

Definition at line 530 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_Gap.

Referenced by PNS::SIZES_SETTINGS::Init().

531  {
532  return m_customDiffPair.m_Gap;
533  }
DIFF_PAIR_DIMENSION m_customDiffPair
int BOARD_DESIGN_SETTINGS::GetCustomDiffPairViaGap ( )
inline

Function GetCustomDiffPairViaGap.

Returns
Current custom via gap width for differential pairs.

Definition at line 550 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_Gap, and DIFF_PAIR_DIMENSION::m_ViaGap.

Referenced by PNS::SIZES_SETTINGS::Init().

int BOARD_DESIGN_SETTINGS::GetCustomDiffPairWidth ( )
inline

Function GetCustomDiffPairWidth.

Returns
Current custom track width for differential pairs.

Definition at line 510 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_Width.

Referenced by PNS::SIZES_SETTINGS::Init().

511  {
512  return m_customDiffPair.m_Width;
513  }
DIFF_PAIR_DIMENSION m_customDiffPair
int BOARD_DESIGN_SETTINGS::GetCustomTrackWidth ( ) const
inline

Function GetCustomTrackWidth.

Returns
Current custom width for a track.

Definition at line 376 of file board_design_settings.h.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

377  {
378  return m_customTrackWidth;
379  }
int BOARD_DESIGN_SETTINGS::GetCustomViaDrill ( ) const
inline

Function GetCustomViaDrill.

Returns
Current custom size for the via drill.

Definition at line 457 of file board_design_settings.h.

References VIA_DIMENSION::m_Drill.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

458  {
459  return m_customViaSize.m_Drill;
460  }
int BOARD_DESIGN_SETTINGS::GetCustomViaSize ( ) const
inline

Function GetCustomViaSize.

Returns
Current custom size for the via diameter.

Definition at line 428 of file board_design_settings.h.

References VIA_DIMENSION::m_Diameter.

Referenced by DIALOG_TRACK_VIA_SIZE::TransferDataToWindow().

429  {
431  }
unsigned BOARD_DESIGN_SETTINGS::GetDiffPairIndex ( ) const
inline

Function GetDiffPairIndex.

Returns
the current diff pair dimension list index.

Definition at line 487 of file board_design_settings.h.

Referenced by PNS::SIZES_SETTINGS::Init(), SetCurrentNetClass(), and DIFF_PAIR_MENU::update().

487 { return m_diffPairIndex; }
LSET BOARD_DESIGN_SETTINGS::GetEnabledLayers ( ) const
inline

Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.

Returns
int - the enabled layers in bit-mapped form.

Definition at line 687 of file board_design_settings.h.

Referenced by CreatePadsShapesSection(), CreateRoutesSection(), and BOARD::GetEnabledLayers().

688  {
689  return m_enabledLayers;
690  }
LSET m_enabledLayers
Bit-mask for layer enabling.
int BOARD_DESIGN_SETTINGS::GetLayerClass ( PCB_LAYER_ID  aLayer) const

Definition at line 884 of file board_design_settings.cpp.

References B_CrtYd, B_SilkS, Edge_Cuts, F_CrtYd, F_SilkS, and IsCopperLayer().

Referenced by GetLineThickness(), GetTextItalic(), GetTextSize(), GetTextThickness(), and GetTextUpright().

885 {
886  if( aLayer == F_SilkS || aLayer == B_SilkS )
887  return 0;
888  else if( IsCopperLayer( aLayer ) )
889  return 1;
890  else if( aLayer == Edge_Cuts || aLayer == F_CrtYd || aLayer == B_CrtYd )
891  return 2;
892  else
893  return 3;
894 }
bool IsCopperLayer(LAYER_NUM aLayerId)
Function IsCopperLayer tests whether a layer is a copper layer.
int BOARD_DESIGN_SETTINGS::GetLineThickness ( PCB_LAYER_ID  aLayer) const

Function GetLineThickness Returns the default graphic segment thickness from the layer class for the given layer.

Definition at line 897 of file board_design_settings.cpp.

References GetLayerClass(), and m_LineThickness.

Referenced by PCB_EDIT_FRAME::Begin_DrawSegment(), DRAWING_TOOL::DrawDimension(), PCB_EDIT_FRAME::EditDimension(), DRAWING_TOOL::getSegmentWidth(), EAGLE_PLUGIN::loadPlain(), PCB_EDITOR_CONTROL::PlaceTarget(), and DIALOG_GLOBAL_EDIT_TEXT_AND_GRAPHICS::processItem().

898 {
899  return m_LineThickness[ GetLayerClass( aLayer ) ];
900 }
int m_LineThickness[LAYER_CLASS_COUNT]
int GetLayerClass(PCB_LAYER_ID aLayer) const
int BOARD_DESIGN_SETTINGS::GetSmallestClearanceValue ( )

Function GetSmallestClearanceValue.

Returns
the smallest clearance value found in NetClasses list

Definition at line 737 of file board_design_settings.cpp.

References NETCLASSES::begin(), NETCLASSES::end(), NETCLASSES::GetDefault(), m_NetClasses, and min.

Referenced by DIALOG_PLOT::init_Dialog().

738 {
739  int clearance = m_NetClasses.GetDefault()->GetClearance();
740 
741  //Read list of Net Classes
742  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
743  {
744  NETCLASSPTR netclass = nc->second;
745  clearance = std::min( clearance, netclass->GetClearance() );
746  }
747 
748  return clearance;
749 }
iterator end()
Definition: netclass.h:249
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
iterator begin()
Definition: netclass.h:248
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
#define min(a, b)
Definition: auxiliary.h:85
wxSize BOARD_DESIGN_SETTINGS::GetTextSize ( PCB_LAYER_ID  aLayer) const
int BOARD_DESIGN_SETTINGS::GetTextThickness ( PCB_LAYER_ID  aLayer) const
bool BOARD_DESIGN_SETTINGS::GetTextUpright ( PCB_LAYER_ID  aLayer) const
unsigned BOARD_DESIGN_SETTINGS::GetTrackWidthIndex ( ) const
inline
unsigned BOARD_DESIGN_SETTINGS::GetViaSizeIndex ( ) const
inline
int BOARD_DESIGN_SETTINGS::GetVisibleElements ( ) const
inline

Function GetVisibleElements returns a bit-mask of all the element categories that are visible.

Returns
int - the visible element categories in bit-mapped form.

Definition at line 645 of file board_design_settings.h.

Referenced by PCB_IO::formatSetup(), and BOARD::GetVisibleElements().

646  {
647  return m_visibleElements;
648  }
int m_visibleElements
Bit-mask for element category visibility.
LSET BOARD_DESIGN_SETTINGS::GetVisibleLayers ( ) const
inline

Function GetVisibleLayers returns a bit-mask of all the layers that are visible.

Returns
int - the visible layers in bit-mapped form.

Definition at line 598 of file board_design_settings.h.

Referenced by BOARD::GetVisibleLayers().

599  {
600  return m_visibleLayers;
601  }
LSET m_visibleLayers
Bit-mask for layer visibility.
bool BOARD_DESIGN_SETTINGS::IsElementVisible ( GAL_LAYER_ID  aElementCategory) const
inline

Function IsElementVisible tests whether a given element category is visible.

Keep this as an inline function.

Parameters
aElementCategoryis from the enum by the same name
Returns
bool - true if the element is visible.
See also
enum GAL_LAYER_ID

Definition at line 668 of file board_design_settings.h.

References GAL_LAYER_INDEX.

Referenced by BOARD::IsElementVisible().

669  {
670  return ( m_visibleElements & ( 1 << GAL_LAYER_INDEX( aElementCategory ) ) );
671  }
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_visibleElements
Bit-mask for element category visibility.
bool BOARD_DESIGN_SETTINGS::IsLayerEnabled ( PCB_LAYER_ID  aLayerId) const
inline

Function IsLayerEnabled tests whether a given layer is enabled.

Parameters
aLayerId= The layer to be tested
Returns
bool - true if the layer is enabled

Definition at line 705 of file board_design_settings.h.

Referenced by BOARD::IsLayerEnabled(), and SetLayerVisibility().

706  {
707  return m_enabledLayers[aLayerId];
708  }
LSET m_enabledLayers
Bit-mask for layer enabling.
bool BOARD_DESIGN_SETTINGS::IsLayerVisible ( PCB_LAYER_ID  aLayerId) const
inline

Function IsLayerVisible tests whether a given layer is visible.

Parameters
aLayerId= The layer to be tested
Returns
bool - true if the layer is visible.

Definition at line 626 of file board_design_settings.h.

Referenced by BOARD::GetVisibleTrack(), CINFO3D_VISU::Is3DLayerEnabled(), and BOARD::IsLayerVisible().

627  {
628  // If a layer is disabled, it is automatically invisible
629  return (m_visibleLayers & m_enabledLayers)[aLayerId];
630  }
LSET m_visibleLayers
Bit-mask for layer visibility.
LSET m_enabledLayers
Bit-mask for layer enabling.
void BOARD_DESIGN_SETTINGS::SetBoardThickness ( int  aThickness)
inline

Definition at line 735 of file board_design_settings.h.

References GetTextSize().

Referenced by LEGACY_PLUGIN::loadGENERAL(), PARAM_CFG_LAYERS::ReadParam(), and PANEL_SETUP_LAYERS::TransferDataFromWindow().

735 { m_boardThickness = aThickness; }
int m_boardThickness
Board thickness for 3D viewer.
void BOARD_DESIGN_SETTINGS::SetCopperLayerCount ( int  aNewLayerCount)

Function SetCopperLayerCount do what its name says...

Parameters
aNewLayerCount= The new number of enabled copper layers

Definition at line 842 of file board_design_settings.cpp.

References ALL_CU_LAYERS, LSET::AllCuMask(), LAYER_BACK, LAYER_FRONT, LAYER_N_2, m_copperLayerCount, and m_enabledLayers.

Referenced by BOARD_DESIGN_SETTINGS(), PARAM_CFG_LAYERS::ReadParam(), and BOARD::SetCopperLayerCount().

843 {
844  // if( aNewLayerCount < 2 ) aNewLayerCount = 2;
845 
846  m_copperLayerCount = aNewLayerCount;
847 
848  // ensure consistency with the m_EnabledLayers member
849 #if 0
850  // was:
853 
854  if( m_copperLayerCount > 1 )
856 
857  for( LAYER_NUM ii = LAYER_N_2; ii < aNewLayerCount - 1; ++ii )
858  m_enabledLayers |= GetLayerSet( ii );
859 #else
860  // Update only enabled copper layers mask
861  m_enabledLayers &= ~LSET::AllCuMask();
862  m_enabledLayers |= LSET::AllCuMask( aNewLayerCount );
863 #endif
864 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:673
#define LAYER_FRONT
bit mask for component layer
Class LSET is a set of PCB_LAYER_IDs.
#define ALL_CU_LAYERS
int LAYER_NUM
Type LAYER_NUM can be replaced with int and removed.
#define LAYER_BACK
bit mask for copper layer
#define LAYER_N_2
int m_copperLayerCount
Number of copper layers for this design.
LSET m_enabledLayers
Bit-mask for layer enabling.
bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass ( const wxString &  aNetClassName)

Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter change Initialize vias and tracks values displayed in comb boxes of the auxiliary toolbar and some others parameters (netclass name ....)

Parameters
aNetClassName= the new netclass name
Returns
true if lists of tracks and vias sizes are modified

Definition at line 640 of file board_design_settings.cpp.

References NETCLASSES::Find(), NETCLASSES::GetDefault(), GetDiffPairIndex(), GetTrackWidthIndex(), GetViaSizeIndex(), m_currentNetClassName, m_DiffPairDimensionsList, m_NetClasses, m_TrackWidthList, m_ViasDimensionsList, SetDiffPairIndex(), SetTrackWidthIndex(), and SetViaSizeIndex().

Referenced by BOARD::BOARD(), SaveBoard(), and PANEL_SETUP_NETCLASSES::TransferDataFromWindow().

641 {
642  NETCLASSPTR netClass = m_NetClasses.Find( aNetClassName );
643  bool lists_sizes_modified = false;
644 
645  // if not found (should not happen) use the default
646  if( !netClass )
647  netClass = m_NetClasses.GetDefault();
648 
649  m_currentNetClassName = netClass->GetName();
650 
651  // Initialize others values:
652  if( m_TrackWidthList.size() == 0 )
653  {
654  lists_sizes_modified = true;
655  m_TrackWidthList.push_back( 0 );
656  }
657 
658  if( m_ViasDimensionsList.size() == 0 )
659  {
660  lists_sizes_modified = true;
661  m_ViasDimensionsList.emplace_back( VIA_DIMENSION() );
662  }
663 
664  if( m_DiffPairDimensionsList.size() == 0 )
665  {
666  lists_sizes_modified = true;
668  }
669 
670  /* note the m_ViasDimensionsList[0] and m_TrackWidthList[0] values
671  * are always the Netclass values
672  */
673  if( m_TrackWidthList[0] != netClass->GetTrackWidth() )
674  {
675  lists_sizes_modified = true;
676  m_TrackWidthList[0] = netClass->GetTrackWidth();
677  }
678 
679  if( m_ViasDimensionsList[0].m_Diameter != netClass->GetViaDiameter() )
680  {
681  lists_sizes_modified = true;
682  m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter();
683  }
684 
685  if( m_ViasDimensionsList[0].m_Drill != netClass->GetViaDrill() )
686  {
687  lists_sizes_modified = true;
688  m_ViasDimensionsList[0].m_Drill = netClass->GetViaDrill();
689  }
690 
691  if( m_DiffPairDimensionsList[0].m_Width != netClass->GetDiffPairWidth() )
692  {
693  lists_sizes_modified = true;
694  m_DiffPairDimensionsList[0].m_Width = netClass->GetDiffPairWidth();
695  }
696 
697  if( m_DiffPairDimensionsList[0].m_Gap != netClass->GetDiffPairGap() )
698  {
699  lists_sizes_modified = true;
700  m_DiffPairDimensionsList[0].m_Gap = netClass->GetDiffPairGap();
701  }
702 
703  if( m_DiffPairDimensionsList[0].m_ViaGap != netClass->GetDiffPairViaGap() )
704  {
705  lists_sizes_modified = true;
706  m_DiffPairDimensionsList[0].m_ViaGap = netClass->GetDiffPairViaGap();
707  }
708 
709  if( GetViaSizeIndex() >= m_ViasDimensionsList.size() )
711 
712  if( GetTrackWidthIndex() >= m_TrackWidthList.size() )
714 
717 
718  return lists_sizes_modified;
719 }
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:146
std::vector< int > m_TrackWidthList
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Struct DIFF_PAIR_DIMENSION is a small helper container to handle a stock of specific differential pai...
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
void SetDiffPairIndex(unsigned aIndex)
Function SetDiffPairIndex.
unsigned GetDiffPairIndex() const
Function GetDiffPairIndex.
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
std::vector< VIA_DIMENSION > m_ViasDimensionsList
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
void BOARD_DESIGN_SETTINGS::SetCustomDiffPairGap ( int  aGap)
inline

Function SetCustomDiffPairGap Sets custom gap for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aGapis the new gap.

Definition at line 521 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_Gap.

Referenced by ROUTER_TOOL::DpDimensionsDialog().

522  {
523  m_customDiffPair.m_Gap = aGap;
524  }
DIFF_PAIR_DIMENSION m_customDiffPair
void BOARD_DESIGN_SETTINGS::SetCustomDiffPairViaGap ( int  aGap)
inline

Function SetCustomDiffPairViaGap Sets custom via gap for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aGapis the new gap. Specify 0 to use the DiffPairGap for vias as well.

Definition at line 541 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_ViaGap.

Referenced by ROUTER_TOOL::DpDimensionsDialog().

542  {
543  m_customDiffPair.m_ViaGap = aGap;
544  }
DIFF_PAIR_DIMENSION m_customDiffPair
void BOARD_DESIGN_SETTINGS::SetCustomDiffPairWidth ( int  aWidth)
inline

Function SetCustomDiffPairWidth Sets custom track width for differential pairs (i.e.

not available in netclasses or preset list).

Parameters
aDrillis the new track wdith.

Definition at line 501 of file board_design_settings.h.

References DIFF_PAIR_DIMENSION::m_Width.

Referenced by ROUTER_TOOL::DpDimensionsDialog().

502  {
503  m_customDiffPair.m_Width = aWidth;
504  }
DIFF_PAIR_DIMENSION m_customDiffPair
void BOARD_DESIGN_SETTINGS::SetCustomTrackWidth ( int  aWidth)
inline

Function SetCustomTrackWidth Sets custom width for track (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentTrackWidth() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aWidthis the new track width.

Definition at line 367 of file board_design_settings.h.

Referenced by BOARD::BOARD(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

368  {
369  m_customTrackWidth = aWidth;
370  }
void BOARD_DESIGN_SETTINGS::SetCustomViaDrill ( int  aDrill)
inline

Function SetCustomViaDrill Sets custom size for via drill (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentViaDrill() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aDrillis the new drill size.

Definition at line 448 of file board_design_settings.h.

References VIA_DIMENSION::m_Drill.

Referenced by BOARD::BOARD(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

449  {
450  m_customViaSize.m_Drill = aDrill;
451  }
void BOARD_DESIGN_SETTINGS::SetCustomViaSize ( int  aSize)
inline

Function SetCustomViaSize Sets custom size for via diameter (i.e.

not available in netclasses or preset list). To have it returned with GetCurrentViaSize() you need to enable custom track & via sizes (UseCustomTrackViaSize()).

Parameters
aSizeis the new drill diameter.

Definition at line 419 of file board_design_settings.h.

References VIA_DIMENSION::m_Diameter.

Referenced by BOARD::BOARD(), and DIALOG_TRACK_VIA_SIZE::TransferDataFromWindow().

420  {
421  m_customViaSize.m_Diameter = aSize;
422  }
void BOARD_DESIGN_SETTINGS::SetDiffPairIndex ( unsigned  aIndex)

Function SetDiffPairIndex.

Parameters
aIndexis the diff pair dimensions list index to set.

Definition at line 795 of file board_design_settings.cpp.

References m_diffPairIndex, m_useCustomDiffPair, and min.

Referenced by DIFF_PAIR_MENU::eventHandler(), and SetCurrentNetClass().

796 {
797  m_diffPairIndex = std::min( aIndex, (unsigned) 8 );
798  m_useCustomDiffPair = false;
799 }
#define min(a, b)
Definition: auxiliary.h:85
void BOARD_DESIGN_SETTINGS::SetElementVisibility ( GAL_LAYER_ID  aElementCategory,
bool  aNewState 
)

Function SetElementVisibility changes the visibility of an element category.

Parameters
aElementCategoryis from the enum by the same name
aNewState= The new visibility state of the element category
See also
enum GAL_LAYER_ID

Definition at line 833 of file board_design_settings.cpp.

References GAL_LAYER_INDEX, and m_visibleElements.

Referenced by BOARD::SetElementVisibility().

834 {
835  if( aNewState )
836  m_visibleElements |= 1 << GAL_LAYER_INDEX( aElementCategory );
837  else
838  m_visibleElements &= ~( 1 << GAL_LAYER_INDEX( aElementCategory ) );
839 }
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
int m_visibleElements
Bit-mask for element category visibility.
void BOARD_DESIGN_SETTINGS::SetEnabledLayers ( LSET  aMask)

Function SetEnabledLayers changes the bit-mask of enabled layers.

Parameters
aMask= The new bit-mask of enabled layers

Definition at line 867 of file board_design_settings.cpp.

References LSET::AllCuMask(), B_Cu, F_Cu, m_copperLayerCount, m_enabledLayers, and m_visibleLayers.

Referenced by BOARD::SetEnabledLayers().

868 {
869  // Back and front layers are always enabled.
870  aMask.set( B_Cu ).set( F_Cu );
871 
872  m_enabledLayers = aMask;
873 
874  // A disabled layer cannot be visible
875  m_visibleLayers &= aMask;
876 
877  // update m_CopperLayerCount to ensure its consistency with m_EnabledLayers
878  m_copperLayerCount = ( aMask & LSET::AllCuMask() ).count();
879 }
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:673
LSET m_visibleLayers
Bit-mask for layer visibility.
int m_copperLayerCount
Number of copper layers for this design.
LSET m_enabledLayers
Bit-mask for layer enabling.
void BOARD_DESIGN_SETTINGS::SetLayerVisibility ( PCB_LAYER_ID  aLayerId,
bool  aNewState 
)

Function SetLayerVisibility changes the visibility of a given layer.

Parameters
aLayerId= The layer to be changed
aNewState= The new visibility state of the layer

Definition at line 827 of file board_design_settings.cpp.

References IsLayerEnabled(), and m_visibleLayers.

828 {
829  m_visibleLayers.set( aLayer, aNewState && IsLayerEnabled( aLayer ));
830 }
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
LSET m_visibleLayers
Bit-mask for layer visibility.
void BOARD_DESIGN_SETTINGS::SetMinHoleSeparation ( int  aDistance)

Function SetMinHoleSeparation.

Parameters
aValueThe minimum distance between the edges of two holes or 0 to disable hole-to-hole separation checking.

Definition at line 802 of file board_design_settings.cpp.

References m_HoleToHoleMin.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

803 {
804  m_HoleToHoleMin = aDistance;
805 }
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
void BOARD_DESIGN_SETTINGS::SetProhibitOverlappingCourtyards ( bool  aProhibit)

Function SetProhibitOverlappingCourtyards.

Parameters
aProhibitSet to true to generate DRC violations from overlapping courtyards.

Definition at line 814 of file board_design_settings.cpp.

References m_ProhibitOverlappingCourtyards.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

815 {
817 }
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
void BOARD_DESIGN_SETTINGS::SetRequireCourtyardDefinitions ( bool  aRequire)

Function SetRequireCourtyardDefinitions.

Parameters
aRequireSet to true to generate DRC violations from missing courtyards.

Definition at line 808 of file board_design_settings.cpp.

References m_RequireCourtyards.

Referenced by PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow().

809 {
810  m_RequireCourtyards = aRequire;
811 }
bool m_RequireCourtyards
require courtyard definitions in footprints
void BOARD_DESIGN_SETTINGS::SetTrackWidthIndex ( unsigned  aIndex)

Function SetTrackWidthIndex sets the current track width list index to aIndex.

Parameters
aIndexis the track width list index.

Definition at line 788 of file board_design_settings.cpp.

References m_trackWidthIndex, m_TrackWidthList, m_useCustomTrackVia, and min.

Referenced by TRACK_WIDTH_MENU::eventHandler(), PCB_EDIT_FRAME::OnHotKey(), DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::processItem(), SetCurrentNetClass(), PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event(), PCB_EDITOR_CONTROL::TrackWidthDec(), PCB_EDITOR_CONTROL::TrackWidthInc(), and PCB_EDIT_FRAME::UpdateTrackWidthSelectBox().

789 {
790  m_trackWidthIndex = std::min( aIndex, (unsigned) m_TrackWidthList.size() );
791  m_useCustomTrackVia = false;
792 }
std::vector< int > m_TrackWidthList
#define min(a, b)
Definition: auxiliary.h:85
void BOARD_DESIGN_SETTINGS::SetViaSizeIndex ( unsigned  aIndex)

Function SetViaSizeIndex sets the current via size list index to aIndex.

Parameters
aIndexis the via size list index.

Definition at line 768 of file board_design_settings.cpp.

References m_useCustomTrackVia, m_ViasDimensionsList, m_viaSizeIndex, and min.

Referenced by TRACK_WIDTH_MENU::eventHandler(), DIALOG_GLOBAL_EDIT_TRACKS_AND_VIAS::processItem(), SetCurrentNetClass(), PCB_EDIT_FRAME::Tracks_and_Vias_Size_Event(), PCB_EDIT_FRAME::UpdateViaSizeSelectBox(), PCB_EDITOR_CONTROL::ViaSizeDec(), and PCB_EDITOR_CONTROL::ViaSizeInc().

769 {
770  m_viaSizeIndex = std::min( aIndex, (unsigned) m_ViasDimensionsList.size() );
771  m_useCustomTrackVia = false;
772 }
std::vector< VIA_DIMENSION > m_ViasDimensionsList
#define min(a, b)
Definition: auxiliary.h:85
void BOARD_DESIGN_SETTINGS::SetVisibleAlls ( )

Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers.

Definition at line 820 of file board_design_settings.cpp.

References m_visibleElements, and SetVisibleLayers().

821 {
822  SetVisibleLayers( LSET().set() );
823  m_visibleElements = -1;
824 }
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
Class LSET is a set of PCB_LAYER_IDs.
int m_visibleElements
Bit-mask for element category visibility.
void BOARD_DESIGN_SETTINGS::SetVisibleElements ( int  aMask)
inline

Function SetVisibleElements changes the bit-mask of visible element categories.

Parameters
aMask= The new bit-mask of visible element categories

Definition at line 655 of file board_design_settings.h.

Referenced by LEGACY_PLUGIN::loadSETUP(), and PCB_PARSER::parseSetup().

656  {
657  m_visibleElements = aMask;
658  }
int m_visibleElements
Bit-mask for element category visibility.
void BOARD_DESIGN_SETTINGS::SetVisibleLayers ( LSET  aMask)
inline

Function SetVisibleLayers changes the bit-mask of visible layers.

Parameters
aMask= The new bit-mask of visible layers

Definition at line 615 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), SetVisibleAlls(), and BOARD::SetVisibleLayers().

616  {
618  }
LSET m_visibleLayers
Bit-mask for layer visibility.
LSET m_enabledLayers
Bit-mask for layer enabling.
void BOARD_DESIGN_SETTINGS::UseCustomDiffPairDimensions ( bool  aEnabled)
inline

Function UseCustomDiffPairDimensions Enables/disables custom differential pair dimensions.

Parameters
aEnableddecides if custom settings should be used for new differential pairs.

Definition at line 560 of file board_design_settings.h.

Referenced by DIFF_PAIR_MENU::eventHandler(), PNS::SIZES_SETTINGS::Init(), and DIFF_PAIR_MENU::update().

561  {
562  m_useCustomDiffPair = aEnabled;
563  }
bool BOARD_DESIGN_SETTINGS::UseCustomDiffPairDimensions ( ) const
inline

Function UseCustomDiffPairDimensions.

Returns
True if custom sizes of diff pairs are enabled, false otherwise.

Definition at line 569 of file board_design_settings.h.

570  {
571  return m_useCustomDiffPair;
572  }
void BOARD_DESIGN_SETTINGS::UseCustomTrackViaSize ( bool  aEnabled)
inline

Function UseCustomTrackViaSize Enables/disables custom track/via size settings.

If enabled, values set with SetCustomTrackWidth()/SetCustomViaSize()/SetCustomViaDrill() are used for newly created tracks and vias.

Parameters
aEnableddecides if custom settings should be used for new tracks/vias.

Definition at line 469 of file board_design_settings.h.

Referenced by BOARD::BOARD(), ROUTER_TOOL::CustomTrackWidthDialog(), TRACK_WIDTH_MENU::eventHandler(), PCB_EDITOR_CONTROL::TrackWidthDec(), PCB_EDITOR_CONTROL::TrackWidthInc(), TRACK_WIDTH_MENU::update(), PCB_EDITOR_CONTROL::ViaSizeDec(), and PCB_EDITOR_CONTROL::ViaSizeInc().

470  {
471  m_useCustomTrackVia = aEnabled;
472  }
bool BOARD_DESIGN_SETTINGS::UseCustomTrackViaSize ( ) const
inline

Function UseCustomTrackViaSize.

Returns
True if custom sizes of tracks & vias are enabled, false otherwise.

Definition at line 478 of file board_design_settings.h.

479  {
480  return m_useCustomTrackVia;
481  }
bool BOARD_DESIGN_SETTINGS::UseNetClassTrack ( ) const
inline

Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track width.

Definition at line 285 of file board_design_settings.h.

Referenced by PNS::SIZES_SETTINGS::Init().

286  {
287  return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
288  }
bool BOARD_DESIGN_SETTINGS::UseNetClassVia ( ) const
inline

Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size.

Definition at line 294 of file board_design_settings.h.

Referenced by PNS::SIZES_SETTINGS::Init().

295  {
296  return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
297  }

Member Data Documentation

wxPoint BOARD_DESIGN_SETTINGS::m_AuxOrigin

origin for plot exports

Definition at line 226 of file board_design_settings.h.

Referenced by BOARD::GetAuxOrigin(), LEGACY_PLUGIN::loadSETUP(), PCB_PARSER::parseSetup(), and BOARD::SetAuxOrigin().

int BOARD_DESIGN_SETTINGS::m_boardThickness
private

Board thickness for 3D viewer.

Definition at line 254 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS().

int BOARD_DESIGN_SETTINGS::m_copperLayerCount
private

Number of copper layers for this design.

Definition at line 248 of file board_design_settings.h.

Referenced by SetCopperLayerCount(), and SetEnabledLayers().

wxString BOARD_DESIGN_SETTINGS::m_currentNetClassName
private

Current net class name used to display netclass info.

This is also the last used netclass after starting a track.

Definition at line 258 of file board_design_settings.h.

Referenced by GetCurrentMicroViaDrill(), GetCurrentMicroViaSize(), and SetCurrentNetClass().

VIATYPE_T BOARD_DESIGN_SETTINGS::m_CurrentViaType
DIFF_PAIR_DIMENSION BOARD_DESIGN_SETTINGS::m_customDiffPair
private

Definition at line 246 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS().

int BOARD_DESIGN_SETTINGS::m_customTrackWidth
private

Definition at line 241 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS().

VIA_DIMENSION BOARD_DESIGN_SETTINGS::m_customViaSize
private

Definition at line 242 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), and GetCurrentViaDrill().

unsigned BOARD_DESIGN_SETTINGS::m_diffPairIndex
private

Definition at line 237 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), and SetDiffPairIndex().

LSET BOARD_DESIGN_SETTINGS::m_enabledLayers
private

Bit-mask for layer enabling.

Definition at line 250 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), SetCopperLayerCount(), and SetEnabledLayers().

wxPoint BOARD_DESIGN_SETTINGS::m_GridOrigin

origin for grid offsets

Definition at line 227 of file board_design_settings.h.

Referenced by BOARD::GetGridOrigin(), LEGACY_PLUGIN::loadSETUP(), PCB_PARSER::parseSetup(), and BOARD::SetGridOrigin().

int BOARD_DESIGN_SETTINGS::m_HoleToHoleMin
bool BOARD_DESIGN_SETTINGS::m_ProhibitOverlappingCourtyards
int BOARD_DESIGN_SETTINGS::m_RefDefaultlayer
wxString BOARD_DESIGN_SETTINGS::m_RefDefaultText
bool BOARD_DESIGN_SETTINGS::m_RefDefaultVisibility
bool BOARD_DESIGN_SETTINGS::m_RequireCourtyards
double BOARD_DESIGN_SETTINGS::m_SolderPasteMarginRatio
unsigned BOARD_DESIGN_SETTINGS::m_trackWidthIndex
private

Definition at line 235 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), and SetTrackWidthIndex().

bool BOARD_DESIGN_SETTINGS::m_useCustomDiffPair
private

Definition at line 245 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), and SetDiffPairIndex().

bool BOARD_DESIGN_SETTINGS::m_useCustomTrackVia
private
int BOARD_DESIGN_SETTINGS::m_ValueDefaultlayer
wxString BOARD_DESIGN_SETTINGS::m_ValueDefaultText
bool BOARD_DESIGN_SETTINGS::m_ValueDefaultVisibility
unsigned BOARD_DESIGN_SETTINGS::m_viaSizeIndex
private
int BOARD_DESIGN_SETTINGS::m_visibleElements
private

Bit-mask for element category visibility.

Definition at line 253 of file board_design_settings.h.

Referenced by BOARD_DESIGN_SETTINGS(), SetElementVisibility(), and SetVisibleAlls().

LSET BOARD_DESIGN_SETTINGS::m_visibleLayers
private

Bit-mask for layer visibility.

Definition at line 251 of file board_design_settings.h.

Referenced by SetEnabledLayers(), and SetLayerVisibility().


The documentation for this class was generated from the following files: