KiCad PCB EDA Suite
board_design_settings.h
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24 
25 #ifndef BOARD_DESIGN_SETTINGS_H_
26 #define BOARD_DESIGN_SETTINGS_H_
27 
28 #include <class_pad.h>
29 #include <class_track.h>
30 #include <netclass.h>
31 #include <config_params.h>
32 
33 #define DEFAULT_SILK_LINE_WIDTH 0.12
34 #define DEFAULT_COPPER_LINE_WIDTH 0.20
35 #define DEFAULT_EDGE_WIDTH 0.05
36 #define DEFAULT_COURTYARD_WIDTH 0.05
37 #define DEFAULT_LINE_WIDTH 0.10
38 
39 #define DEFAULT_SILK_TEXT_SIZE 1.0
40 #define DEFAULT_COPPER_TEXT_SIZE 1.5
41 #define DEFAULT_TEXT_SIZE 1.0
42 
43 #define DEFAULT_SILK_TEXT_WIDTH 0.15
44 #define DEFAULT_COPPER_TEXT_WIDTH 0.30
45 #define DEFAULT_TEXT_WIDTH 0.15
46 
47 // Board thickness, mainly for 3D view:
48 #define DEFAULT_BOARD_THICKNESS_MM 1.6
49 
50 #define DEFAULT_PCB_EDGE_THICKNESS 0.15
51 
52 #define DEFAULT_SOLDERMASK_CLEARANCE 0.051 // soldermask to pad clearance
53 #define DEFAULT_SOLDERMASK_MIN_WIDTH 0.25 // soldermask minimum dam size
54 #define DEFAULT_SOLDERPASTE_CLEARANCE 0.0
55 #define DEFAULT_SOLDERPASTE_RATIO 0.0
56 
57 #define DEFAULT_CUSTOMTRACKWIDTH 0.2
58 #define DEFAULT_CUSTOMDPAIRWIDTH 0.125
59 #define DEFAULT_CUSTOMDPAIRGAP 0.18
60 #define DEFAULT_CUSTOMDPAIRVIAGAP 0.18
61 
62 #define DEFAULT_TRACKMINWIDTH 0.2 // track width min value
63 #define DEFAULT_VIASMINSIZE 0.4 // vias (not micro vias) min diameter
64 #define DEFAULT_VIASMINDRILL 0.3 // vias (not micro vias) min drill diameter
65 #define DEFAULT_MICROVIASMINSIZE 0.2 // micro vias (not vias) min diameter
66 #define DEFAULT_MICROVIASMINDRILL 0.1 // micro vias (not vias) min drill diameter
67 #define DEFAULT_HOLETOHOLEMIN 0.25 // separation between drilled hole edges
68 
69 #define DEFAULT_COPPEREDGECLEARANCE 0.01 // clearance between copper items and edge cuts
70 #define LEGACY_COPPEREDGECLEARANCE -0.01 // A flag to indicate the legacy method (based
71  // on edge cut line thicknesses) should be used.
72 
79 {
80  int m_Diameter; // <= 0 means use Netclass via diameter
81  int m_Drill; // <= 0 means use Netclass via drill
82 
84  {
85  m_Diameter = 0;
86  m_Drill = 0;
87  }
88 
89  VIA_DIMENSION( int aDiameter, int aDrill )
90  {
91  m_Diameter = aDiameter;
92  m_Drill = aDrill;
93  }
94 
95  bool operator==( const VIA_DIMENSION& aOther ) const
96  {
97  return ( m_Diameter == aOther.m_Diameter ) && ( m_Drill == aOther.m_Drill );
98  }
99 
100  bool operator<( const VIA_DIMENSION& aOther ) const
101  {
102  if( m_Diameter != aOther.m_Diameter )
103  return m_Diameter < aOther.m_Diameter;
104 
105  return m_Drill < aOther.m_Drill;
106  }
107 };
108 
109 
116 {
117  int m_Width; // <= 0 means use Netclass differential pair width
118  int m_Gap; // <= 0 means use Netclass differential pair gap
119  int m_ViaGap; // <= 0 means use Netclass differential pair via gap
120 
122  {
123  m_Width = 0;
124  m_Gap = 0;
125  m_ViaGap = 0;
126  }
127 
128  DIFF_PAIR_DIMENSION( int aWidth, int aGap, int aViaGap )
129  {
130  m_Width = aWidth;
131  m_Gap = aGap;
132  m_ViaGap = aViaGap;
133  }
134 
135  bool operator==( const DIFF_PAIR_DIMENSION& aOther ) const
136  {
137  return ( m_Width == aOther.m_Width )
138  && ( m_Gap == aOther.m_Gap )
139  && ( m_ViaGap == aOther.m_ViaGap );
140  }
141 
142  bool operator<( const DIFF_PAIR_DIMENSION& aOther ) const
143  {
144  if( m_Width != aOther.m_Width )
145  return m_Width < aOther.m_Width;
146 
147  if( m_Gap != aOther.m_Gap )
148  return m_Gap < aOther.m_Gap;
149 
150  return m_ViaGap < aOther.m_ViaGap;
151  }
152 };
153 
154 
155 enum
156 {
162 
164 };
165 
166 
172 {
173 public:
174  // Note: the first value in each dimensions list is the current netclass value
175  std::vector<int> m_TrackWidthList;
176  std::vector<VIA_DIMENSION> m_ViasDimensionsList;
177  std::vector<DIFF_PAIR_DIMENSION> m_DiffPairDimensionsList;
178 
179  // List of netclasses. There is always the default netclass.
181 
185 
188 
189  // if true, when creating a new track starting on an existing track, use this track width
197 
198  // Global mask margins:
201  // 2 areas near than m_SolderMaskMinWidth
202  // are merged
205 
208 
209  // Arrays of default values for the various layer classes.
215 
216  // Variables used in footprint editing (default value in item/footprint creation)
217 
218  wxString m_RefDefaultText;
219  // if empty, use footprint name as default
222  // should be a PCB_LAYER_ID, but use an int
223  // to save this param in config
224 
226  // if empty, use footprint name as default
229  // should be a PCB_LAYER_ID, but use an int
230  // to save this param in config
231 
232  // Miscellaneous
233  wxPoint m_AuxOrigin;
234  wxPoint m_GridOrigin;
235 
237  // when importing values or create a new pad
238 
239 private:
240  // Indicies into the trackWidth, viaSizes and diffPairDimensions lists.
241  // The 0 index is always the current netclass value(s)
243  unsigned m_viaSizeIndex;
244  unsigned m_diffPairIndex;
245 
246  // Custom values for track/via sizes (specified via dialog instead of netclass or lists)
250 
251  // Custom values for differential pairs (specified via dialog instead of netclass/lists)
254 
256 
259 
262 
266 
267 public:
269 
274  inline NETCLASSPTR GetDefault() const
275  {
276  return m_NetClasses.GetDefault();
277  }
278 
283  inline const wxString& GetCurrentNetClassName() const
284  {
285  return m_currentNetClassName;
286  }
287 
292  inline bool UseNetClassTrack() const
293  {
294  return ( m_trackWidthIndex == 0 && !m_useCustomTrackVia );
295  }
296 
301  inline bool UseNetClassVia() const
302  {
303  return ( m_viaSizeIndex == 0 && !m_useCustomTrackVia );
304  }
305 
310  inline bool UseNetClassDiffPair() const
311  {
312  return ( m_diffPairIndex == 0 && !m_useCustomDiffPair );
313  }
314 
323  bool SetCurrentNetClass( const wxString& aNetClassName );
324 
330 
336 
343 
350 
355  inline unsigned GetTrackWidthIndex() const { return m_trackWidthIndex; }
356 
363  void SetTrackWidthIndex( unsigned aIndex );
364 
371  inline int GetCurrentTrackWidth() const
372  {
374  }
375 
383  inline void SetCustomTrackWidth( int aWidth )
384  {
385  m_customTrackWidth = aWidth;
386  }
387 
392  inline int GetCustomTrackWidth() const
393  {
394  return m_customTrackWidth;
395  }
396 
401  inline unsigned GetViaSizeIndex() const
402  {
403  return m_viaSizeIndex;
404  }
405 
412  void SetViaSizeIndex( unsigned aIndex );
413 
420  inline int GetCurrentViaSize() const
421  {
422  if( m_useCustomTrackVia )
424  else
425  return m_ViasDimensionsList[m_viaSizeIndex].m_Diameter;
426  }
427 
435  inline void SetCustomViaSize( int aSize )
436  {
437  m_customViaSize.m_Diameter = aSize;
438  }
439 
444  inline int GetCustomViaSize() const
445  {
447  }
448 
455  int GetCurrentViaDrill() const;
456 
464  inline void SetCustomViaDrill( int aDrill )
465  {
466  m_customViaSize.m_Drill = aDrill;
467  }
468 
473  inline int GetCustomViaDrill() const
474  {
475  return m_customViaSize.m_Drill;
476  }
477 
485  inline void UseCustomTrackViaSize( bool aEnabled )
486  {
487  m_useCustomTrackVia = aEnabled;
488  }
489 
494  inline bool UseCustomTrackViaSize() const
495  {
496  return m_useCustomTrackVia;
497  }
498 
503  inline unsigned GetDiffPairIndex() const { return m_diffPairIndex; }
504 
509  void SetDiffPairIndex( unsigned aIndex );
510 
517  inline void SetCustomDiffPairWidth( int aWidth )
518  {
519  m_customDiffPair.m_Width = aWidth;
520  }
521 
527  {
528  return m_customDiffPair.m_Width;
529  }
530 
537  inline void SetCustomDiffPairGap( int aGap )
538  {
539  m_customDiffPair.m_Gap = aGap;
540  }
541 
546  inline int GetCustomDiffPairGap()
547  {
548  return m_customDiffPair.m_Gap;
549  }
550 
557  inline void SetCustomDiffPairViaGap( int aGap )
558  {
559  m_customDiffPair.m_ViaGap = aGap;
560  }
561 
567  {
569  }
570 
576  inline void UseCustomDiffPairDimensions( bool aEnabled )
577  {
578  m_useCustomDiffPair = aEnabled;
579  }
580 
585  inline bool UseCustomDiffPairDimensions() const
586  {
587  return m_useCustomDiffPair;
588  }
589 
596  inline int GetCurrentDiffPairWidth() const
597  {
598  if( m_useCustomDiffPair )
599  return m_customDiffPair.m_Width;
600  else
602  }
603 
610  inline int GetCurrentDiffPairGap() const
611  {
612  if( m_useCustomDiffPair )
613  return m_customDiffPair.m_Gap;
614  else
616  }
617 
624  inline int GetCurrentDiffPairViaGap() const
625  {
626  if( m_useCustomDiffPair )
627  return m_customDiffPair.m_ViaGap;
628  else
629  return m_DiffPairDimensionsList[m_diffPairIndex].m_ViaGap;
630  }
631 
637  void SetMinHoleSeparation( int aDistance );
638 
643  void SetCopperEdgeClearance( int aDistance );
644 
649  void SetRequireCourtyardDefinitions( bool aRequire );
650 
655  void SetProhibitOverlappingCourtyards( bool aProhibit );
656 
662  inline LSET GetVisibleLayers() const
663  {
664  return m_visibleLayers;
665  }
666 
672  void SetVisibleAlls();
673 
679  inline void SetVisibleLayers( LSET aMask )
680  {
682  }
683 
690  inline bool IsLayerVisible( PCB_LAYER_ID aLayerId ) const
691  {
692  // If a layer is disabled, it is automatically invisible
693  return (m_visibleLayers & m_enabledLayers)[aLayerId];
694  }
695 
702  void SetLayerVisibility( PCB_LAYER_ID aLayerId, bool aNewState );
703 
709  inline int GetVisibleElements() const
710  {
711  return m_visibleElements;
712  }
713 
719  inline void SetVisibleElements( int aMask )
720  {
721  m_visibleElements = aMask;
722  }
723 
732  inline bool IsElementVisible( GAL_LAYER_ID aElementCategory ) const
733  {
734  return ( m_visibleElements & ( 1 << GAL_LAYER_INDEX( aElementCategory ) ) );
735  }
736 
744  void SetElementVisibility( GAL_LAYER_ID aElementCategory, bool aNewState );
745 
751  inline LSET GetEnabledLayers() const
752  {
753  return m_enabledLayers;
754  }
755 
761  void SetEnabledLayers( LSET aMask );
762 
769  inline bool IsLayerEnabled( PCB_LAYER_ID aLayerId ) const
770  {
771  return m_enabledLayers[aLayerId];
772  }
773 
778  inline int GetCopperLayerCount() const
779  {
780  return m_copperLayerCount;
781  }
782 
788  void SetCopperLayerCount( int aNewLayerCount );
789 
796  void AppendConfigs( BOARD* aBoard, PARAM_CFG_ARRAY* aResult );
797 
798  inline int GetBoardThickness() const { return m_boardThickness; }
799  inline void SetBoardThickness( int aThickness ) { m_boardThickness = aThickness; }
800 
805  int GetLineThickness( PCB_LAYER_ID aLayer ) const;
806 
811  wxSize GetTextSize( PCB_LAYER_ID aLayer ) const;
812 
817  int GetTextThickness( PCB_LAYER_ID aLayer ) const;
818 
819  bool GetTextItalic( PCB_LAYER_ID aLayer ) const;
820  bool GetTextUpright( PCB_LAYER_ID aLayer ) const;
821 
822  int GetLayerClass( PCB_LAYER_ID aLayer ) const;
823 
824 private:
825  void formatNetClass( NETCLASS* aNetClass, OUTPUTFORMATTER* aFormatter, int aNestLevel,
826  int aControlBits ) const;
827 };
828 
829 #endif // BOARD_DESIGN_SETTINGS_H_
bool IsElementVisible(GAL_LAYER_ID aElementCategory) const
Function IsElementVisible tests whether a given element category is visible.
int GetCurrentMicroViaSize()
Function GetCurrentMicroViaSize.
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
bool UseNetClassTrack() const
Function UseNetClassTrack returns true if netclass values should be used to obtain appropriate track ...
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void SetEnabledLayers(LSET aMask)
Function SetEnabledLayers changes the bit-mask of enabled layers.
A list of parameters type.
void SetCopperEdgeClearance(int aDistance)
Function SetCopperEdgeClearance.
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
bool UseCustomDiffPairDimensions() const
Function UseCustomDiffPairDimensions.
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
VIATYPE_T m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
int GetCustomViaSize() const
Function GetCustomViaSize.
wxString m_currentNetClassName
Current net class name used to display netclass info.
wxPoint m_GridOrigin
origin for grid offsets
int GetCurrentViaDrill() const
Function GetCurrentViaDrill.
int m_SolderPasteMargin
Solder paste margin absolute value.
int GetCurrentTrackWidth() const
Function GetCurrentTrackWidth.
void SetCustomDiffPairViaGap(int aGap)
Function SetCustomDiffPairViaGap Sets custom via gap for differential pairs (i.e.
void formatNetClass(NETCLASS *aNetClass, OUTPUTFORMATTER *aFormatter, int aNestLevel, int aControlBits) const
std::vector< int > m_TrackWidthList
int GetSmallestClearanceValue()
Function GetSmallestClearanceValue.
int GetBiggestClearanceValue()
Function GetBiggestClearanceValue.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
int GetCurrentDiffPairGap() const
Function GetCurrentDiffPairGap.
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
int GetCurrentMicroViaDrill()
Function GetCurrentMicroViaDrill.
bool UseNetClassDiffPair() const
Function UseNetClassDiffPair returns true if netclass values should be used to obtain appropriate dif...
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
void SetCustomViaDrill(int aDrill)
Function SetCustomViaDrill Sets custom size for via drill (i.e.
void SetLayerVisibility(PCB_LAYER_ID aLayerId, bool aNewState)
Function SetLayerVisibility changes the visibility of a given layer.
void UseCustomDiffPairDimensions(bool aEnabled)
Function UseCustomDiffPairDimensions Enables/disables custom differential pair dimensions.
bool operator<(const VIA_DIMENSION &aOther) const
GAL_LAYER_ID
GAL layers are "virtual" layers, i.e.
bool IsLayerVisible(PCB_LAYER_ID aLayerId) const
Function IsLayerVisible tests whether a given layer is visible.
The common library.
bool operator<(const DIFF_PAIR_DIMENSION &aOther) const
Class OUTPUTFORMATTER is an important interface (abstract class) used to output 8 bit text in a conve...
Definition: richio.h:327
int m_ValueDefaultlayer
Default value text layer on fp creation.
void SetVisibleAlls()
Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers...
DIFF_PAIR_DIMENSION m_customDiffPair
int GetTextThickness(PCB_LAYER_ID aLayer) const
Function GetTextThickness Returns the default text thickness from the layer class for the given layer...
VIATYPE_T
Definition: class_track.h:57
void SetBoardThickness(int aThickness)
Struct DIFF_PAIR_DIMENSION is a small helper container to handle a stock of specific differential pai...
void SetCustomViaSize(int aSize)
Function SetCustomViaSize Sets custom size for via diameter (i.e.
int GetCustomDiffPairWidth()
Function GetCustomDiffPairWidth.
Functions relatives to tracks, vias and segments used to fill zones.
int GetLayerClass(PCB_LAYER_ID aLayer) const
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
bool GetTextUpright(PCB_LAYER_ID aLayer) const
bool GetTextItalic(PCB_LAYER_ID aLayer) const
int GetLineThickness(PCB_LAYER_ID aLayer) const
Function GetLineThickness Returns the default graphic segment thickness from the layer class for the ...
bool UseCustomTrackViaSize() const
Function UseCustomTrackViaSize.
int GetCustomViaDrill() const
Function GetCustomViaDrill.
wxSize m_TextSize[LAYER_CLASS_COUNT]
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
PCB_LAYER_ID
A quick note on layer IDs:
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
Class LSET is a set of PCB_LAYER_IDs.
Class NETCLASSES is a container for NETCLASS instances.
Definition: netclass.h:224
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
const wxString & GetCurrentNetClassName() const
Function GetCurrentNetClassName.
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
void SetMinHoleSeparation(int aDistance)
Function SetMinHoleSeparation.
int m_TrackMinWidth
track min value for width ((min copper size value
bool UseNetClassVia() const
Function UseNetClassVia returns true if netclass values should be used to obtain appropriate via size...
void SetCustomDiffPairWidth(int aWidth)
Function SetCustomDiffPairWidth Sets custom track width for differential pairs (i....
int m_ViasMinSize
vias (not micro vias) min diameter
int GetCustomTrackWidth() const
Function GetCustomTrackWidth.
Class NETCLASS handles a collection of nets and the parameters used to route or test these nets.
Definition: netclass.h:55
int GetCurrentDiffPairWidth() const
Function GetCurrentDiffPairWidth.
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
void SetDiffPairIndex(unsigned aIndex)
Function SetDiffPairIndex.
wxString m_ValueDefaultText
Default value text on fp creation.
void SetCustomDiffPairGap(int aGap)
Function SetCustomDiffPairGap Sets custom gap for differential pairs (i.e.
int m_MicroViasMinSize
micro vias (not vias) min diameter
int m_LineThickness[LAYER_CLASS_COUNT]
void AppendConfigs(BOARD *aBoard, PARAM_CFG_ARRAY *aResult)
Function AppendConfigs appends to aResult the configuration setting accessors which will later allow ...
void SetCustomTrackWidth(int aWidth)
Function SetCustomTrackWidth Sets custom width for track (i.e.
Pad object description.
LSET m_visibleLayers
Bit-mask for layer visibility.
bool operator==(const VIA_DIMENSION &aOther) const
int m_visibleElements
Bit-mask for element category visibility.
bool m_RequireCourtyards
require courtyard definitions in footprints
int GetCurrentViaSize() const
Function GetCurrentViaSize.
LSET GetVisibleLayers() const
Function GetVisibleLayers returns a bit-mask of all the layers that are visible.
bool SetCurrentNetClass(const wxString &aNetClassName)
Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter ...
int GetVisibleElements() const
Function GetVisibleElements returns a bit-mask of all the element categories that are visible.
NETCLASSPTR GetDefault() const
Function GetDefault.
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:170
LSET GetEnabledLayers() const
Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.
int GetCustomDiffPairViaGap()
Function GetCustomDiffPairViaGap.
void SetProhibitOverlappingCourtyards(bool aProhibit)
Function SetProhibitOverlappingCourtyards.
D_PAD m_Pad_Master
A dummy pad to store all default parameters.
void SetVisibleElements(int aMask)
Function SetVisibleElements changes the bit-mask of visible element categories.
int GetCurrentDiffPairViaGap() const
Function GetCurrentDiffPairViaGap.
int m_RefDefaultlayer
Default ref text layer on fp creation.
void SetElementVisibility(GAL_LAYER_ID aElementCategory, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
std::vector< VIA_DIMENSION > m_ViasDimensionsList
DIFF_PAIR_DIMENSION(int aWidth, int aGap, int aViaGap)
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
bool operator==(const DIFF_PAIR_DIMENSION &aOther) const
VIA_DIMENSION(int aDiameter, int aDrill)
unsigned GetDiffPairIndex() const
Function GetDiffPairIndex.
int m_copperLayerCount
Number of copper layers for this design.
bool m_MicroViasAllowed
true to allow micro vias
void SetRequireCourtyardDefinitions(bool aRequire)
Function SetRequireCourtyardDefinitions.
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values.
int GetCopperLayerCount() const
Function GetCopperLayerCount.
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
wxPoint m_AuxOrigin
origin for plot exports
wxSize GetTextSize(PCB_LAYER_ID aLayer) const
Function GetTextSize Returns the default text size from the layer class for the given layer.
int m_boardThickness
Board thickness for 3D viewer.
int GetCustomDiffPairGap()
Function GetCustomDiffPairGap.
bool m_TextUpright[LAYER_CLASS_COUNT]
void UseCustomTrackViaSize(bool aEnabled)
Function UseCustomTrackViaSize Enables/disables custom track/via size settings.
int m_SolderMaskMinWidth
Solder mask min width.
Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.