KiCad PCB EDA Suite
board_design_settings.cpp
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1 /*
2  * This program source code file is part of KiCad, a free EDA CAD application.
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23 
29 #include <fctsys.h>
30 #include <common.h>
31 #include <class_board.h>
33 #include <kiface_i.h>
34 #include <pcbnew.h>
35 #include <board_design_settings.h>
36 
37 
38 #define CopperLayerCountKey wxT( "CopperLayerCount" )
39 #define BoardThicknessKey wxT( "BoardThickness" )
40 
41 #define LayerKeyPrefix wxT( "Layer" )
42 #define LayerNameKey wxT( "Name" )
43 #define LayerTypeKey wxT( "Type" )
44 #define LayerEnabledKey wxT( "Enabled" )
45 
46 #define NetclassNameKey wxT( "Name" )
47 #define ClearanceKey wxT( "Clearance" )
48 #define TrackWidthKey wxT( "TrackWidth" )
49 #define ViaDiameterKey wxT( "ViaDiameter" )
50 #define ViaDrillKey wxT( "ViaDrill" )
51 #define uViaDiameterKey wxT( "uViaDiameter" )
52 #define uViaDrillKey wxT( "uViaDrill" )
53 #define dPairWidthKey wxT( "dPairWidth" )
54 #define dPairGapKey wxT( "dPairGap" )
55 #define dPairViaGapKey wxT( "dPairViaGap" )
56 
57 
58 //
59 // NOTE: layer configuration info is stored in both the BOARD and BOARD_DESIGN_SETTINGS so one
60 // of the two needs to read/write the config so we don't end up with order dependency issues.
61 //
63 {
64 protected:
66 
67 public:
68  PARAM_CFG_LAYERS( BOARD* ptparam, const wxChar* group = nullptr ) :
69  PARAM_CFG_BASE( wxEmptyString, PARAM_LAYERS, group )
70  {
71  m_Pt_param = ptparam;
72  }
73 
74  void ReadParam( wxConfigBase* aConfig ) const override
75  {
76  if( !m_Pt_param || !aConfig )
77  return;
78 
79  BOARD* board = m_Pt_param;
81  LSET enabledLayers = bds.GetEnabledLayers();
82  wxString oldPath = aConfig->GetPath();
83  wxString layerKeyPrefix = LayerKeyPrefix;
84 
85  bds.SetCopperLayerCount( aConfig->Read( CopperLayerCountKey, 2 ) );
86 
87  double thickness = aConfig->ReadDouble( BoardThicknessKey, DEFAULT_BOARD_THICKNESS_MM );
88  bds.SetBoardThickness( Millimeter2iu( thickness ) );
89 
90  for( LSEQ seq = LSET::AllLayersMask().Seq(); seq; ++seq )
91  {
92  PCB_LAYER_ID layer = *seq;
93  wxString path = layerKeyPrefix + wxT( "." ) + board->GetStandardLayerName( layer );
94  wxString layerName;
95  int layerType;
96  bool layerEnabled;
97 
98  aConfig->SetPath( oldPath );
99  aConfig->SetPath( path );
100 
101  if( aConfig->Read( LayerNameKey, &layerName ) )
102  board->SetLayerName( layer, layerName );
103 
104  if( aConfig->Read( LayerTypeKey, &layerType ) )
105  board->SetLayerType( layer, (LAYER_T) layerType );
106 
107  if( aConfig->Read( LayerEnabledKey, &layerEnabled ) )
108  enabledLayers.set( layer, layerEnabled );
109  }
110 
111  board->SetEnabledLayers( enabledLayers );
112 
113  aConfig->SetPath( oldPath );
114  }
115 
116  void SaveParam( wxConfigBase* aConfig ) const override
117  {
118  if( !m_Pt_param || !aConfig )
119  return;
120 
121  BOARD* board = m_Pt_param;
123  wxString oldPath = aConfig->GetPath();
124  wxString layerKeyPrefix = LayerKeyPrefix;
125 
126  aConfig->Write( CopperLayerCountKey, board->GetCopperLayerCount() );
127  aConfig->Write( BoardThicknessKey, Iu2Millimeter( bds.GetBoardThickness() ) );
128 
129  for( LSEQ seq = LSET::AllLayersMask().Seq(); seq; ++seq )
130  {
131  PCB_LAYER_ID layer = *seq;
132  wxString path = layerKeyPrefix + wxT( "." ) + board->GetStandardLayerName( layer );
133  wxString layerName = board->GetLayerName( layer );
134  LAYER_T layerType = board->GetLayerType( layer );
135 
136  aConfig->SetPath( oldPath );
137  aConfig->SetPath( path );
138 
139  if( IsCopperLayer( layer ) )
140  {
141  aConfig->Write( LayerNameKey, layerName );
142  aConfig->Write( LayerTypeKey, (int) layerType );
143  }
144 
145  aConfig->Write( LayerEnabledKey, board->IsLayerEnabled( layer ) );
146  }
147 
148  aConfig->SetPath( oldPath );
149  }
150 };
151 
152 
154 {
155 protected:
156  std::vector<int>* m_Pt_param;
157 
158 public:
159  PARAM_CFG_TRACKWIDTHS( std::vector<int>* ptparam, const wxChar* group = nullptr ) :
160  PARAM_CFG_BASE( wxEmptyString, PARAM_TRACKWIDTHS, group )
161  {
162  m_Pt_param = ptparam;
163  }
164 
165  void ReadParam( wxConfigBase* aConfig ) const override
166  {
167  if( !m_Pt_param || !aConfig )
168  return;
169 
170  m_Pt_param->clear();
171 
172  for( int index = 1; ; ++index )
173  {
174  wxString key = TrackWidthKey;
175  double width;
176 
177  if( !aConfig->Read( key << index, &width ) )
178  break;
179 
180  m_Pt_param->push_back( Millimeter2iu( width ) );
181  }
182  }
183 
184  void SaveParam( wxConfigBase* aConfig ) const override
185  {
186  if( !m_Pt_param || !aConfig )
187  return;
188 
189  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
190  {
191  wxString key = TrackWidthKey;
192  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ) ) );
193  }
194  }
195 };
196 
197 
199 {
200 protected:
201  std::vector<VIA_DIMENSION>* m_Pt_param;
202 
203 public:
204  PARAM_CFG_VIADIMENSIONS( std::vector<VIA_DIMENSION>* ptparam, const wxChar* group = nullptr ) :
205  PARAM_CFG_BASE( wxEmptyString, PARAM_VIADIMENSIONS, group )
206  {
207  m_Pt_param = ptparam;
208  }
209 
210  void ReadParam( wxConfigBase* aConfig ) const override
211  {
212  if( !m_Pt_param || !aConfig )
213  return;
214 
215  m_Pt_param->clear();
216 
217  for( int index = 1; ; ++index )
218  {
219  double diameter = 0.0, drill = 0.0;
220 
221  wxString key = ViaDiameterKey;
222 
223  if( !aConfig->Read( key << index, &diameter ) )
224  break;
225 
226  key = ViaDrillKey;
227  drill = aConfig->ReadDouble( key << index, 0.0 );
228 
229  m_Pt_param->emplace_back( VIA_DIMENSION( Millimeter2iu( diameter ),
230  Millimeter2iu( drill ) ) );
231  }
232  }
233 
234  void SaveParam( wxConfigBase* aConfig ) const override
235  {
236  if( !m_Pt_param || !aConfig )
237  return;
238 
239  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
240  {
241  wxString key = ViaDiameterKey;
242  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Diameter ) );
243  key = ViaDrillKey;
244  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Drill ) );
245  }
246  }
247 };
248 
249 
251 {
252 protected:
253  std::vector<DIFF_PAIR_DIMENSION>* m_Pt_param;
254 
255 public:
256  PARAM_CFG_DIFFPAIRDIMENSIONS( std::vector<DIFF_PAIR_DIMENSION>* ptparam,
257  const wxChar* group = nullptr ) :
258  PARAM_CFG_BASE( wxEmptyString, PARAM_DIFFPAIRDIMENSIONS, group )
259  {
260  m_Pt_param = ptparam;
261  }
262 
263  void ReadParam( wxConfigBase* aConfig ) const override
264  {
265  if( !m_Pt_param || !aConfig )
266  return;
267 
268  m_Pt_param->clear();
269 
270  for( int index = 1; ; ++index )
271  {
272  double width, gap, viagap;
273 
274  wxString key = dPairWidthKey;
275 
276  if( !aConfig->Read( key << index, &width ) )
277  break;
278 
279  key = dPairGapKey;
280  gap = aConfig->ReadDouble( key << index, 0.0 );
281 
282  key = dPairViaGapKey;
283  viagap = aConfig->ReadDouble( key << index, 0.0 );
284 
285  m_Pt_param->emplace_back( DIFF_PAIR_DIMENSION( Millimeter2iu( width ),
286  Millimeter2iu( gap ),
287  Millimeter2iu( viagap ) ) );
288  }
289  }
290 
291  void SaveParam( wxConfigBase* aConfig ) const override
292  {
293  if( !m_Pt_param || !aConfig )
294  return;
295 
296  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
297  {
298  wxString key = dPairWidthKey;
299  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Width ) );
300  key = dPairGapKey;
301  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Gap ) );
302  key = dPairViaGapKey;
303  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_ViaGap ) );
304  }
305  }
306 };
307 
308 
310 {
311 protected:
313 
314 public:
315  PARAM_CFG_NETCLASSES( const wxChar* ident, NETCLASSES* ptparam,
316  const wxChar* group = nullptr ) :
317  PARAM_CFG_BASE( ident, PARAM_NETCLASSES, group )
318  {
319  m_Pt_param = ptparam;
320  }
321 
322  void ReadParam( wxConfigBase* aConfig ) const override
323  {
324  if( !m_Pt_param || !aConfig )
325  return;
326 
327  wxString oldPath = aConfig->GetPath();
328 
329  m_Pt_param->Clear();
330 
331  for( int index = 0; ; ++index )
332  {
333  wxString path = "";
334  NETCLASSPTR netclass;
335  wxString netclassName;
336 
337  if( index == 0 )
338  path = "Default";
339  else
340  path << index;
341 
342  aConfig->SetPath( oldPath );
343  aConfig->SetPath( m_Ident );
344  aConfig->SetPath( path );
345 
346  if( !aConfig->Read( NetclassNameKey, &netclassName ) )
347  break;
348 
349  if( index == 0 )
350  netclass = m_Pt_param->GetDefault();
351  else
352  netclass = std::make_shared<NETCLASS>( netclassName );
353 
354 #define READ_MM( aKey, aDefault ) Millimeter2iu( aConfig->ReadDouble( aKey, aDefault ) )
355  netclass->SetClearance( READ_MM( ClearanceKey, netclass->GetClearance() ) );
356  netclass->SetTrackWidth( READ_MM( TrackWidthKey, netclass->GetTrackWidth() ) );
357  netclass->SetViaDiameter( READ_MM( ViaDiameterKey, netclass->GetViaDiameter() ) );
358  netclass->SetViaDrill( READ_MM( ViaDrillKey, netclass->GetViaDrill() ) );
359  netclass->SetuViaDiameter( READ_MM( uViaDiameterKey, netclass->GetuViaDiameter() ) );
360  netclass->SetuViaDrill( READ_MM( uViaDrillKey, netclass->GetuViaDrill() ) );
361  netclass->SetDiffPairWidth( READ_MM( dPairWidthKey, netclass->GetDiffPairWidth() ) );
362  netclass->SetDiffPairGap( READ_MM( dPairGapKey, netclass->GetDiffPairGap() ) );
363  netclass->SetDiffPairViaGap( READ_MM( dPairViaGapKey, netclass->GetDiffPairViaGap() ) );
364 
365  if( index > 0 )
366  m_Pt_param->Add( netclass );
367  }
368 
369  aConfig->SetPath( oldPath );
370  }
371 
372  void SaveParam( wxConfigBase* aConfig ) const override
373  {
374  if( !m_Pt_param || !aConfig )
375  return;
376 
377  wxString oldPath = aConfig->GetPath();
379 
380  for( unsigned index = 0; index <= m_Pt_param->GetCount(); ++index )
381  {
382  wxString path = "";
383  NETCLASSPTR netclass;
384 
385  if( index == 0 )
386  path = "Default";
387  else
388  path << index;
389 
390  aConfig->SetPath( oldPath );
391  aConfig->SetPath( m_Ident );
392  aConfig->SetPath( path );
393 
394  if( index == 0 )
395  {
396  netclass = m_Pt_param->GetDefault();
397  }
398  else
399  {
400  netclass = nc->second;
401  ++nc;
402  }
403 
404  aConfig->Write( NetclassNameKey, netclass->GetName() );
405 
406 #define WRITE_MM( aKey, aValue ) aConfig->Write( aKey, Iu2Millimeter( aValue ) )
407  WRITE_MM( ClearanceKey, netclass->GetClearance() );
408  WRITE_MM( TrackWidthKey, netclass->GetTrackWidth() );
409  WRITE_MM( ViaDiameterKey, netclass->GetViaDiameter() );
410  WRITE_MM( ViaDrillKey, netclass->GetViaDrill() );
411  WRITE_MM( uViaDiameterKey, netclass->GetuViaDiameter() );
412  WRITE_MM( uViaDrillKey, netclass->GetuViaDrill() );
413  WRITE_MM( dPairWidthKey, netclass->GetDiffPairWidth() );
414  WRITE_MM( dPairGapKey, netclass->GetDiffPairGap() );
415  WRITE_MM( dPairViaGapKey, netclass->GetDiffPairViaGap() );
416  }
417 
418  aConfig->SetPath( oldPath );
419  }
420 };
421 
422 
424  m_Pad_Master( NULL )
425 {
426  LSET all_set = LSET().set();
427 
428  m_enabledLayers = all_set; // All layers enabled at first.
429  // SetCopperLayerCount() will adjust this.
430  SetVisibleLayers( all_set );
431 
432  // set all but hidden text as visible.
434 
435  SetCopperLayerCount( 2 ); // Default design is a double sided board
436 
438 
439  // if true, when creating a new track starting on an existing track, use this track width
440  m_UseConnectedTrackWidth = false;
441 
442  m_BlindBuriedViaAllowed = false;
443  m_MicroViasAllowed = false;
444 
446  m_TextSize[ LAYER_CLASS_SILK ] = wxSize( Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ),
447  Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ) );
449  m_TextItalic[ LAYER_CLASS_SILK ] = false;
451 
453  m_TextSize[ LAYER_CLASS_COPPER ] = wxSize( Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ),
454  Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ) );
456  m_TextItalic[ LAYER_CLASS_COPPER ] = false;
458 
459  // Edges & Courtyards; text properties aren't used but better to have them holding
460  // reasonable values than not.
462  m_TextSize[ LAYER_CLASS_EDGES ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
463  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
465  m_TextItalic[ LAYER_CLASS_EDGES ] = false;
467 
469  m_TextSize[ LAYER_CLASS_COURTYARD ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
470  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
474 
476  m_TextSize[ LAYER_CLASS_OTHERS ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
477  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
479  m_TextItalic[ LAYER_CLASS_OTHERS ] = false;
481 
482  m_useCustomTrackVia = false;
483  m_customTrackWidth = Millimeter2iu( DEFAULT_CUSTOMTRACKWIDTH );
485  m_customViaSize.m_Drill = Millimeter2iu( DEFAULT_VIASMINDRILL );
486 
487  m_useCustomDiffPair = false;
489  m_customDiffPair.m_Gap = Millimeter2iu( DEFAULT_CUSTOMDPAIRGAP );
491 
492  m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH );
493  m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE );
494  m_ViasMinDrill = Millimeter2iu( DEFAULT_VIASMINDRILL );
495  m_MicroViasMinSize = Millimeter2iu( DEFAULT_MICROVIASMINSIZE );
498 
499  // Global mask margins:
502  m_SolderPasteMargin = 0; // Solder paste margin absolute value
503  m_SolderPasteMarginRatio = 0.0; // Solder paste margin as a ratio of pad size
504  // The final margin is the sum of these 2 values
505  // Usually < 0 because the mask is smaller than pad
506  // Layer thickness for 3D viewer
507  m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );
508 
509  m_viaSizeIndex = 0;
510  m_trackWidthIndex = 0;
511  m_diffPairIndex = 0;
512 
513  // Default ref text on fp creation. If empty, use footprint name as default
514  m_RefDefaultText = wxT( "REF**" );
515  m_RefDefaultVisibility = true;
516  m_RefDefaultlayer = int( F_SilkS );
517  // Default value text on fp creation. If empty, use footprint name as default
518  m_ValueDefaultText = wxEmptyString;
520  m_ValueDefaultlayer = int( F_Fab );
521 }
522 
523 // Add parameters to save in project config.
524 // values are saved in mm
526 {
527  aResult->push_back( new PARAM_CFG_LAYERS( aBoard ) );
528 
529  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowMicroVias" ),
530  &m_MicroViasAllowed, false ) );
531 
532  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowBlindVias" ),
533  &m_BlindBuriedViaAllowed, false ) );
534 
535  aResult->push_back( new PARAM_CFG_BOOL( wxT( "RequireCourtyardDefinitions" ),
536  &m_RequireCourtyards, false ) );
537 
538  aResult->push_back( new PARAM_CFG_BOOL( wxT( "ProhibitOverlappingCourtyards" ),
540 
541  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinTrackWidth" ),
543  Millimeter2iu( DEFAULT_TRACKMINWIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
544  nullptr, MM_PER_IU ) );
545 
546  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDiameter" ),
547  &m_ViasMinSize,
548  Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
549  nullptr, MM_PER_IU ) );
550 
551  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDrill" ),
553  Millimeter2iu( DEFAULT_VIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
554  nullptr, MM_PER_IU ) );
555 
556  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDiameter" ),
558  Millimeter2iu( DEFAULT_MICROVIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
559  nullptr, MM_PER_IU ) );
560 
561  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDrill" ),
563  Millimeter2iu( DEFAULT_MICROVIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
564  nullptr, MM_PER_IU ) );
565 
566  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinHoleToHole" ),
568  Millimeter2iu( DEFAULT_HOLETOHOLEMIN ), Millimeter2iu( 0.0 ), Millimeter2iu( 10.0 ),
569  nullptr, MM_PER_IU ) );
570 
571  // Note: a clearance of -0.01 is a flag indicating we should use the legacy (pre-6.0) method
572  // based on the edge cut thicknesses.
573  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperEdgeClearance" ),
575  Millimeter2iu( LEGACY_COPPEREDGECLEARANCE ), Millimeter2iu( -0.01 ), Millimeter2iu( 25.0 ),
576  nullptr, MM_PER_IU ) );
577 
578  aResult->push_back( new PARAM_CFG_TRACKWIDTHS( &m_TrackWidthList ) );
579  aResult->push_back( new PARAM_CFG_VIADIMENSIONS( &m_ViasDimensionsList ) );
580  aResult->push_back( new PARAM_CFG_DIFFPAIRDIMENSIONS( &m_DiffPairDimensionsList ) );
581 
582  aResult->push_back( new PARAM_CFG_NETCLASSES( wxT( "Netclasses" ), &m_NetClasses ) );
583 
584  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkLineWidth" ),
586  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
587  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
588 
589  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeV" ),
592  nullptr, MM_PER_IU, wxT( "ModuleTextSizeV" ) ) );
593 
594  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeH" ),
597  nullptr, MM_PER_IU, wxT( "ModuleTextSizeH" ) ) );
598 
599  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeThickness" ),
601  Millimeter2iu( DEFAULT_SILK_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
602  nullptr, MM_PER_IU, wxT( "ModuleTextSizeThickness" ) ) );
603 
604  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextItalic" ),
605  &m_TextItalic[ LAYER_CLASS_SILK ], false ) );
606 
607  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextUpright" ),
608  &m_TextUpright[ LAYER_CLASS_SILK ], true ) );
609 
610  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperLineWidth" ),
612  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
613  nullptr, MM_PER_IU, wxT( "DrawSegmentWidth" ) ) );
614 
615  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeV" ),
618  nullptr, MM_PER_IU, wxT( "PcbTextSizeV" ) ) );
619 
620  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeH" ),
623  nullptr, MM_PER_IU, wxT( "PcbTextSizeH" ) ) );
624 
625  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextThickness" ),
627  Millimeter2iu( DEFAULT_COPPER_TEXT_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
628  nullptr, MM_PER_IU, wxT( "PcbTextThickness" ) ) );
629 
630  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextItalic" ),
631  &m_TextItalic[ LAYER_CLASS_COPPER ], false ) );
632 
633  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextUpright" ),
634  &m_TextUpright[ LAYER_CLASS_COPPER ], true ) );
635 
636  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "EdgeCutLineWidth" ),
638  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
639  nullptr, MM_PER_IU, wxT( "BoardOutlineThickness" ) ) );
640 
641  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CourtyardLineWidth" ),
643  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
644  nullptr, MM_PER_IU ) );
645 
646  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersLineWidth" ),
648  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
649  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
650 
651  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeV" ),
654  nullptr, MM_PER_IU ) );
655 
656  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeH" ),
659  nullptr, MM_PER_IU ) );
660 
661  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeThickness" ),
663  Millimeter2iu( DEFAULT_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
664  nullptr, MM_PER_IU ) );
665 
666  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextItalic" ),
667  &m_TextItalic[ LAYER_CLASS_OTHERS ], false ) );
668 
669  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextUpright" ),
670  &m_TextUpright[ LAYER_CLASS_OTHERS ], true ) );
671 
672  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskClearance" ),
674  Millimeter2iu( DEFAULT_SOLDERMASK_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
675  nullptr, MM_PER_IU ) );
676 
677  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskMinWidth" ),
679  Millimeter2iu( DEFAULT_SOLDERMASK_MIN_WIDTH ), 0, Millimeter2iu( 1.0 ),
680  nullptr, MM_PER_IU ) );
681 
682  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderPasteClearance" ),
684  Millimeter2iu( DEFAULT_SOLDERPASTE_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
685  nullptr, MM_PER_IU ) );
686 
687  aResult->push_back( new PARAM_CFG_DOUBLE( wxT( "SolderPasteRatio" ),
689  DEFAULT_SOLDERPASTE_RATIO, -0.5, 1.0 ) );
690 }
691 
692 
693 bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass( const wxString& aNetClassName )
694 {
695  NETCLASSPTR netClass = m_NetClasses.Find( aNetClassName );
696  bool lists_sizes_modified = false;
697 
698  // if not found (should not happen) use the default
699  if( !netClass )
700  netClass = m_NetClasses.GetDefault();
701 
702  m_currentNetClassName = netClass->GetName();
703 
704  // Initialize others values:
705  if( m_TrackWidthList.size() == 0 )
706  {
707  lists_sizes_modified = true;
708  m_TrackWidthList.push_back( 0 );
709  }
710 
711  if( m_ViasDimensionsList.size() == 0 )
712  {
713  lists_sizes_modified = true;
714  m_ViasDimensionsList.emplace_back( VIA_DIMENSION() );
715  }
716 
717  if( m_DiffPairDimensionsList.size() == 0 )
718  {
719  lists_sizes_modified = true;
721  }
722 
723  /* note the m_ViasDimensionsList[0] and m_TrackWidthList[0] values
724  * are always the Netclass values
725  */
726  if( m_TrackWidthList[0] != netClass->GetTrackWidth() )
727  {
728  lists_sizes_modified = true;
729  m_TrackWidthList[0] = netClass->GetTrackWidth();
730  }
731 
732  if( m_ViasDimensionsList[0].m_Diameter != netClass->GetViaDiameter() )
733  {
734  lists_sizes_modified = true;
735  m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter();
736  }
737 
738  if( m_ViasDimensionsList[0].m_Drill != netClass->GetViaDrill() )
739  {
740  lists_sizes_modified = true;
741  m_ViasDimensionsList[0].m_Drill = netClass->GetViaDrill();
742  }
743 
744  if( m_DiffPairDimensionsList[0].m_Width != netClass->GetDiffPairWidth() )
745  {
746  lists_sizes_modified = true;
747  m_DiffPairDimensionsList[0].m_Width = netClass->GetDiffPairWidth();
748  }
749 
750  if( m_DiffPairDimensionsList[0].m_Gap != netClass->GetDiffPairGap() )
751  {
752  lists_sizes_modified = true;
753  m_DiffPairDimensionsList[0].m_Gap = netClass->GetDiffPairGap();
754  }
755 
756  if( m_DiffPairDimensionsList[0].m_ViaGap != netClass->GetDiffPairViaGap() )
757  {
758  lists_sizes_modified = true;
759  m_DiffPairDimensionsList[0].m_ViaGap = netClass->GetDiffPairViaGap();
760  }
761 
762  if( GetViaSizeIndex() >= m_ViasDimensionsList.size() )
764 
765  if( GetTrackWidthIndex() >= m_TrackWidthList.size() )
767 
770 
771  return lists_sizes_modified;
772 }
773 
774 
776 {
777  int clearance = m_NetClasses.GetDefault()->GetClearance();
778 
779  //Read list of Net Classes
780  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
781  {
782  NETCLASSPTR netclass = nc->second;
783  clearance = std::max( clearance, netclass->GetClearance() );
784  }
785 
786  return clearance;
787 }
788 
789 
791 {
792  int clearance = m_NetClasses.GetDefault()->GetClearance();
793 
794  //Read list of Net Classes
795  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
796  {
797  NETCLASSPTR netclass = nc->second;
798  clearance = std::min( clearance, netclass->GetClearance() );
799  }
800 
801  return clearance;
802 }
803 
804 
806 {
807  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
808 
809  return netclass->GetuViaDiameter();
810 }
811 
812 
814 {
815  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
816 
817  return netclass->GetuViaDrill();
818 }
819 
820 
822 {
823  m_viaSizeIndex = std::min( aIndex, (unsigned) m_ViasDimensionsList.size() );
824  m_useCustomTrackVia = false;
825 }
826 
827 
829 {
830  int drill;
831 
832  if( m_useCustomTrackVia )
833  drill = m_customViaSize.m_Drill;
834  else
835  drill = m_ViasDimensionsList[m_viaSizeIndex].m_Drill;
836 
837  return drill > 0 ? drill : -1;
838 }
839 
840 
842 {
843  m_trackWidthIndex = std::min( aIndex, (unsigned) m_TrackWidthList.size() );
844  m_useCustomTrackVia = false;
845 }
846 
847 
849 {
850  m_diffPairIndex = std::min( aIndex, (unsigned) 8 );
851  m_useCustomDiffPair = false;
852 }
853 
854 
856 {
857  m_HoleToHoleMin = aDistance;
858 }
859 
860 
862 {
863  m_CopperEdgeClearance = aDistance;
864 }
865 
866 
868 {
869  m_RequireCourtyards = aRequire;
870 }
871 
872 
874 {
876 }
877 
878 
880 {
881  SetVisibleLayers( LSET().set() );
882  m_visibleElements = -1;
883 }
884 
885 
887 {
888  m_visibleLayers.set( aLayer, aNewState && IsLayerEnabled( aLayer ));
889 }
890 
891 
892 void BOARD_DESIGN_SETTINGS::SetElementVisibility( GAL_LAYER_ID aElementCategory, bool aNewState )
893 {
894  if( aNewState )
895  m_visibleElements |= 1 << GAL_LAYER_INDEX( aElementCategory );
896  else
897  m_visibleElements &= ~( 1 << GAL_LAYER_INDEX( aElementCategory ) );
898 }
899 
900 
902 {
903  // if( aNewLayerCount < 2 ) aNewLayerCount = 2;
904 
905  m_copperLayerCount = aNewLayerCount;
906 
907  // ensure consistency with the m_EnabledLayers member
908 #if 0
909  // was:
912 
913  if( m_copperLayerCount > 1 )
915 
916  for( LAYER_NUM ii = LAYER_N_2; ii < aNewLayerCount - 1; ++ii )
917  m_enabledLayers |= GetLayerSet( ii );
918 #else
919  // Update only enabled copper layers mask
920  m_enabledLayers &= ~LSET::AllCuMask();
921  m_enabledLayers |= LSET::AllCuMask( aNewLayerCount );
922 #endif
923 }
924 
925 
927 {
928  // Back and front layers are always enabled.
929  aMask.set( B_Cu ).set( F_Cu );
930 
931  m_enabledLayers = aMask;
932 
933  // A disabled layer cannot be visible
934  m_visibleLayers &= aMask;
935 
936  // update m_CopperLayerCount to ensure its consistency with m_EnabledLayers
937  m_copperLayerCount = ( aMask & LSET::AllCuMask() ).count();
938 }
939 
940 
941 // Return the layer class index { silk, copper, edges & courtyards, others } of the
942 // given layer.
944 {
945  if( aLayer == F_SilkS || aLayer == B_SilkS )
946  return LAYER_CLASS_SILK;
947  else if( IsCopperLayer( aLayer ) )
948  return LAYER_CLASS_COPPER;
949  else if( aLayer == Edge_Cuts )
950  return LAYER_CLASS_EDGES;
951  else if( aLayer == F_CrtYd || aLayer == B_CrtYd )
952  return LAYER_CLASS_COURTYARD;
953  else
954  return LAYER_CLASS_OTHERS;
955 }
956 
957 
959 {
960  return m_LineThickness[ GetLayerClass( aLayer ) ];
961 }
962 
963 
965 {
966  return m_TextSize[ GetLayerClass( aLayer ) ];
967 }
968 
969 
971 {
972  return m_TextThickness[ GetLayerClass( aLayer ) ];
973 }
974 
975 
977 {
978  return m_TextItalic[ GetLayerClass( aLayer ) ];
979 }
980 
981 
983 {
984  return m_TextUpright[ GetLayerClass( aLayer ) ];
985 }
986 
987 
988 #ifndef NDEBUG
991  {
992  // Int (the type used for saving visibility settings) is only 32 bits guaranteed,
993  // be sure that we do not cross the limit
994  assert( GAL_LAYER_INDEX( GAL_LAYER_ID_BITMASK_END ) <= 32 );
995  };
996 };
998 #endif
999 
1000 
int GetCurrentMicroViaSize()
Function GetCurrentMicroViaSize.
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:676
#define DEFAULT_EDGE_WIDTH
#define DEFAULT_SILK_TEXT_WIDTH
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
#define DEFAULT_TRACKMINWIDTH
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
void SetEnabledLayers(LSET aMask)
Function SetEnabledLayers changes the bit-mask of enabled layers.
A list of parameters type.
#define TrackWidthKey
#define LayerTypeKey
void SetCopperEdgeClearance(int aDistance)
Function SetCopperEdgeClearance.
#define DEFAULT_COURTYARD_WIDTH
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
#define uViaDrillKey
#define WRITE_MM(aKey, aValue)
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
VIATYPE_T m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
wxString m_currentNetClassName
Current net class name used to display netclass info.
#define NetclassNameKey
#define DEFAULT_SOLDERPASTE_RATIO
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:141
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Function GetLayerName returns the name of a layer given by aLayer.
std::vector< VIA_DIMENSION > * m_Pt_param
Pointer to the parameter value.
int GetCurrentViaDrill() const
Function GetCurrentViaDrill.
int m_SolderPasteMargin
Solder paste margin absolute value.
#define LAYER_FRONT
bit mask for component layer
#define DEFAULT_VIASMINSIZE
#define TEXTS_MAX_WIDTH
Maximum text width in internal units (10 inches)
Definition: pcbnew.h:63
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
std::vector< int > m_TrackWidthList
int GetSmallestClearanceValue()
Function GetSmallestClearanceValue.
int GetBiggestClearanceValue()
Function GetBiggestClearanceValue.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
int GetCurrentMicroViaDrill()
Function GetCurrentMicroViaDrill.
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Class BOARD to handle a board.
void SetLayerVisibility(PCB_LAYER_ID aLayerId, bool aNewState)
Function SetLayerVisibility changes the visibility of a given layer.
Configuration parameter - Double Precision Class.
#define LEGACY_COPPEREDGECLEARANCE
#define DEFAULT_BOARD_THICKNESS_MM
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
GAL_LAYER_ID
GAL layers are "virtual" layers, i.e.
#define DEFAULT_LINE_WIDTH
#define DEFAULT_COPPER_LINE_WIDTH
#define DEFAULT_HOLETOHOLEMIN
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Function GetDesignSettings.
Definition: class_board.h:534
iterator end()
Definition: netclass.h:249
int m_ValueDefaultlayer
Default value text layer on fp creation.
#define CopperLayerCountKey
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
void SetVisibleAlls()
Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers...
This is the end of the layers used for visibility bitmasks in Pcbnew There can be at most 32 layers a...
bool SetLayerType(PCB_LAYER_ID aLayer, LAYER_T aLayerType)
Function SetLayerType changes the type of the layer given by aLayer.
DIFF_PAIR_DIMENSION m_customDiffPair
#define DEFAULT_CUSTOMDPAIRGAP
PARAM_CFG_VIADIMENSIONS(std::vector< VIA_DIMENSION > *ptparam, const wxChar *group=nullptr)
int GetTextThickness(PCB_LAYER_ID aLayer) const
Function GetTextThickness Returns the default text thickness from the layer class for the given layer...
bool IsLayerEnabled(PCB_LAYER_ID aLayer) const
Function IsLayerEnabled is a proxy function that calls the correspondent function in m_BoardSettings ...
Definition: class_board.h:441
void SetBoardThickness(int aThickness)
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Function Seq returns an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:367
Configuration parameter - Integer Class with unit conversion.
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
Struct DIFF_PAIR_DIMENSION is a small helper container to handle a stock of specific differential pai...
#define DEFAULT_CUSTOMDPAIRVIAGAP
int GetLayerClass(PCB_LAYER_ID aLayer) const
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
bool GetTextUpright(PCB_LAYER_ID aLayer) const
#define DEFAULT_SOLDERPASTE_CLEARANCE
bool GetTextItalic(PCB_LAYER_ID aLayer) const
static list_size_check check
int GetLineThickness(PCB_LAYER_ID aLayer) const
Function GetLineThickness Returns the default graphic segment thickness from the layer class for the ...
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
PARAM_CFG_LAYERS(BOARD *ptparam, const wxChar *group=nullptr)
#define DEFAULT_CUSTOMDPAIRWIDTH
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
PCB_LAYER_ID
A quick note on layer IDs:
BOARD * m_Pt_param
Pointer to the parameter value.
#define DEFAULT_SILK_TEXT_SIZE
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
Class LSET is a set of PCB_LAYER_IDs.
#define DEFAULT_SILK_LINE_WIDTH
iterator begin()
Definition: netclass.h:248
Class NETCLASSES is a container for NETCLASS instances.
Definition: netclass.h:224
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
#define ViaDiameterKey
NETCLASSES * m_Pt_param
Pointer to the parameter value.
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
void SetMinHoleSeparation(int aDistance)
Function SetMinHoleSeparation.
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
LAYER_T
Enum LAYER_T gives the allowed types of layers, same as Specctra DSN spec.
Definition: class_board.h:72
bool SetLayerName(PCB_LAYER_ID aLayer, const wxString &aLayerName)
Function SetLayerName changes the name of the layer given by aLayer.
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
#define LayerKeyPrefix
static LSET AllLayersMask()
Definition: lset.cpp:713
Configuration parameter - Boolean Class.
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
#define ALL_CU_LAYERS
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
#define TEXTS_MAX_SIZE
Maximum text size in internal units (10 inches)
Definition: pcbnew.h:62
void SetDiffPairIndex(unsigned aIndex)
Function SetDiffPairIndex.
#define DEFAULT_MICROVIASMINSIZE
wxString m_ValueDefaultText
Default value text on fp creation.
Class PARAM_CFG_BASE is a base class which establishes the interface functions ReadParam and SavePara...
Definition: config_params.h:99
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
void AppendConfigs(BOARD *aBoard, PARAM_CFG_ARRAY *aResult)
Function AppendConfigs appends to aResult the configuration setting accessors which will later allow ...
Class LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
#define READ_MM(aKey, aDefault)
#define TEXTS_MIN_SIZE
Minimum text size in internal units (1 mil)
Definition: pcbnew.h:61
int LAYER_NUM
Type LAYER_NUM can be replaced with int and removed.
#define DEFAULT_COPPEREDGECLEARANCE
LSET m_visibleLayers
Bit-mask for layer visibility.
#define LayerNameKey
LAYER_T GetLayerType(PCB_LAYER_ID aLayer) const
Function GetLayerType returns the type of the copper layer given by aLayer.
int m_visibleElements
Bit-mask for element category visibility.
bool Add(const NETCLASSPTR &aNetclass)
Function Add takes aNetclass and puts it into this NETCLASSES container.
Definition: netclass.cpp:99
bool m_RequireCourtyards
require courtyard definitions in footprints
std::vector< int > * m_Pt_param
Pointer to the parameter value.
bool SetCurrentNetClass(const wxString &aNetClassName)
Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter ...
void Clear()
Function Clear destroys any contained NETCLASS instances except the Default one.
Definition: netclass.h:242
Board layer functions and definitions.
#define dPairGapKey
#define max(a, b)
Definition: auxiliary.h:86
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:170
LSET GetEnabledLayers() const
Function GetEnabledLayers returns a bit-mask of all the layers that are enabled.
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
void SetProhibitOverlappingCourtyards(bool aProhibit)
Function SetProhibitOverlappingCourtyards.
PARAM_CFG_NETCLASSES(const wxChar *ident, NETCLASSES *ptparam, const wxChar *group=nullptr)
#define dPairWidthKey
#define LAYER_BACK
bit mask for copper layer
#define uViaDiameterKey
int GetCopperLayerCount() const
Function GetCopperLayerCount.
int m_RefDefaultlayer
Default ref text layer on fp creation.
The common library.
void SetElementVisibility(GAL_LAYER_ID aElementCategory, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
unsigned GetCount() const
Function GetCount.
Definition: netclass.h:259
#define DEFAULT_COPPER_TEXT_WIDTH
std::vector< VIA_DIMENSION > m_ViasDimensionsList
#define DEFAULT_CUSTOMTRACKWIDTH
bool IsCopperLayer(LAYER_NUM aLayerId)
Function IsCopperLayer tests whether a layer is a copper layer.
#define LAYER_N_2
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
PARAM_CFG_DIFFPAIRDIMENSIONS(std::vector< DIFF_PAIR_DIMENSION > *ptparam, const wxChar *group=nullptr)
unsigned GetDiffPairIndex() const
Function GetDiffPairIndex.
#define DEFAULT_SOLDERMASK_CLEARANCE
#define dPairViaGapKey
PARAM_CFG_TRACKWIDTHS(std::vector< int > *ptparam, const wxChar *group=nullptr)
int m_copperLayerCount
Number of copper layers for this design.
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
void SetRequireCourtyardDefinitions(bool aRequire)
Function SetRequireCourtyardDefinitions.
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values.
#define ViaDrillKey
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
#define DEFAULT_TEXT_SIZE
#define ClearanceKey
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
#define DEFAULT_VIASMINDRILL
std::vector< DIFF_PAIR_DIMENSION > * m_Pt_param
Pointer to the parameter value.
void SetEnabledLayers(LSET aLayerMask)
Function SetEnabledLayers is a proxy function that calls the correspondent function in m_BoardSetting...
wxString m_Ident
Keyword in config data.
wxSize GetTextSize(PCB_LAYER_ID aLayer) const
Function GetTextSize Returns the default text size from the layer class for the given layer.
int m_boardThickness
Board thickness for 3D viewer.
bool m_TextUpright[LAYER_CLASS_COUNT]
#define LayerEnabledKey
int m_SolderMaskMinWidth
Solder mask min width.
#define min(a, b)
Definition: auxiliary.h:85
static wxString GetStandardLayerName(PCB_LAYER_ID aLayerId)
Function GetStandardLayerName returns an "English Standard" name of a PCB layer when given aLayerNumb...
Definition: class_board.h:654
Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.
#define BoardThicknessKey