KiCad PCB EDA Suite
board_design_settings.cpp
Go to the documentation of this file.
1 /*
2  * This program source code file is part of KiCad, a free EDA CAD application.
3  *
4  * Copyright (C) 1992-2015 KiCad Developers, see AUTHORS.txt for contributors.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, you may find one here:
18  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19  * or you may search the http://www.gnu.org website for the version 2 license,
20  * or you may write to the Free Software Foundation, Inc.,
21  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22  */
23 
29 #include <fctsys.h>
30 #include <common.h>
31 #include <class_board.h>
33 #include <kiface_i.h>
34 #include <pcbnew.h>
35 #include <board_design_settings.h>
36 
37 
38 #define CopperLayerCountKey wxT( "CopperLayerCount" )
39 #define BoardThicknessKey wxT( "BoardThickness" )
40 
41 #define LayerKeyPrefix wxT( "Layer" )
42 #define LayerNameKey wxT( "Name" )
43 #define LayerTypeKey wxT( "Type" )
44 
45 #define NetclassNameKey wxT( "Name" )
46 #define ClearanceKey wxT( "Clearance" )
47 #define TrackWidthKey wxT( "TrackWidth" )
48 #define ViaDiameterKey wxT( "ViaDiameter" )
49 #define ViaDrillKey wxT( "ViaDrill" )
50 #define uViaDiameterKey wxT( "uViaDiameter" )
51 #define uViaDrillKey wxT( "uViaDrill" )
52 #define dPairWidthKey wxT( "dPairWidth" )
53 #define dPairGapKey wxT( "dPairGap" )
54 #define dPairViaGapKey wxT( "dPairViaGap" )
55 
56 
57 //
58 // NOTE: layer configuration info is stored in both the BOARD and BOARD_DESIGN_SETTINGS so one
59 // of the two needs to read/write the config so we don't end up with order dependency issues.
60 //
62 {
63 protected:
65 
66 public:
67  PARAM_CFG_LAYERS( BOARD* ptparam, const wxChar* group = nullptr ) :
68  PARAM_CFG_BASE( wxEmptyString, PARAM_LAYERS, group )
69  {
70  m_Pt_param = ptparam;
71  }
72 
73  void ReadParam( wxConfigBase* aConfig ) const override
74  {
75  if( !m_Pt_param || !aConfig )
76  return;
77 
78  BOARD* board = m_Pt_param;
80  wxString oldPath = aConfig->GetPath();
81 
82  bds.SetCopperLayerCount( aConfig->Read( CopperLayerCountKey, 2 ) );
83 
84  double thickness = aConfig->ReadDouble( BoardThicknessKey, DEFAULT_BOARD_THICKNESS_MM );
85  bds.SetBoardThickness( Millimeter2iu( thickness ) );
86 
87  for( LSEQ seq = LSET::AllCuMask().Seq(); seq; ++seq )
88  {
89  PCB_LAYER_ID layer = *seq;
90  wxString layerName;
91  int layerType;
92 
93  aConfig->SetPath( oldPath );
94  aConfig->SetPath( LayerKeyPrefix + board->GetStandardLayerName( layer ) );
95 
96  if( aConfig->Read( LayerNameKey, &layerName ) )
97  board->SetLayerName( layer, layerName );
98 
99  if( aConfig->Read( LayerTypeKey, &layerType ) )
100  board->SetLayerType( layer, (LAYER_T) layerType );
101  }
102 
103  aConfig->SetPath( oldPath );
104  }
105 
106  void SaveParam( wxConfigBase* aConfig ) const override
107  {
108  if( !m_Pt_param || !aConfig )
109  return;
110 
111  BOARD* board = m_Pt_param;
113  wxString oldPath = aConfig->GetPath();
114  wxString layerKeyPrefix = LayerKeyPrefix;
115 
116  aConfig->Write( CopperLayerCountKey, board->GetCopperLayerCount() );
117  aConfig->Write( BoardThicknessKey, Iu2Millimeter( bds.GetBoardThickness() ) );
118 
119  for( LSEQ seq = LSET::AllCuMask().Seq(); seq; ++seq )
120  {
121  PCB_LAYER_ID layer = *seq;
122  wxString stdName = board->GetStandardLayerName( layer );
123  wxString layerName = board->GetLayerName( layer );
124  LAYER_T layerType = board->GetLayerType( layer );
125 
126  aConfig->SetPath( oldPath );
127  aConfig->SetPath( layerKeyPrefix + wxT( "." ) + stdName );
128 
129  if( layerName == stdName && layerType == LT_SIGNAL )
130  {
131  aConfig->DeleteGroup( aConfig->GetPath() );
132  }
133  else
134  {
135  aConfig->Write( LayerNameKey, layerName );
136  aConfig->Write( LayerTypeKey, (int) layerType );
137  }
138  }
139 
140  aConfig->SetPath( oldPath );
141  }
142 };
143 
144 
146 {
147 protected:
148  std::vector<int>* m_Pt_param;
149 
150 public:
151  PARAM_CFG_TRACKWIDTHS( std::vector<int>* ptparam, const wxChar* group = nullptr ) :
152  PARAM_CFG_BASE( wxEmptyString, PARAM_TRACKWIDTHS, group )
153  {
154  m_Pt_param = ptparam;
155  }
156 
157  void ReadParam( wxConfigBase* aConfig ) const override
158  {
159  if( !m_Pt_param || !aConfig )
160  return;
161 
162  m_Pt_param->clear();
163 
164  for( int index = 1; ; ++index )
165  {
166  wxString key = TrackWidthKey;
167  double width;
168 
169  if( !aConfig->Read( key << index, &width ) )
170  break;
171 
172  m_Pt_param->push_back( Millimeter2iu( width ) );
173  }
174  }
175 
176  void SaveParam( wxConfigBase* aConfig ) const override
177  {
178  if( !m_Pt_param || !aConfig )
179  return;
180 
181  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
182  {
183  wxString key = TrackWidthKey;
184  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ) ) );
185  }
186  }
187 };
188 
189 
191 {
192 protected:
193  std::vector<VIA_DIMENSION>* m_Pt_param;
194 
195 public:
196  PARAM_CFG_VIADIMENSIONS( std::vector<VIA_DIMENSION>* ptparam, const wxChar* group = nullptr ) :
197  PARAM_CFG_BASE( wxEmptyString, PARAM_VIADIMENSIONS, group )
198  {
199  m_Pt_param = ptparam;
200  }
201 
202  void ReadParam( wxConfigBase* aConfig ) const override
203  {
204  if( !m_Pt_param || !aConfig )
205  return;
206 
207  m_Pt_param->clear();
208 
209  for( int index = 1; ; ++index )
210  {
211  double diameter = 0.0, drill = 0.0;
212 
213  wxString key = ViaDiameterKey;
214 
215  if( !aConfig->Read( key << index, &diameter ) )
216  break;
217 
218  key = ViaDrillKey;
219  drill = aConfig->ReadDouble( key << index, 0.0 );
220 
221  m_Pt_param->emplace_back( VIA_DIMENSION( Millimeter2iu( diameter ),
222  Millimeter2iu( drill ) ) );
223  }
224  }
225 
226  void SaveParam( wxConfigBase* aConfig ) const override
227  {
228  if( !m_Pt_param || !aConfig )
229  return;
230 
231  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
232  {
233  wxString key = ViaDiameterKey;
234  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Diameter ) );
235  key = ViaDrillKey;
236  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Drill ) );
237  }
238  }
239 };
240 
241 
243 {
244 protected:
245  std::vector<DIFF_PAIR_DIMENSION>* m_Pt_param;
246 
247 public:
248  PARAM_CFG_DIFFPAIRDIMENSIONS( std::vector<DIFF_PAIR_DIMENSION>* ptparam,
249  const wxChar* group = nullptr ) :
250  PARAM_CFG_BASE( wxEmptyString, PARAM_DIFFPAIRDIMENSIONS, group )
251  {
252  m_Pt_param = ptparam;
253  }
254 
255  void ReadParam( wxConfigBase* aConfig ) const override
256  {
257  if( !m_Pt_param || !aConfig )
258  return;
259 
260  m_Pt_param->clear();
261 
262  for( int index = 1; ; ++index )
263  {
264  double width, gap, viagap;
265 
266  wxString key = dPairWidthKey;
267 
268  if( !aConfig->Read( key << index, &width ) )
269  break;
270 
271  key = dPairGapKey;
272  gap = aConfig->ReadDouble( key << index, 0.0 );
273 
274  key = dPairViaGapKey;
275  viagap = aConfig->ReadDouble( key << index, 0.0 );
276 
277  m_Pt_param->emplace_back( DIFF_PAIR_DIMENSION( Millimeter2iu( width ),
278  Millimeter2iu( gap ),
279  Millimeter2iu( viagap ) ) );
280  }
281  }
282 
283  void SaveParam( wxConfigBase* aConfig ) const override
284  {
285  if( !m_Pt_param || !aConfig )
286  return;
287 
288  for( size_t index = 1; index <= m_Pt_param->size(); ++index )
289  {
290  wxString key = dPairWidthKey;
291  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Width ) );
292  key = dPairGapKey;
293  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_Gap ) );
294  key = dPairViaGapKey;
295  aConfig->Write( key << index, Iu2Millimeter( m_Pt_param->at( index - 1 ).m_ViaGap ) );
296  }
297  }
298 };
299 
300 
302 {
303 protected:
305 
306 public:
307  PARAM_CFG_NETCLASSES( const wxChar* ident, NETCLASSES* ptparam,
308  const wxChar* group = nullptr ) :
309  PARAM_CFG_BASE( ident, PARAM_NETCLASSES, group )
310  {
311  m_Pt_param = ptparam;
312  }
313 
314  void ReadParam( wxConfigBase* aConfig ) const override
315  {
316  if( !m_Pt_param || !aConfig )
317  return;
318 
319  wxString oldPath = aConfig->GetPath();
320 
321  m_Pt_param->Clear();
322 
323  for( int index = 1; ; ++index )
324  {
325  wxString pathIndex = wxString() << index;
326  wxString netclassName;
327 
328  aConfig->SetPath( oldPath );
329  aConfig->SetPath( m_Ident );
330  aConfig->SetPath( pathIndex );
331 
332  if( !aConfig->Read( NetclassNameKey, &netclassName ) )
333  break;
334 
335  NETCLASSPTR netclass = std::make_shared<NETCLASS>( netclassName );
336 
337 #define READ_MM( aKey, aDefault ) Millimeter2iu( aConfig->ReadDouble( aKey, aDefault ) )
338  netclass->SetClearance( READ_MM( ClearanceKey, netclass->GetClearance() ) );
339  netclass->SetTrackWidth( READ_MM( TrackWidthKey, netclass->GetTrackWidth() ) );
340  netclass->SetViaDiameter( READ_MM( ViaDiameterKey, netclass->GetViaDiameter() ) );
341  netclass->SetViaDrill( READ_MM( ViaDrillKey, netclass->GetViaDrill() ) );
342  netclass->SetuViaDiameter( READ_MM( uViaDiameterKey, netclass->GetuViaDiameter() ) );
343  netclass->SetuViaDrill( READ_MM( uViaDrillKey, netclass->GetuViaDrill() ) );
344  netclass->SetDiffPairWidth( READ_MM( dPairWidthKey, netclass->GetDiffPairWidth() ) );
345  netclass->SetDiffPairGap( READ_MM( dPairGapKey, netclass->GetDiffPairGap() ) );
346  netclass->SetDiffPairViaGap( READ_MM( dPairViaGapKey, netclass->GetDiffPairViaGap() ) );
347 
348  m_Pt_param->Add( netclass );
349  }
350 
351  aConfig->SetPath( oldPath );
352  }
353 
354  void SaveParam( wxConfigBase* aConfig ) const override
355  {
356  if( !m_Pt_param || !aConfig )
357  return;
358 
359  wxString oldPath = aConfig->GetPath();
360  int index = 1;
361 
362  for( NETCLASSES::const_iterator nc = m_Pt_param->begin(); nc != m_Pt_param->end(); ++nc )
363  {
364  wxString pathIndex = wxString() << index++;
365  NETCLASSPTR netclass = nc->second;
366 
367  aConfig->SetPath( oldPath );
368  aConfig->SetPath( m_Ident );
369  aConfig->SetPath( pathIndex );
370 
371  aConfig->Write( NetclassNameKey, netclass->GetName() );
372 
373 #define WRITE_MM( aKey, aValue ) aConfig->Write( aKey, Iu2Millimeter( aValue ) )
374  WRITE_MM( ClearanceKey, netclass->GetClearance() );
375  WRITE_MM( TrackWidthKey, netclass->GetTrackWidth() );
376  WRITE_MM( ViaDiameterKey, netclass->GetViaDiameter() );
377  WRITE_MM( ViaDrillKey, netclass->GetViaDrill() );
378  WRITE_MM( uViaDiameterKey, netclass->GetuViaDiameter() );
379  WRITE_MM( uViaDrillKey, netclass->GetuViaDrill() );
380  WRITE_MM( dPairWidthKey, netclass->GetDiffPairWidth() );
381  WRITE_MM( dPairGapKey, netclass->GetDiffPairGap() );
382  WRITE_MM( dPairViaGapKey, netclass->GetDiffPairViaGap() );
383  }
384 
385  aConfig->SetPath( oldPath );
386  }
387 };
388 
389 
391  m_Pad_Master( NULL )
392 {
393  LSET all_set = LSET().set();
394 
395  m_enabledLayers = all_set; // All layers enabled at first.
396  // SetCopperLayerCount() will adjust this.
397  SetVisibleLayers( all_set );
398 
399  // set all but hidden text as visible.
401 
402  SetCopperLayerCount( 2 ); // Default design is a double sided board
403 
405 
406  // if true, when creating a new track starting on an existing track, use this track width
407  m_UseConnectedTrackWidth = false;
408 
409  m_BlindBuriedViaAllowed = false;
410  m_MicroViasAllowed = false;
411 
413  m_TextSize[ LAYER_CLASS_SILK ] = wxSize( Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ),
414  Millimeter2iu( DEFAULT_SILK_TEXT_SIZE ) );
416  m_TextItalic[ LAYER_CLASS_SILK ] = false;
418 
420  m_TextSize[ LAYER_CLASS_COPPER ] = wxSize( Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ),
421  Millimeter2iu( DEFAULT_COPPER_TEXT_SIZE ) );
423  m_TextItalic[ LAYER_CLASS_COPPER ] = false;
425 
426  // Edges & Courtyards; text properties aren't used but better to have them holding
427  // reasonable values than not.
429  m_TextSize[ LAYER_CLASS_EDGES ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
430  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
432  m_TextItalic[ LAYER_CLASS_EDGES ] = false;
434 
436  m_TextSize[ LAYER_CLASS_COURTYARD ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
437  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
441 
443  m_TextSize[ LAYER_CLASS_OTHERS ] = wxSize( Millimeter2iu( DEFAULT_TEXT_SIZE ),
444  Millimeter2iu( DEFAULT_TEXT_SIZE ) );
446  m_TextItalic[ LAYER_CLASS_OTHERS ] = false;
448 
449  m_useCustomTrackVia = false;
450  m_customTrackWidth = Millimeter2iu( DEFAULT_CUSTOMTRACKWIDTH );
452  m_customViaSize.m_Drill = Millimeter2iu( DEFAULT_VIASMINDRILL );
453 
454  m_useCustomDiffPair = false;
456  m_customDiffPair.m_Gap = Millimeter2iu( DEFAULT_CUSTOMDPAIRGAP );
458 
459  m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH );
460  m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE );
461  m_ViasMinDrill = Millimeter2iu( DEFAULT_VIASMINDRILL );
462  m_MicroViasMinSize = Millimeter2iu( DEFAULT_MICROVIASMINSIZE );
464 
465  // Global mask margins:
468  m_SolderPasteMargin = 0; // Solder paste margin absolute value
469  m_SolderPasteMarginRatio = 0.0; // Solder paste margin as a ratio of pad size
470  // The final margin is the sum of these 2 values
471  // Usually < 0 because the mask is smaller than pad
472  // Layer thickness for 3D viewer
473  m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );
474 
475  m_viaSizeIndex = 0;
476  m_trackWidthIndex = 0;
477  m_diffPairIndex = 0;
478 
479  // Default ref text on fp creation. If empty, use footprint name as default
480  m_RefDefaultText = wxT( "REF**" );
481  m_RefDefaultVisibility = true;
482  m_RefDefaultlayer = int( F_SilkS );
483  // Default value text on fp creation. If empty, use footprint name as default
484  m_ValueDefaultText = wxEmptyString;
486  m_ValueDefaultlayer = int( F_Fab );
487 }
488 
489 // Add parameters to save in project config.
490 // values are saved in mm
492 {
493  aResult->push_back( new PARAM_CFG_LAYERS( aBoard ) );
494 
495  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowMicroVias" ),
496  &m_MicroViasAllowed, false ) );
497 
498  aResult->push_back( new PARAM_CFG_BOOL( wxT( "AllowBlindVias" ),
499  &m_BlindBuriedViaAllowed, false ) );
500 
501  aResult->push_back( new PARAM_CFG_BOOL( wxT( "RequireCourtyardDefinitions" ),
502  &m_RequireCourtyards, false ) );
503 
504  aResult->push_back( new PARAM_CFG_BOOL( wxT( "ProhibitOverlappingCourtyards" ),
506 
507  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinTrackWidth" ),
509  Millimeter2iu( DEFAULT_TRACKMINWIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
510  nullptr, MM_PER_IU ) );
511 
512  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDiameter" ),
513  &m_ViasMinSize,
514  Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
515  nullptr, MM_PER_IU ) );
516 
517  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDrill" ),
519  Millimeter2iu( DEFAULT_VIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
520  nullptr, MM_PER_IU ) );
521 
522  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDiameter" ),
524  Millimeter2iu( DEFAULT_MICROVIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
525  nullptr, MM_PER_IU ) );
526 
527  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinMicroViaDrill" ),
529  Millimeter2iu( DEFAULT_MICROVIASMINDRILL ), Millimeter2iu( 0.01 ), Millimeter2iu( 10.0 ),
530  nullptr, MM_PER_IU ) );
531 
532  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinHoleToHole" ),
534  Millimeter2iu( DEFAULT_HOLETOHOLEMIN ), 0, Millimeter2iu( 10.0 ),
535  nullptr, MM_PER_IU ) );
536 
537  aResult->push_back( new PARAM_CFG_TRACKWIDTHS( &m_TrackWidthList ) );
538  aResult->push_back( new PARAM_CFG_VIADIMENSIONS( &m_ViasDimensionsList ) );
539  aResult->push_back( new PARAM_CFG_DIFFPAIRDIMENSIONS( &m_DiffPairDimensionsList ) );
540 
541  aResult->push_back( new PARAM_CFG_NETCLASSES( wxT( "Netclasses" ), &m_NetClasses ) );
542 
543  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkLineWidth" ),
545  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
546  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
547 
548  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeV" ),
549  &m_TextSize[ LAYER_CLASS_SILK ].y,
551  nullptr, MM_PER_IU, wxT( "ModuleTextSizeV" ) ) );
552 
553  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeH" ),
554  &m_TextSize[ LAYER_CLASS_SILK ].x,
556  nullptr, MM_PER_IU, wxT( "ModuleTextSizeH" ) ) );
557 
558  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SilkTextSizeThickness" ),
559  &m_TextThickness[ LAYER_CLASS_SILK ],
560  Millimeter2iu( DEFAULT_SILK_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
561  nullptr, MM_PER_IU, wxT( "ModuleTextSizeThickness" ) ) );
562 
563  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextItalic" ),
564  &m_TextItalic[ LAYER_CLASS_SILK ], false ) );
565 
566  aResult->push_back( new PARAM_CFG_BOOL( wxT( "SilkTextUpright" ),
567  &m_TextUpright[ LAYER_CLASS_SILK ], true ) );
568 
569  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperLineWidth" ),
571  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
572  nullptr, MM_PER_IU, wxT( "DrawSegmentWidth" ) ) );
573 
574  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeV" ),
575  &m_TextSize[ LAYER_CLASS_COPPER ].y,
577  nullptr, MM_PER_IU, wxT( "PcbTextSizeV" ) ) );
578 
579  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextSizeH" ),
580  &m_TextSize[ LAYER_CLASS_COPPER ].x,
582  nullptr, MM_PER_IU, wxT( "PcbTextSizeH" ) ) );
583 
584  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CopperTextThickness" ),
585  &m_TextThickness[ LAYER_CLASS_COPPER ],
586  Millimeter2iu( DEFAULT_COPPER_TEXT_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
587  nullptr, MM_PER_IU, wxT( "PcbTextThickness" ) ) );
588 
589  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextItalic" ),
590  &m_TextItalic[ LAYER_CLASS_COPPER ], false ) );
591 
592  aResult->push_back( new PARAM_CFG_BOOL( wxT( "CopperTextUpright" ),
593  &m_TextUpright[ LAYER_CLASS_COPPER ], true ) );
594 
595  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "EdgeCutLineWidth" ),
597  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
598  nullptr, MM_PER_IU, wxT( "BoardOutlineThickness" ) ) );
599 
600  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "CourtyardLineWidth" ),
602  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
603  nullptr, MM_PER_IU ) );
604 
605  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersLineWidth" ),
607  Millimeter2iu( DEFAULT_SILK_LINE_WIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
608  nullptr, MM_PER_IU, wxT( "ModuleOutlineThickness" ) ) );
609 
610  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeV" ),
611  &m_TextSize[ LAYER_CLASS_OTHERS ].x,
613  nullptr, MM_PER_IU ) );
614 
615  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeH" ),
616  &m_TextSize[ LAYER_CLASS_OTHERS ].y,
618  nullptr, MM_PER_IU ) );
619 
620  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "OthersTextSizeThickness" ),
621  &m_TextThickness[ LAYER_CLASS_OTHERS ],
622  Millimeter2iu( DEFAULT_TEXT_WIDTH ), 1, TEXTS_MAX_WIDTH,
623  nullptr, MM_PER_IU ) );
624 
625  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextItalic" ),
626  &m_TextItalic[ LAYER_CLASS_OTHERS ], false ) );
627 
628  aResult->push_back( new PARAM_CFG_BOOL( wxT( "OthersTextUpright" ),
629  &m_TextUpright[ LAYER_CLASS_OTHERS ], true ) );
630 
631  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskClearance" ),
633  Millimeter2iu( DEFAULT_SOLDERMASK_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
634  nullptr, MM_PER_IU ) );
635 
636  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskMinWidth" ),
638  Millimeter2iu( DEFAULT_SOLDERMASK_MIN_WIDTH ), 0, Millimeter2iu( 1.0 ),
639  nullptr, MM_PER_IU ) );
640 
641  aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderPasteClearance" ),
643  Millimeter2iu( DEFAULT_SOLDERPASTE_CLEARANCE ), Millimeter2iu( -1.0 ), Millimeter2iu( 1.0 ),
644  nullptr, MM_PER_IU ) );
645 
646  aResult->push_back( new PARAM_CFG_DOUBLE( wxT( "SolderPasteRatio" ),
648  DEFAULT_SOLDERPASTE_RATIO, 0, 10.0 ) );
649 }
650 
651 
652 bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass( const wxString& aNetClassName )
653 {
654  NETCLASSPTR netClass = m_NetClasses.Find( aNetClassName );
655  bool lists_sizes_modified = false;
656 
657  // if not found (should not happen) use the default
658  if( !netClass )
659  netClass = m_NetClasses.GetDefault();
660 
661  m_currentNetClassName = netClass->GetName();
662 
663  // Initialize others values:
664  if( m_TrackWidthList.size() == 0 )
665  {
666  lists_sizes_modified = true;
667  m_TrackWidthList.push_back( 0 );
668  }
669 
670  if( m_ViasDimensionsList.size() == 0 )
671  {
672  lists_sizes_modified = true;
673  m_ViasDimensionsList.emplace_back( VIA_DIMENSION() );
674  }
675 
676  if( m_DiffPairDimensionsList.size() == 0 )
677  {
678  lists_sizes_modified = true;
680  }
681 
682  /* note the m_ViasDimensionsList[0] and m_TrackWidthList[0] values
683  * are always the Netclass values
684  */
685  if( m_TrackWidthList[0] != netClass->GetTrackWidth() )
686  {
687  lists_sizes_modified = true;
688  m_TrackWidthList[0] = netClass->GetTrackWidth();
689  }
690 
691  if( m_ViasDimensionsList[0].m_Diameter != netClass->GetViaDiameter() )
692  {
693  lists_sizes_modified = true;
694  m_ViasDimensionsList[0].m_Diameter = netClass->GetViaDiameter();
695  }
696 
697  if( m_ViasDimensionsList[0].m_Drill != netClass->GetViaDrill() )
698  {
699  lists_sizes_modified = true;
700  m_ViasDimensionsList[0].m_Drill = netClass->GetViaDrill();
701  }
702 
703  if( m_DiffPairDimensionsList[0].m_Width != netClass->GetDiffPairWidth() )
704  {
705  lists_sizes_modified = true;
706  m_DiffPairDimensionsList[0].m_Width = netClass->GetDiffPairWidth();
707  }
708 
709  if( m_DiffPairDimensionsList[0].m_Gap != netClass->GetDiffPairGap() )
710  {
711  lists_sizes_modified = true;
712  m_DiffPairDimensionsList[0].m_Gap = netClass->GetDiffPairGap();
713  }
714 
715  if( m_DiffPairDimensionsList[0].m_ViaGap != netClass->GetDiffPairViaGap() )
716  {
717  lists_sizes_modified = true;
718  m_DiffPairDimensionsList[0].m_ViaGap = netClass->GetDiffPairViaGap();
719  }
720 
721  if( GetViaSizeIndex() >= m_ViasDimensionsList.size() )
723 
724  if( GetTrackWidthIndex() >= m_TrackWidthList.size() )
726 
729 
730  return lists_sizes_modified;
731 }
732 
733 
735 {
736  int clearance = m_NetClasses.GetDefault()->GetClearance();
737 
738  //Read list of Net Classes
739  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
740  {
741  NETCLASSPTR netclass = nc->second;
742  clearance = std::max( clearance, netclass->GetClearance() );
743  }
744 
745  return clearance;
746 }
747 
748 
750 {
751  int clearance = m_NetClasses.GetDefault()->GetClearance();
752 
753  //Read list of Net Classes
754  for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc )
755  {
756  NETCLASSPTR netclass = nc->second;
757  clearance = std::min( clearance, netclass->GetClearance() );
758  }
759 
760  return clearance;
761 }
762 
763 
765 {
766  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
767 
768  return netclass->GetuViaDiameter();
769 }
770 
771 
773 {
774  NETCLASSPTR netclass = m_NetClasses.Find( m_currentNetClassName );
775 
776  return netclass->GetuViaDrill();
777 }
778 
779 
781 {
782  m_viaSizeIndex = std::min( aIndex, (unsigned) m_ViasDimensionsList.size() );
783  m_useCustomTrackVia = false;
784 }
785 
786 
788 {
789  int drill;
790 
791  if( m_useCustomTrackVia )
792  drill = m_customViaSize.m_Drill;
793  else
794  drill = m_ViasDimensionsList[m_viaSizeIndex].m_Drill;
795 
796  return drill > 0 ? drill : -1;
797 }
798 
799 
801 {
802  m_trackWidthIndex = std::min( aIndex, (unsigned) m_TrackWidthList.size() );
803  m_useCustomTrackVia = false;
804 }
805 
806 
808 {
809  m_diffPairIndex = std::min( aIndex, (unsigned) 8 );
810  m_useCustomDiffPair = false;
811 }
812 
813 
815 {
816  m_HoleToHoleMin = aDistance;
817 }
818 
819 
821 {
822  m_RequireCourtyards = aRequire;
823 }
824 
825 
827 {
829 }
830 
831 
833 {
834  SetVisibleLayers( LSET().set() );
835  m_visibleElements = -1;
836 }
837 
838 
840 {
841  m_visibleLayers.set( aLayer, aNewState && IsLayerEnabled( aLayer ));
842 }
843 
844 
845 void BOARD_DESIGN_SETTINGS::SetElementVisibility( GAL_LAYER_ID aElementCategory, bool aNewState )
846 {
847  if( aNewState )
848  m_visibleElements |= 1 << GAL_LAYER_INDEX( aElementCategory );
849  else
850  m_visibleElements &= ~( 1 << GAL_LAYER_INDEX( aElementCategory ) );
851 }
852 
853 
855 {
856  // if( aNewLayerCount < 2 ) aNewLayerCount = 2;
857 
858  m_copperLayerCount = aNewLayerCount;
859 
860  // ensure consistency with the m_EnabledLayers member
861 #if 0
862  // was:
865 
866  if( m_copperLayerCount > 1 )
868 
869  for( LAYER_NUM ii = LAYER_N_2; ii < aNewLayerCount - 1; ++ii )
870  m_enabledLayers |= GetLayerSet( ii );
871 #else
872  // Update only enabled copper layers mask
873  m_enabledLayers &= ~LSET::AllCuMask();
874  m_enabledLayers |= LSET::AllCuMask( aNewLayerCount );
875 #endif
876 }
877 
878 
880 {
881  // Back and front layers are always enabled.
882  aMask.set( B_Cu ).set( F_Cu );
883 
884  m_enabledLayers = aMask;
885 
886  // A disabled layer cannot be visible
887  m_visibleLayers &= aMask;
888 
889  // update m_CopperLayerCount to ensure its consistency with m_EnabledLayers
890  m_copperLayerCount = ( aMask & LSET::AllCuMask() ).count();
891 }
892 
893 
894 // Return the layer class index { silk, copper, edges & courtyards, others } of the
895 // given layer.
897 {
898  if( aLayer == F_SilkS || aLayer == B_SilkS )
899  return LAYER_CLASS_SILK;
900  else if( IsCopperLayer( aLayer ) )
901  return LAYER_CLASS_COPPER;
902  else if( aLayer == Edge_Cuts )
903  return LAYER_CLASS_EDGES;
904  else if( aLayer == F_CrtYd || aLayer == B_CrtYd )
905  return LAYER_CLASS_COURTYARD;
906  else
907  return LAYER_CLASS_OTHERS;
908 }
909 
910 
912 {
913  return m_LineThickness[ GetLayerClass( aLayer ) ];
914 }
915 
916 
918 {
919  return m_TextSize[ GetLayerClass( aLayer ) ];
920 }
921 
922 
924 {
925  return m_TextThickness[ GetLayerClass( aLayer ) ];
926 }
927 
928 
930 {
931  return m_TextItalic[ GetLayerClass( aLayer ) ];
932 }
933 
934 
936 {
937  return m_TextUpright[ GetLayerClass( aLayer ) ];
938 }
939 
940 
941 #ifndef NDEBUG
944  {
945  // Int (the type used for saving visibility settings) is only 32 bits guaranteed,
946  // be sure that we do not cross the limit
947  assert( GAL_LAYER_INDEX( GAL_LAYER_ID_BITMASK_END ) <= 32 );
948  };
949 };
951 #endif
952 
953 
int GetCurrentMicroViaSize()
Function GetCurrentMicroViaSize.
static LSET AllCuMask(int aCuLayerCount=MAX_CU_LAYERS)
Function AllCuMask returns a mask holding the requested number of Cu PCB_LAYER_IDs.
Definition: lset.cpp:673
#define DEFAULT_EDGE_WIDTH
#define DEFAULT_SILK_TEXT_WIDTH
wxString m_RefDefaultText
Default ref text on fp creation.
int m_SolderMaskMargin
Solder mask margin.
void SetCopperLayerCount(int aNewLayerCount)
Function SetCopperLayerCount do what its name says...
#define DEFAULT_TRACKMINWIDTH
Struct VIA_DIMENSION is a small helper container to handle a stock of specific vias each with unique ...
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
void SetEnabledLayers(LSET aMask)
Function SetEnabledLayers changes the bit-mask of enabled layers.
A list of parameters type.
#define TrackWidthKey
#define LayerTypeKey
#define DEFAULT_COURTYARD_WIDTH
bool m_ValueDefaultVisibility
Default value text visibility on fp creation.
#define uViaDrillKey
#define WRITE_MM(aKey, aValue)
void SetTrackWidthIndex(unsigned aIndex)
Function SetTrackWidthIndex sets the current track width list index to aIndex.
VIATYPE_T m_CurrentViaType
(VIA_BLIND_BURIED, VIA_THROUGH, VIA_MICROVIA)
int GetCurrentViaDrill() const
Function GetCurrentViaDrill.
wxString m_currentNetClassName
Current net class name used to display netclass info.
NETCLASSPTR Find(const wxString &aName) const
Function Find searches this container for a NETCLASS given by aName.
Definition: netclass.cpp:146
#define NetclassNameKey
#define DEFAULT_SOLDERPASTE_RATIO
bool GetTextItalic(PCB_LAYER_ID aLayer) const
std::vector< VIA_DIMENSION > * m_Pt_param
Pointer to the parameter value.
int m_SolderPasteMargin
Solder paste margin absolute value.
#define LAYER_FRONT
bit mask for component layer
#define DEFAULT_VIASMINSIZE
#define TEXTS_MAX_WIDTH
Maximum text width in internal units (10 inches)
Definition: pcbnew.h:69
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
std::vector< int > m_TrackWidthList
int GetSmallestClearanceValue()
Function GetSmallestClearanceValue.
int GetBiggestClearanceValue()
Function GetBiggestClearanceValue.
bool m_ProhibitOverlappingCourtyards
check for overlapping courtyards in DRC
int GetCurrentMicroViaDrill()
Function GetCurrentMicroViaDrill.
std::vector< DIFF_PAIR_DIMENSION > m_DiffPairDimensionsList
Class BOARD to handle a board.
void SetLayerVisibility(PCB_LAYER_ID aLayerId, bool aNewState)
Function SetLayerVisibility changes the visibility of a given layer.
Configuration parameter - Double Precision Class.
bool IsLayerEnabled(PCB_LAYER_ID aLayerId) const
Function IsLayerEnabled tests whether a given layer is enabled.
int GetCopperLayerCount() const
Function GetCopperLayerCount.
#define DEFAULT_BOARD_THICKNESS_MM
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
GAL_LAYER_ID
GAL layers are "virtual" layers, i.e.
#define DEFAULT_LINE_WIDTH
#define DEFAULT_COPPER_LINE_WIDTH
#define DEFAULT_HOLETOHOLEMIN
iterator end()
Definition: netclass.h:249
int m_ValueDefaultlayer
Default value text layer on fp creation.
#define CopperLayerCountKey
int GetTextThickness(PCB_LAYER_ID aLayer) const
Function GetTextThickness Returns the default text thickness from the layer class for the given layer...
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
void SetVisibleAlls()
Function SetVisibleAlls Set the bit-mask of all visible elements categories, including enabled layers...
This is the end of the layers used for visibility bitmasks in Pcbnew There can be at most 32 layers a...
bool SetLayerType(PCB_LAYER_ID aLayer, LAYER_T aLayerType)
Function SetLayerType changes the type of the layer given by aLayer.
DIFF_PAIR_DIMENSION m_customDiffPair
#define DEFAULT_CUSTOMDPAIRGAP
PARAM_CFG_VIADIMENSIONS(std::vector< VIA_DIMENSION > *ptparam, const wxChar *group=nullptr)
void SetBoardThickness(int aThickness)
Configuration parameter - Integer Class with unit conversion.
wxSize GetTextSize(PCB_LAYER_ID aLayer) const
Function GetTextSize Returns the default text size from the layer class for the given layer...
NETCLASS_MAP::const_iterator const_iterator
Definition: netclass.h:251
Struct DIFF_PAIR_DIMENSION is a small helper container to handle a stock of specific differential pai...
#define DEFAULT_CUSTOMDPAIRVIAGAP
unsigned GetViaSizeIndex() const
Function GetViaSizeIndex.
void SetVisibleLayers(LSET aMask)
Function SetVisibleLayers changes the bit-mask of visible layers.
#define DEFAULT_SOLDERPASTE_CLEARANCE
LSEQ Seq(const PCB_LAYER_ID *aWishListSequence, unsigned aCount) const
Function Seq returns an LSEQ from the union of this LSET and a desired sequence.
Definition: lset.cpp:364
static list_size_check check
#define DEFAULT_TEXT_WIDTH
wxSize m_TextSize[LAYER_CLASS_COUNT]
void SetViaSizeIndex(unsigned aIndex)
Function SetViaSizeIndex sets the current via size list index to aIndex.
PARAM_CFG_LAYERS(BOARD *ptparam, const wxChar *group=nullptr)
#define DEFAULT_CUSTOMDPAIRWIDTH
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
PCB_LAYER_ID
A quick note on layer IDs:
BOARD * m_Pt_param
Pointer to the parameter value.
#define DEFAULT_SILK_TEXT_SIZE
int m_HoleToHoleMin
Min width of peninsula between two drilled holes.
int m_TextThickness[LAYER_CLASS_COUNT]
Class LSET is a set of PCB_LAYER_IDs.
#define DEFAULT_SILK_LINE_WIDTH
iterator begin()
Definition: netclass.h:248
Class NETCLASSES is a container for NETCLASS instances.
Definition: netclass.h:224
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
#define ViaDiameterKey
NETCLASSES * m_Pt_param
Pointer to the parameter value.
#define GAL_LAYER_INDEX(x)
Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS.
void SetMinHoleSeparation(int aDistance)
Function SetMinHoleSeparation.
int m_TrackMinWidth
track min value for width ((min copper size value
int m_ViasMinSize
vias (not micro vias) min diameter
LAYER_T
Enum LAYER_T gives the allowed types of layers, same as Specctra DSN spec.
Definition: class_board.h:72
const wxString GetLayerName(PCB_LAYER_ID aLayer) const
Function GetLayerName returns the name of a layer given by aLayer.
bool SetLayerName(PCB_LAYER_ID aLayer, const wxString &aLayerName)
Function SetLayerName changes the name of the layer given by aLayer.
bool m_TextItalic[LAYER_CLASS_COUNT]
int m_ViasMinDrill
vias (not micro vias) min drill diameter
#define LayerKeyPrefix
BOARD_DESIGN_SETTINGS & GetDesignSettings() const
Function GetDesignSettings.
Definition: class_board.h:538
Configuration parameter - Boolean Class.
bool m_BlindBuriedViaAllowed
true to allow blind/buried vias
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
#define ALL_CU_LAYERS
void ReadParam(wxConfigBase *aConfig) const override
Function ReadParam reads the value of the parameter stored in aConfig.
#define TEXTS_MAX_SIZE
Maximum text size in internal units (10 inches)
Definition: pcbnew.h:68
void SetDiffPairIndex(unsigned aIndex)
Function SetDiffPairIndex.
#define DEFAULT_MICROVIASMINSIZE
wxString m_ValueDefaultText
Default value text on fp creation.
Class PARAM_CFG_BASE is a base class which establishes the interface functions ReadParam and SavePara...
Definition: config_params.h:99
int m_MicroViasMinSize
micro vias (not vias) min diameter
#define DEFAULT_MICROVIASMINDRILL
#define DEFAULT_SOLDERMASK_MIN_WIDTH
int m_LineThickness[LAYER_CLASS_COUNT]
int GetLineThickness(PCB_LAYER_ID aLayer) const
Function GetLineThickness Returns the default graphic segment thickness from the layer class for the ...
void AppendConfigs(BOARD *aBoard, PARAM_CFG_ARRAY *aResult)
Function AppendConfigs appends to aResult the configuration setting accessors which will later allow ...
Class LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.
#define READ_MM(aKey, aDefault)
#define TEXTS_MIN_SIZE
Minimum text size in internal units (1 mil)
Definition: pcbnew.h:67
int LAYER_NUM
Type LAYER_NUM can be replaced with int and removed.
LSET m_visibleLayers
Bit-mask for layer visibility.
#define LayerNameKey
bool GetTextUpright(PCB_LAYER_ID aLayer) const
int m_visibleElements
Bit-mask for element category visibility.
bool Add(const NETCLASSPTR &aNetclass)
Function Add takes aNetclass and puts it into this NETCLASSES container.
Definition: netclass.cpp:104
bool m_RequireCourtyards
require courtyard definitions in footprints
std::vector< int > * m_Pt_param
Pointer to the parameter value.
bool SetCurrentNetClass(const wxString &aNetClassName)
Function SetCurrentNetClass Must be called after a netclass selection (or after a netclass parameter ...
void Clear()
Function Clear destroys any contained NETCLASS instances except the Default one.
Definition: netclass.h:242
Board layer functions and definitions.
unsigned GetDiffPairIndex() const
Function GetDiffPairIndex.
#define dPairGapKey
#define max(a, b)
Definition: auxiliary.h:86
Class BOARD holds information pertinent to a Pcbnew printed circuit board.
Definition: class_board.h:170
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
void SetProhibitOverlappingCourtyards(bool aProhibit)
Function SetProhibitOverlappingCourtyards.
PARAM_CFG_NETCLASSES(const wxChar *ident, NETCLASSES *ptparam, const wxChar *group=nullptr)
#define dPairWidthKey
#define LAYER_BACK
bit mask for copper layer
#define uViaDiameterKey
NETCLASSPTR GetDefault() const
Function GetDefault.
Definition: netclass.h:268
int m_RefDefaultlayer
Default ref text layer on fp creation.
The common library.
void SetElementVisibility(GAL_LAYER_ID aElementCategory, bool aNewState)
Function SetElementVisibility changes the visibility of an element category.
#define DEFAULT_COPPER_TEXT_WIDTH
std::vector< VIA_DIMENSION > m_ViasDimensionsList
#define DEFAULT_CUSTOMTRACKWIDTH
unsigned GetTrackWidthIndex() const
Function GetTrackWidthIndex.
bool IsCopperLayer(LAYER_NUM aLayerId)
Function IsCopperLayer tests whether a layer is a copper layer.
#define LAYER_N_2
PARAM_CFG_DIFFPAIRDIMENSIONS(std::vector< DIFF_PAIR_DIMENSION > *ptparam, const wxChar *group=nullptr)
int GetLayerClass(PCB_LAYER_ID aLayer) const
#define DEFAULT_SOLDERMASK_CLEARANCE
#define dPairViaGapKey
PARAM_CFG_TRACKWIDTHS(std::vector< int > *ptparam, const wxChar *group=nullptr)
int m_copperLayerCount
Number of copper layers for this design.
#define DEFAULT_COPPER_TEXT_SIZE
bool m_MicroViasAllowed
true to allow micro vias
void SetRequireCourtyardDefinitions(bool aRequire)
Function SetRequireCourtyardDefinitions.
int m_MicroViasMinDrill
micro vias (not vias) min drill diameter
double m_SolderPasteMarginRatio
Solder pask margin ratio value of pad size The final margin is the sum of these 2 values...
#define ViaDrillKey
void SaveParam(wxConfigBase *aConfig) const override
Function SaveParam saves the value of the parameter stored in aConfig.
#define DEFAULT_TEXT_SIZE
#define ClearanceKey
LSET m_enabledLayers
Bit-mask for layer enabling.
bool m_RefDefaultVisibility
Default ref text visibility on fp creation.
LAYER_T GetLayerType(PCB_LAYER_ID aLayer) const
Function GetLayerType returns the type of the copper layer given by aLayer.
#define DEFAULT_VIASMINDRILL
std::vector< DIFF_PAIR_DIMENSION > * m_Pt_param
Pointer to the parameter value.
wxString m_Ident
Keyword in config data.
int m_boardThickness
Board thickness for 3D viewer.
bool m_TextUpright[LAYER_CLASS_COUNT]
int m_SolderMaskMinWidth
Solder mask min width.
#define min(a, b)
Definition: auxiliary.h:85
static wxString GetStandardLayerName(PCB_LAYER_ID aLayerId)
Function GetStandardLayerName returns an "English Standard" name of a PCB layer when given aLayerNumb...
Definition: class_board.h:653
Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD object.
#define BoardThicknessKey