KiCad Pcbnew Python Scripting
Public Member Functions | Public Attributes | Static Public Attributes | List of all members
pcbnew.BOARD_DESIGN_SETTINGS Class Reference
Inheritance diagram for pcbnew.BOARD_DESIGN_SETTINGS:
Inheritance graph
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Public Member Functions

def __init__ (self)
 
def GetDefault (self)
 
def GetCurrentNetClassName (self)
 
def UseNetClassTrack (self)
 
def UseNetClassVia (self)
 
def SetCurrentNetClass (self, aNetClassName)
 
def GetBiggestClearanceValue (self)
 
def GetSmallestClearanceValue (self)
 
def GetCurrentMicroViaSize (self)
 
def GetCurrentMicroViaDrill (self)
 
def GetTrackWidthIndex (self)
 
def SetTrackWidthIndex (self, aIndex)
 
def GetCurrentTrackWidth (self)
 
def SetCustomTrackWidth (self, aWidth)
 
def GetCustomTrackWidth (self)
 
def GetViaSizeIndex (self)
 
def SetViaSizeIndex (self, aIndex)
 
def GetCurrentViaSize (self)
 
def SetCustomViaSize (self, aSize)
 
def GetCustomViaSize (self)
 
def GetCurrentViaDrill (self)
 
def SetCustomViaDrill (self, aDrill)
 
def GetCustomViaDrill (self)
 
def UseCustomTrackViaSize (self, args)
 
def GetVisibleLayers (self)
 
def SetVisibleAlls (self)
 
def SetVisibleLayers (self, aMask)
 
def IsLayerVisible (self, aLayerId)
 
def SetLayerVisibility (self, aLayerId, aNewState)
 
def GetVisibleElements (self)
 
def SetVisibleElements (self, aMask)
 
def IsElementVisible (self, aElementCategory)
 
def SetElementVisibility (self, aElementCategory, aNewState)
 
def GetEnabledLayers (self)
 
def SetEnabledLayers (self, aMask)
 
def IsLayerEnabled (self, aLayerId)
 
def GetCopperLayerCount (self)
 
def SetCopperLayerCount (self, aNewLayerCount)
 
def AppendConfigs (self, aResult)
 
def GetBoardThickness (self)
 
def SetBoardThickness (self, aThickness)
 

Public Attributes

 this
 

Static Public Attributes

 m_ViasDimensionsList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_set)
 
 m_TrackWidthList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_set)
 
 m_NetClasses = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_set)
 
 m_MicroViasAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_set)
 
 m_BlindBuriedViaAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_set)
 
 m_CurrentViaType = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_set)
 
 m_UseConnectedTrackWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_set)
 
 m_DrawSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_set)
 
 m_EdgeSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_set)
 
 m_PcbTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_set)
 
 m_PcbTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_set)
 
 m_TrackMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_set)
 
 m_ViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_set)
 
 m_ViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_set)
 
 m_MicroViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_set)
 
 m_MicroViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_set)
 
 m_SolderMaskMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_set)
 
 m_SolderMaskMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_set)
 
 m_SolderPasteMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_set)
 
 m_SolderPasteMarginRatio = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_set)
 
 m_ModuleSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_set)
 
 m_ModuleTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_set)
 
 m_ModuleTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_set)
 
 m_RefDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_set)
 
 m_RefDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_set)
 
 m_RefDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_set)
 
 m_ValueDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_set)
 
 m_ValueDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_set)
 
 m_ValueDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_set)
 
 m_AuxOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_set)
 
 m_GridOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_set)
 
 m_Pad_Master = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_set)
 

Detailed Description

Proxy of C++ BOARD_DESIGN_SETTINGS class.

Definition at line 9801 of file pcbnew.py.

Constructor & Destructor Documentation

def pcbnew.BOARD_DESIGN_SETTINGS.__init__ (   self)
__init__(BOARD_DESIGN_SETTINGS self) -> BOARD_DESIGN_SETTINGS

Definition at line 9938 of file pcbnew.py.

Member Function Documentation

def pcbnew.BOARD_DESIGN_SETTINGS.AppendConfigs (   self,
  aResult 
)
AppendConfigs(BOARD_DESIGN_SETTINGS self, PARAM_CFG_ARRAY * aResult)

Definition at line 10134 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetBiggestClearanceValue (   self)
GetBiggestClearanceValue(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 9971 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetBoardThickness (   self)
GetBoardThickness(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10139 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCopperLayerCount (   self)
GetCopperLayerCount(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10124 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaDrill (   self)
GetCurrentMicroViaDrill(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 9986 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaSize (   self)
GetCurrentMicroViaSize(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 9981 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentNetClassName (   self)
GetCurrentNetClassName(BOARD_DESIGN_SETTINGS self) -> wxString

Definition at line 9951 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentTrackWidth (   self)
GetCurrentTrackWidth(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10001 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaDrill (   self)
GetCurrentViaDrill(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10041 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaSize (   self)
GetCurrentViaSize(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10026 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomTrackWidth (   self)
GetCustomTrackWidth(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10011 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaDrill (   self)
GetCustomViaDrill(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10051 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaSize (   self)
GetCustomViaSize(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10036 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetDefault (   self)
GetDefault(BOARD_DESIGN_SETTINGS self) -> NETCLASSPTR

Definition at line 9946 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetEnabledLayers (   self)
GetEnabledLayers(BOARD_DESIGN_SETTINGS self) -> LSET

Definition at line 10109 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetSmallestClearanceValue (   self)
GetSmallestClearanceValue(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 9976 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetTrackWidthIndex (   self)
GetTrackWidthIndex(BOARD_DESIGN_SETTINGS self) -> unsigned int

Definition at line 9991 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetViaSizeIndex (   self)
GetViaSizeIndex(BOARD_DESIGN_SETTINGS self) -> unsigned int

Definition at line 10016 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetVisibleElements (   self)
GetVisibleElements(BOARD_DESIGN_SETTINGS self) -> int

Definition at line 10089 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetVisibleLayers (   self)
GetVisibleLayers(BOARD_DESIGN_SETTINGS self) -> LSET

Definition at line 10064 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsElementVisible (   self,
  aElementCategory 
)
IsElementVisible(BOARD_DESIGN_SETTINGS self, GAL_LAYER_ID aElementCategory) -> bool

Definition at line 10099 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsLayerEnabled (   self,
  aLayerId 
)
IsLayerEnabled(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId) -> bool

Definition at line 10119 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsLayerVisible (   self,
  aLayerId 
)
IsLayerVisible(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId) -> bool

Definition at line 10079 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetBoardThickness (   self,
  aThickness 
)
SetBoardThickness(BOARD_DESIGN_SETTINGS self, int aThickness)

Definition at line 10144 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCopperLayerCount (   self,
  aNewLayerCount 
)
SetCopperLayerCount(BOARD_DESIGN_SETTINGS self, int aNewLayerCount)

Definition at line 10129 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCurrentNetClass (   self,
  aNetClassName 
)
SetCurrentNetClass(BOARD_DESIGN_SETTINGS self, wxString aNetClassName) -> bool

Definition at line 9966 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomTrackWidth (   self,
  aWidth 
)
SetCustomTrackWidth(BOARD_DESIGN_SETTINGS self, int aWidth)

Definition at line 10006 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaDrill (   self,
  aDrill 
)
SetCustomViaDrill(BOARD_DESIGN_SETTINGS self, int aDrill)

Definition at line 10046 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaSize (   self,
  aSize 
)
SetCustomViaSize(BOARD_DESIGN_SETTINGS self, int aSize)

Definition at line 10031 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetElementVisibility (   self,
  aElementCategory,
  aNewState 
)
SetElementVisibility(BOARD_DESIGN_SETTINGS self, GAL_LAYER_ID aElementCategory, bool aNewState)

Definition at line 10104 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetEnabledLayers (   self,
  aMask 
)
SetEnabledLayers(BOARD_DESIGN_SETTINGS self, LSET aMask)

Definition at line 10114 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetLayerVisibility (   self,
  aLayerId,
  aNewState 
)
SetLayerVisibility(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId, bool aNewState)

Definition at line 10084 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetTrackWidthIndex (   self,
  aIndex 
)
SetTrackWidthIndex(BOARD_DESIGN_SETTINGS self, unsigned int aIndex)

Definition at line 9996 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetViaSizeIndex (   self,
  aIndex 
)
SetViaSizeIndex(BOARD_DESIGN_SETTINGS self, unsigned int aIndex)

Definition at line 10021 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleAlls (   self)
SetVisibleAlls(BOARD_DESIGN_SETTINGS self)

Definition at line 10069 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleElements (   self,
  aMask 
)
SetVisibleElements(BOARD_DESIGN_SETTINGS self, int aMask)

Definition at line 10094 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleLayers (   self,
  aMask 
)
SetVisibleLayers(BOARD_DESIGN_SETTINGS self, LSET aMask)

Definition at line 10074 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.UseCustomTrackViaSize (   self,
  args 
)
UseCustomTrackViaSize(BOARD_DESIGN_SETTINGS self, bool aEnabled)
UseCustomTrackViaSize(BOARD_DESIGN_SETTINGS self) -> bool

Definition at line 10056 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassTrack (   self)
UseNetClassTrack(BOARD_DESIGN_SETTINGS self) -> bool

Definition at line 9956 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassVia (   self)
UseNetClassVia(BOARD_DESIGN_SETTINGS self) -> bool

Definition at line 9961 of file pcbnew.py.

Member Data Documentation

pcbnew.BOARD_DESIGN_SETTINGS.m_AuxOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_set)
static

Definition at line 9928 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_BlindBuriedViaAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_set)
static

Definition at line 9828 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_CurrentViaType = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_set)
static

Definition at line 9832 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_DrawSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_set)
static

Definition at line 9840 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_EdgeSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_set)
static

Definition at line 9844 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_GridOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_set)
static

Definition at line 9932 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_set)
static

Definition at line 9824 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_set)
static

Definition at line 9872 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_set)
static

Definition at line 9868 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_set)
static

Definition at line 9892 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_set)
static

Definition at line 9896 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_set)
static

Definition at line 9900 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_NetClasses = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_set)
static

Definition at line 9820 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_Pad_Master = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_set)
static

Definition at line 9936 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_PcbTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_set)
static

Definition at line 9852 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_PcbTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_set)
static

Definition at line 9848 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_set)
static

Definition at line 9912 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_set)
static

Definition at line 9904 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_set)
static

Definition at line 9908 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_SolderMaskMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_set)
static

Definition at line 9876 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_SolderMaskMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_set)
static

Definition at line 9880 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_SolderPasteMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_set)
static

Definition at line 9884 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_SolderPasteMarginRatio = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_set)
static

Definition at line 9888 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_TrackMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_set)
static

Definition at line 9856 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_TrackWidthList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_set)
static

Definition at line 9816 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_UseConnectedTrackWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_set)
static

Definition at line 9836 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_set)
static

Definition at line 9924 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_set)
static

Definition at line 9916 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_set)
static

Definition at line 9920 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ViasDimensionsList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_set)
static

Definition at line 9812 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_set)
static

Definition at line 9864 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.m_ViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_set)
static

Definition at line 9860 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.this

Definition at line 9944 of file pcbnew.py.


The documentation for this class was generated from the following file: