KiCAD pcbnew scripting
Public Member Functions | Public Attributes | Static Public Attributes | List of all members
pcbnew.BOARD_DESIGN_SETTINGS Class Reference
Inheritance diagram for pcbnew.BOARD_DESIGN_SETTINGS:
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Public Member Functions

def __init__ (self)
 
def GetDefault (self)
 
def GetCurrentNetClassName (self)
 
def UseNetClassTrack (self)
 
def UseNetClassVia (self)
 
def SetCurrentNetClass (self, aNetClassName)
 
def GetBiggestClearanceValue (self)
 
def GetSmallestClearanceValue (self)
 
def GetCurrentMicroViaSize (self)
 
def GetCurrentMicroViaDrill (self)
 
def GetTrackWidthIndex (self)
 
def SetTrackWidthIndex (self, aIndex)
 
def GetCurrentTrackWidth (self)
 
def SetCustomTrackWidth (self, aWidth)
 
def GetCustomTrackWidth (self)
 
def GetViaSizeIndex (self)
 
def SetViaSizeIndex (self, aIndex)
 
def GetCurrentViaSize (self)
 
def SetCustomViaSize (self, aSize)
 
def GetCustomViaSize (self)
 
def GetCurrentViaDrill (self)
 
def SetCustomViaDrill (self, aDrill)
 
def GetCustomViaDrill (self)
 
def UseCustomTrackViaSize (self, args)
 
def GetVisibleLayers (self)
 
def SetVisibleAlls (self)
 
def SetVisibleLayers (self, aMask)
 
def IsLayerVisible (self, aLayerId)
 
def SetLayerVisibility (self, aLayerId, aNewState)
 
def GetVisibleElements (self)
 
def SetVisibleElements (self, aMask)
 
def IsElementVisible (self, aElementCategory)
 
def SetElementVisibility (self, aElementCategory, aNewState)
 
def GetEnabledLayers (self)
 
def SetEnabledLayers (self, aMask)
 
def IsLayerEnabled (self, aLayerId)
 
def GetCopperLayerCount (self)
 
def SetCopperLayerCount (self, aNewLayerCount)
 
def AppendConfigs (self, aResult)
 
def GetBoardThickness (self)
 
def SetBoardThickness (self, aThickness)
 

Public Attributes

 this
 

Static Public Attributes

tuple m_ViasDimensionsList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_set)
 
tuple m_TrackWidthList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_set)
 
tuple m_NetClasses = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_set)
 
tuple m_MicroViasAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_set)
 
tuple m_BlindBuriedViaAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_set)
 
tuple m_CurrentViaType = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_set)
 
tuple m_UseConnectedTrackWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_set)
 
tuple m_DrawSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_set)
 
tuple m_EdgeSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_set)
 
tuple m_PcbTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_set)
 
tuple m_PcbTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_set)
 
tuple m_TrackMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_set)
 
tuple m_ViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_set)
 
tuple m_ViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_set)
 
tuple m_MicroViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_set)
 
tuple m_MicroViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_set)
 
tuple m_SolderMaskMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_set)
 
tuple m_SolderMaskMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_set)
 
tuple m_SolderPasteMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_set)
 
tuple m_SolderPasteMarginRatio = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_set)
 
tuple m_ModuleSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_set)
 
tuple m_ModuleTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_set)
 
tuple m_ModuleTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_set)
 
tuple m_RefDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_set)
 
tuple m_RefDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_set)
 
tuple m_RefDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_set)
 
tuple m_ValueDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_set)
 
tuple m_ValueDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_set)
 
tuple m_ValueDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_set)
 
tuple m_AuxOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_set)
 
tuple m_GridOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_set)
 
tuple m_Pad_Master = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_set)
 

Detailed Description

Class BOARD_DESIGN_SETTINGS contains design settings for a BOARD
object.

C++ includes: class_board_design_settings.h 

Definition at line 17138 of file pcbnew.py.

Constructor & Destructor Documentation

def pcbnew.BOARD_DESIGN_SETTINGS.__init__ (   self)
__init__(BOARD_DESIGN_SETTINGS self) -> BOARD_DESIGN_SETTINGS

BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS() 

Definition at line 17281 of file pcbnew.py.

Member Function Documentation

def pcbnew.BOARD_DESIGN_SETTINGS.AppendConfigs (   self,
  aResult 
)
AppendConfigs(BOARD_DESIGN_SETTINGS self, PARAM_CFG_ARRAY * aResult)

void
BOARD_DESIGN_SETTINGS::AppendConfigs(PARAM_CFG_ARRAY *aResult)

Function AppendConfigs appends to aResult the configuration setting
accessors which will later allow reading or writing of configuration
file information directly into this object. 

Definition at line 17888 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetBiggestClearanceValue (   self)
GetBiggestClearanceValue(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue()

Function GetBiggestClearanceValue.

the biggest clearance value found in NetClasses list 

Definition at line 17368 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetBoardThickness (   self)
GetBoardThickness(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetBoardThickness() const 

Definition at line 17902 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCopperLayerCount (   self)
GetCopperLayerCount(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetCopperLayerCount() const

Function GetCopperLayerCount.

int - the number of neabled copper layers 

Definition at line 17859 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaDrill (   self)
GetCurrentMicroViaDrill(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaDrill()

Function GetCurrentMicroViaDrill.

the current micro via drill, that is the current netclass value 

Definition at line 17408 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentMicroViaSize (   self)
GetCurrentMicroViaSize(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetCurrentMicroViaSize()

Function GetCurrentMicroViaSize.

the current micro via size, that is the current netclass value 

Definition at line 17395 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentNetClassName (   self)
GetCurrentNetClassName(BOARD_DESIGN_SETTINGS self) -> wxString

const wxString& BOARD_DESIGN_SETTINGS::GetCurrentNetClassName() const

Function GetCurrentNetClassName.

the current net class name. 

Definition at line 17307 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentTrackWidth (   self)
GetCurrentTrackWidth(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetCurrentTrackWidth() const

Function GetCurrentTrackWidth.

the current track width, according to the selected options ( using the
default netclass value or a preset/custom value ) the default netclass
is always in m_TrackWidthList[0] 

Definition at line 17451 of file pcbnew.py.

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def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaDrill (   self)
GetCurrentViaDrill(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetCurrentViaDrill() const

Function GetCurrentViaDrill.

the current via size, according to the selected options ( using the
default netclass value or a preset/custom value ) the default netclass
is always in m_TrackWidthList[0] 

Definition at line 17581 of file pcbnew.py.

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def pcbnew.BOARD_DESIGN_SETTINGS.GetCurrentViaSize (   self)
GetCurrentViaSize(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetCurrentViaSize() const

Function GetCurrentViaSize.

the current via size, according to the selected options ( using the
default netclass value or a preset/custom value ) the default netclass
is always in m_TrackWidthList[0] 

Definition at line 17530 of file pcbnew.py.

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def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomTrackWidth (   self)
GetCustomTrackWidth(BOARD_DESIGN_SETTINGS self) -> int

int BOARD_DESIGN_SETTINGS::GetCustomTrackWidth() const

Function GetCustomTrackWidth.

Current custom width for a track. 

Definition at line 17486 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaDrill (   self)
GetCustomViaDrill(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetCustomViaDrill() const

Function GetCustomViaDrill.

Current custom size for the via drill. 

Definition at line 17618 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetCustomViaSize (   self)
GetCustomViaSize(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetCustomViaSize() const

Function GetCustomViaSize.

Current custom size for the via diameter. 

Definition at line 17567 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetDefault (   self)
GetDefault(BOARD_DESIGN_SETTINGS self) -> NETCLASSPTR

NETCLASSPTR
BOARD_DESIGN_SETTINGS::GetDefault() const

Function GetDefault.

the default netclass. 

Definition at line 17293 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetEnabledLayers (   self)
GetEnabledLayers(BOARD_DESIGN_SETTINGS self) -> LSET

LSET
BOARD_DESIGN_SETTINGS::GetEnabledLayers() const

Function GetEnabledLayers returns a bit-mask of all the layers that
are enabled.

int - the enabled layers in bit-mapped form. 

Definition at line 17808 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetSmallestClearanceValue (   self)
GetSmallestClearanceValue(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetSmallestClearanceValue()

Function GetSmallestClearanceValue.

the smallest clearance value found in NetClasses list 

Definition at line 17381 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetTrackWidthIndex (   self)
GetTrackWidthIndex(BOARD_DESIGN_SETTINGS self) -> unsigned int

unsigned BOARD_DESIGN_SETTINGS::GetTrackWidthIndex() const

Function GetTrackWidthIndex.

the current track width list index. 

Definition at line 17421 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetViaSizeIndex (   self)
GetViaSizeIndex(BOARD_DESIGN_SETTINGS self) -> unsigned int

unsigned BOARD_DESIGN_SETTINGS::GetViaSizeIndex() const

Function GetViaSizeIndex.

the current via size list index. 

Definition at line 17499 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetVisibleElements (   self)
GetVisibleElements(BOARD_DESIGN_SETTINGS self) -> int

int
BOARD_DESIGN_SETTINGS::GetVisibleElements() const

Function GetVisibleElements returns a bit-mask of all the element
categories that are visible.

int - the visible element categories in bit-mapped form. 

Definition at line 17729 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.GetVisibleLayers (   self)
GetVisibleLayers(BOARD_DESIGN_SETTINGS self) -> LSET

LSET
BOARD_DESIGN_SETTINGS::GetVisibleLayers() const

Function GetVisibleLayers returns a bit-mask of all the layers that
are visible.

int - the visible layers in bit-mapped form. 

Definition at line 17646 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsElementVisible (   self,
  aElementCategory 
)
IsElementVisible(BOARD_DESIGN_SETTINGS self, GAL_LAYER_ID aElementCategory) -> bool

bool
BOARD_DESIGN_SETTINGS::IsElementVisible(GAL_LAYER_ID aElementCategory)
const

Function IsElementVisible tests whether a given element category is
visible.

Keep this as an inline function.

Parameters:
-----------

aElementCategory:  is from the enum by the same name

bool - true if the element is visible.

See:  enum GAL_LAYER_ID 

Definition at line 17761 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsLayerEnabled (   self,
  aLayerId 
)
IsLayerEnabled(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId) -> bool

bool
BOARD_DESIGN_SETTINGS::IsLayerEnabled(PCB_LAYER_ID aLayerId) const

Function IsLayerEnabled tests whether a given layer is enabled.

Parameters:
-----------

aLayerId:  = The layer to be tested

bool - true if the layer is enabled 

Definition at line 17840 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.IsLayerVisible (   self,
  aLayerId 
)
IsLayerVisible(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId) -> bool

bool
BOARD_DESIGN_SETTINGS::IsLayerVisible(PCB_LAYER_ID aLayerId) const

Function IsLayerVisible tests whether a given layer is visible.

Parameters:
-----------

aLayerId:  = The layer to be tested

bool - true if the layer is visible. 

Definition at line 17691 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetBoardThickness (   self,
  aThickness 
)
SetBoardThickness(BOARD_DESIGN_SETTINGS self, int aThickness)

void
BOARD_DESIGN_SETTINGS::SetBoardThickness(int aThickness) 

Definition at line 17912 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCopperLayerCount (   self,
  aNewLayerCount 
)
SetCopperLayerCount(BOARD_DESIGN_SETTINGS self, int aNewLayerCount)

void BOARD_DESIGN_SETTINGS::SetCopperLayerCount(int aNewLayerCount)

Function SetCopperLayerCount do what its name says...

Parameters:
-----------

aNewLayerCount:  = The new number of enabled copper layers 

Definition at line 17872 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCurrentNetClass (   self,
  aNetClassName 
)
SetCurrentNetClass(BOARD_DESIGN_SETTINGS self, wxString aNetClassName) -> bool

bool BOARD_DESIGN_SETTINGS::SetCurrentNetClass(const wxString
&aNetClassName)

Function SetCurrentNetClass Must be called after a netclass selection
(or after a netclass parameter change Initialize vias and tracks
values displayed in comb boxes of the auxiliary toolbar and some
others parameters (netclass name ....)

Parameters:
-----------

aNetClassName:  = the new netclass name

true if lists of tracks and vias sizes are modified 

Definition at line 17346 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomTrackWidth (   self,
  aWidth 
)
SetCustomTrackWidth(BOARD_DESIGN_SETTINGS self, int aWidth)

void BOARD_DESIGN_SETTINGS::SetCustomTrackWidth(int aWidth)

Function SetCustomTrackWidth Sets custom width for track (i.e.

not available in netclasses or preset list). To have it returned with
GetCurrentTrackWidth() you need to enable custom track & via sizes (
UseCustomTrackViaSize()).

Parameters:
-----------

aWidth:  is the new track width. 

Definition at line 17466 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaDrill (   self,
  aDrill 
)
SetCustomViaDrill(BOARD_DESIGN_SETTINGS self, int aDrill)

void
BOARD_DESIGN_SETTINGS::SetCustomViaDrill(int aDrill)

Function SetCustomViaDrill Sets custom size for via drill (i.e.

not available in netclasses or preset list). To have it returned with
GetCurrentViaDrill() you need to enable custom track & via sizes (
UseCustomTrackViaSize()).

Parameters:
-----------

aDrill:  is the new drill size. 

Definition at line 17597 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetCustomViaSize (   self,
  aSize 
)
SetCustomViaSize(BOARD_DESIGN_SETTINGS self, int aSize)

void
BOARD_DESIGN_SETTINGS::SetCustomViaSize(int aSize)

Function SetCustomViaSize Sets custom size for via diameter (i.e.

not available in netclasses or preset list). To have it returned with
GetCurrentViaSize() you need to enable custom track & via sizes (
UseCustomTrackViaSize()).

Parameters:
-----------

aSize:  is the new drill diameter. 

Definition at line 17546 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetElementVisibility (   self,
  aElementCategory,
  aNewState 
)
SetElementVisibility(BOARD_DESIGN_SETTINGS self, GAL_LAYER_ID aElementCategory, bool aNewState)

void BOARD_DESIGN_SETTINGS::SetElementVisibility(GAL_LAYER_ID
aElementCategory, bool aNewState)

Function SetElementVisibility changes the visibility of an element
category.

Parameters:
-----------

aElementCategory:  is from the enum by the same name

aNewState:  = The new visibility state of the element category

See:  enum GAL_LAYER_ID 

Definition at line 17786 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetEnabledLayers (   self,
  aMask 
)
SetEnabledLayers(BOARD_DESIGN_SETTINGS self, LSET aMask)

void
BOARD_DESIGN_SETTINGS::SetEnabledLayers(LSET aMask)

Function SetEnabledLayers changes the bit-mask of enabled layers.

Parameters:
-----------

aMask:  = The new bit-mask of enabled layers 

Definition at line 17823 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetLayerVisibility (   self,
  aLayerId,
  aNewState 
)
SetLayerVisibility(BOARD_DESIGN_SETTINGS self, PCB_LAYER_ID aLayerId, bool aNewState)

void BOARD_DESIGN_SETTINGS::SetLayerVisibility(PCB_LAYER_ID aLayerId,
bool aNewState)

Function SetLayerVisibility changes the visibility of a given layer.

Parameters:
-----------

aLayerId:  = The layer to be changed

aNewState:  = The new visibility state of the layer 

Definition at line 17710 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetTrackWidthIndex (   self,
  aIndex 
)
SetTrackWidthIndex(BOARD_DESIGN_SETTINGS self, unsigned int aIndex)

void BOARD_DESIGN_SETTINGS::SetTrackWidthIndex(unsigned aIndex)

Function SetTrackWidthIndex sets the current track width list index to
aIndex.

Parameters:
-----------

aIndex:  is the track width list index. 

Definition at line 17434 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetViaSizeIndex (   self,
  aIndex 
)
SetViaSizeIndex(BOARD_DESIGN_SETTINGS self, unsigned int aIndex)

void
BOARD_DESIGN_SETTINGS::SetViaSizeIndex(unsigned aIndex)

Function SetViaSizeIndex sets the current via size list index to
aIndex.

Parameters:
-----------

aIndex:  is the via size list index. 

Definition at line 17512 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleAlls (   self)
SetVisibleAlls(BOARD_DESIGN_SETTINGS self)

void
BOARD_DESIGN_SETTINGS::SetVisibleAlls()

Function SetVisibleAlls Set the bit-mask of all visible elements
categories, including enabled layers. 

Definition at line 17661 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleElements (   self,
  aMask 
)
SetVisibleElements(BOARD_DESIGN_SETTINGS self, int aMask)

void BOARD_DESIGN_SETTINGS::SetVisibleElements(int aMask)

Function SetVisibleElements changes the bit-mask of visible element
categories.

Parameters:
-----------

aMask:  = The new bit-mask of visible element categories 

Definition at line 17744 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.SetVisibleLayers (   self,
  aMask 
)
SetVisibleLayers(BOARD_DESIGN_SETTINGS self, LSET aMask)

void
BOARD_DESIGN_SETTINGS::SetVisibleLayers(LSET aMask)

Function SetVisibleLayers changes the bit-mask of visible layers.

Parameters:
-----------

aMask:  = The new bit-mask of visible layers 

Definition at line 17674 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.UseCustomTrackViaSize (   self,
  args 
)
UseCustomTrackViaSize(BOARD_DESIGN_SETTINGS self, bool aEnabled)
UseCustomTrackViaSize(BOARD_DESIGN_SETTINGS self) -> bool

bool BOARD_DESIGN_SETTINGS::UseCustomTrackViaSize() const

Function UseCustomTrackViaSize.

True if custom sizes of tracks & vias are enabled, false otherwise. 

Definition at line 17632 of file pcbnew.py.

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def pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassTrack (   self)
UseNetClassTrack(BOARD_DESIGN_SETTINGS self) -> bool

bool
BOARD_DESIGN_SETTINGS::UseNetClassTrack() const

Function UseNetClassTrack returns true if netclass values should be
used to obtain appropriate track width. 

Definition at line 17320 of file pcbnew.py.

def pcbnew.BOARD_DESIGN_SETTINGS.UseNetClassVia (   self)
UseNetClassVia(BOARD_DESIGN_SETTINGS self) -> bool

bool
BOARD_DESIGN_SETTINGS::UseNetClassVia() const

Function UseNetClassVia returns true if netclass values should be used
to obtain appropriate via size. 

Definition at line 17333 of file pcbnew.py.

Member Data Documentation

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_AuxOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_AuxOrigin_set)
static

Definition at line 17271 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_BlindBuriedViaAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_BlindBuriedViaAllowed_set)
static

Definition at line 17171 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_CurrentViaType = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_CurrentViaType_set)
static

Definition at line 17175 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_DrawSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_DrawSegmentWidth_set)
static

Definition at line 17183 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_EdgeSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_EdgeSegmentWidth_set)
static

Definition at line 17187 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_GridOrigin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_GridOrigin_set)
static

Definition at line 17275 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasAllowed = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasAllowed_set)
static

Definition at line 17167 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinDrill_set)
static

Definition at line 17215 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_MicroViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_MicroViasMinSize_set)
static

Definition at line 17211 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleSegmentWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleSegmentWidth_set)
static

Definition at line 17235 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextSize_set)
static

Definition at line 17239 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ModuleTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ModuleTextWidth_set)
static

Definition at line 17243 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_NetClasses = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_NetClasses_set)
static

Definition at line 17163 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_Pad_Master = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_Pad_Master_set)
static

Definition at line 17279 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_PcbTextSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextSize_set)
static

Definition at line 17195 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_PcbTextWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_PcbTextWidth_set)
static

Definition at line 17191 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultlayer_set)
static

Definition at line 17255 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultText_set)
static

Definition at line 17247 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_RefDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_RefDefaultVisibility_set)
static

Definition at line 17251 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_SolderMaskMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMargin_set)
static

Definition at line 17219 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_SolderMaskMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderMaskMinWidth_set)
static

Definition at line 17223 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_SolderPasteMargin = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMargin_set)
static

Definition at line 17227 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_SolderPasteMarginRatio = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_SolderPasteMarginRatio_set)
static

Definition at line 17231 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_TrackMinWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackMinWidth_set)
static

Definition at line 17199 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_TrackWidthList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_TrackWidthList_set)
static

Definition at line 17159 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_UseConnectedTrackWidth = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_UseConnectedTrackWidth_set)
static

Definition at line 17179 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultlayer = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultlayer_set)
static

Definition at line 17267 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultText = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultText_set)
static

Definition at line 17259 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ValueDefaultVisibility = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ValueDefaultVisibility_set)
static

Definition at line 17263 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ViasDimensionsList = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasDimensionsList_set)
static

Definition at line 17155 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ViasMinDrill = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinDrill_set)
static

Definition at line 17207 of file pcbnew.py.

tuple pcbnew.BOARD_DESIGN_SETTINGS.m_ViasMinSize = _swig_property(_pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_get, _pcbnew.BOARD_DESIGN_SETTINGS_m_ViasMinSize_set)
static

Definition at line 17203 of file pcbnew.py.

pcbnew.BOARD_DESIGN_SETTINGS.this

Definition at line 17291 of file pcbnew.py.


The documentation for this class was generated from the following file: