Manuale di riferimento

Questo documento è coperto dal Copyright © 2010-2015 dei suoi autori come elencati in seguito. È possibile distribuirlo e/o modificarlo nei termini sia della GNU General Public License (http://www.gnu.org/licenses/gpl.html), versione 3 o successive, che della Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/), versione 3.0 o successive.

Tutti i marchi registrati all’interno di questa guida appartengono ai loro legittimi proprietari.

Collaboratori

Jean-Pierre Charras, Fabrizio Tappero.

Traduzione

Marco Ciampa <ciampix@libero.it>, 2014-2015.

Feedback

Please direct any bug reports, suggestions or new versions to here:

Data di pubblicazione e versione del software

Pubblicato il 30 maggio, 2015.

1. Introduzione a Eeschema

1.1. Descrizione

Eeschema è un potente software editor di schemi elettrici, distribuito come parte della suite KiCad, e disponibile per i seguenti sistemi operativi:

  • Linux

  • Apple OS X

  • Windows

Indipendentemente dal sistema operativo, tutti i file Eeschema sono 100% compatibili da un sistema all’altro.

Eeschema è un’applicazione integrata dove tutte le funzioni di disegno, controllo, disposizione, gestione librerie e accesso al software di progettazione di circuiti stampati sono svolte all’interno del sistema Eeschema stesso.

Eeschema è stato concepito per lavorare con Pcbnew, che è il programma per la progettazione di circuiti stampati della suite di KiCad. Esso può anche esportare file di netlist, che descrivono le connessioni elettriche dello schema usabili da altri pacchetti.

Eeschema include un editor di componenti simbolici, che può creare e modificate componenti e gestire librerie. Esso integra le seguenti funzioni, aggiuntive ma essenziali, necessarie in ogni moderno software di elaborazione schemi elettrici:

  • Controllo regole di progettazione (ERC) per il controllo automatico di connessioni errate o sconnesse

  • Esportazione di file del disegno dello schema in molti formati (Postscript, PDF, HPGL e SVG).

  • Bill of Materials generation (via Python scripts, which allow many configurable formats).

1.2. Panoramica tecnica

Eeschema è limitato solo dalla disponibilità di memoria. Non c'è perciò praticamente nessun limite al numero di componenti, numero di pin nei componenti, numero di connessioni o fogli. In caso di schemi elettrici formati da più fogli, la rappresentazione è gerarchica.

Eeschema può usare schemi multifoglio di questi tipi:

  • Gerarchie semplici (ogni schema elettrico viene usato solo una volta).

  • Gerarchie complesse (alcuni schemi sono usati più di una volta con istanze multiple).

  • Gerarchie piatte (schemi esplicitamente connessi ad uno schema principale).

2. Comandi generici Eeschema

2.1. Accesso ai comandi Eeschema

È possibile avere accesso ai vari comandi:

  • Facendo clic sulla barra del menu (in cima allo schermo).

  • Facendo clic sulle icone in cima allo schermo (comandi generali).

  • Facendo clic sulle icone sul lato destro dello schermo (comandi particolari o "strumenti").

  • Facendo clic sulle icone sul lato sinistro dello schermo (opzioni di visualizzazione).

  • Premendo i pulsanti del mouse (comandi complementari importanti). In particolare un clic sul pulsante destro apre un menu contestuale che dipende dall’elemento sottostante il puntatore (zoom, griglia e modifica di elementi).

  • Tasti funzione (tasti F1, F2, F3, F4, Ins e spazio). Nello specifico: il tasto "Esc" spesso permette la cancellazione del comando in corso. Il tasto "Ins" permette la duplicazione dell’ultimo elemento creato.

Ecco le varie possibili collocazioni dei comandi:

panoramica comandi

2.2. Comandi da mouse

2.2.1. Comandi di base

Pulsante sinistro

  • Clic singolo: mostra nella barra di stato le caratteristiche del componente o del testo sotto il puntatore del mouse.

  • Doppio clic: modifica (se l’elemento è modificabile) il componente o il testo.

Pulsante destro

  • Apre un menu a scomparsa.

2.2.2. Operazioni sui blocchi

È possibile spostare, trascinare, copiare e cancellare aree selezionate in tutti i menu di Eeschema.

Areas are selected by dragging a box around them using the left mouse button.

Mantenendo premuti “Maiusc”, “Ctrl”, o “Maiusc + Ctrl” durante la selezione, esegue rispettivamente copia, trascinamento o cancellazione:

Pulsante sinistro del mouse

Sposta la selezione.

Maiusc + pulsante sinistro del mouse

Copia la selezione.

Ctrl + pulsante sinistro del mouse

Trascina la selezione.

Ctrl + Maiusc + pulsante sinistro del mouse

Cancella la selezione.

Durante il trascinamento o la copia, si può:

  • Fare clic nuovamente per piazzare gli elementi.

  • Fare clic con il pulsante destro per annullare.

Se un comando di spostamento blocco è cominciato, un altro comando può essere selezionato tramite il menu a scomparsa (mouse, tasto destro):

finestra a scomparsa della finestra principale

2.3. Tasti scorciatoia

  • Il tasto "?" mostra l’elenco dei tasti scorciatoia.

  • Hotkeys can be managed by choosing "Edit Hotkeys" in the Preferences menu.

Ecco l’elenco dei tasti scorciatoia:

Elenco tasti scorciatoia predefiniti

All hot keys can be redefined by the user via the hotkey editor:

Hotkeys editor window

2.4. Selecting grid size

In Eeschema, il puntatore si sposta sopra una griglia, che può essere visibile o nascosta. Nei menu di gestione delle librerie la griglia viene sempre visualizzata.

È possibile cambiare la dimensione della griglia attraverso il menu a scomparsa o tramite il menu Preferenze/Opzioni.

La dimensione predefinita della griglia è 50 mils (0.05") o 1,27 millimetri.

This is the prefered grid to place components and wires in a schematic, and to place pins when designing a symbol in the Component Editor.

One can also work with a smaller grid from 25 mil to 10 mil. This is only intended for designing the component body or placing text and comments, not for placing pins and wires.

2.5. Selezione Zoom

Per cambiare il livello di zoom:

  • Fare clic destro per aprire il menu a scomparsa e selezionare il livello di zoom desiderato.

  • O usare i tasti funzione:

    • F1: Ingrandisce

    • F2: Rimpicciolisce

    • F4 o clic singolo del pulsante centrale del mouse (senza spostare il mouse): Centra la vista attorno alla posizione puntatore

  • Window Zoom:

    • Rotellina del mouse: Ingrandisce / Rimpicciolisce

    • Maiusc+rotellina del mouse: Pan in su/giù

    • Ctrl+rotellina del mouse: Pan a sinistra/destra

2.6. Mostra le coordinate del puntatore

Le unità mostrate sono in pollici o in millimetri. Comunque, Eeschema lavora sempre internamente in millesimi (mils) di pollice.

Le seguenti informazioni sono mostrate sulla parte in basso a destra della finestra:

  • Fattore di zoom

  • Posizione assoluta del puntatore

  • Posizione relativa del puntatore

Le coordinate relative possono essere azzerate con la barra spazio. È utile per effettuare misure tra due punti.

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2.7. Barra menu in cima

La barra menu in cima permette l’apertura e il salvataggio degli schemi elettrici, la configurazione del programma, e la visualizzazione della documentazione.

barra dei menu

2.8. Barra strumenti in alto

Questa barra strumenti dà accesso alle funzioni principali di Eeschema.

If Eeschema is run in standalone mode, this is the available tool set:

images/toolbar_schedit_standalone.png

If Eeschema is run from the project manager (KiCad), this is the available tool set:

images/toolbar_schedit.png

Tools to initialize a project are not available, because these tools are in the Project Manager.

icona nuovo schema

Crea un nuovo schema elettrico (solo in modalità stand alone).

icona apri schema

Apre uno schema elettrico (solo in modalità stand alone).

icons/save_png

Salva lo schema (gerarchico) completo.

Page Settings icon

Select the sheet size and edit the title block.

icons/print_button_png

Open print dialog.

icons/cut_button_png

Rimuove gli elementi selezionati durante lo spostamento di un blocco.

icons/copyblock_png

Copia gli elementi selezionati negli appunti durante lo spostamento di un blocco.

icons/paste_png

Copia l’ultimo elemento o blocco selezionato nel foglio corrente.

icons/undo_png

Undo: Cancel the last change (up to 10 levels).

icons/redo_png

Redo (up to 10 levels).

icona ricerca

Invoca la finestra di dialogo della ricerca dei componenti e testi nello schema elettrico.

search replace icon

Call the dialog to search and replace texts in the schematic.

icons/zoom_in icons/zoom_out

Zoom in and out.

icons/zoom_redraw icons/zoom_fit_in_page_png

Refresh screen; zoom to fit.

icona navigazione nella gerarchia

Visualizza e naviga nell’albero della gerarchia.

icons/leave_sheet

Leave the current sheet and go up in the hierarchy.

icons/libedit_png

Chiama l’editor dei componenti Libedit per visualizzare e modificare librerie e simboli di componenti.

icons/library_browse_png

Display libraries (Viewlib).

icons_annotate_png

Annotazione dei componenti.

ERC icon

ERC (Controllo Regole Elettriche). ERC valida automaticamente le connessioni elettriche.

Netlist icon

Esporta una netlist (Pcbnew, Spice e altri formati).

BOM icon

Genera la distinta materiali (BOM - Bill of Materials).

icona modifica impronta

Modifica impronta.

icona esegui cvpcb

Chiama CvPvb per assegnare impronte a componenti.

icons/pcbnew_png

Call Pcbnew to perform a PCB layout.

Import Footprint Names icon

Back-import component footprints (selected using CvPcb) into the "footprint" fields.

2.9. Icone della barra strumenti di destra

This toolbar contains tools to:

  • Place components, wires, buses, junctions, labels, text, etc.

  • Create hierarchical sub-sheets and connection symbols

images/toolbar_schedit_rightside.png

icons/cursor_png

Cancel the active command or tool.

icons/hierarchy_cursor_png

Navigazione nella gerarchia: questo strumento rende possibile aprire il sottofoglio dello schema mostrato (clic sul simbolo di questo sottofoglio), o di risalire nella gerarchia (clic nell’area libera dello schema).

New Component icon

Display the component selector.

Add Power icon

Display the power symbol selector.

icons/add_line_png

Draw a wire.

icons/add_bus_png

Draw a bus.

icons/add_line2bus_png

Disegna punti di connessione da filo a bus. Questi elementi sono solo grafici e non creano una connessione, perciò non dovrebbero essere usati per connettere assieme fili.

icons/add_bus2bus_png

Draw bus-to-bus entry points.

icons/noconn_png

Inserisce simboli di "Non connessione". Questi devono essere piazzati sui pin dei componenti che non sono connessi. Utile nelle funzioni ERC per verificare se i pin siano stati lasciati intenzionalmente non connessi o se è una svista.

icons/add_junction_png

Inserimento giunzione. Per connettere due fili che si incrociano, o un filo e un pin, in caso di ambiguità (cioè se il capo di un filo o pin non è connesso ad una delle estremità dell’altro filo).

icons/add_line_label_png

Inserimento etichetta locale. Due fili possono essere connessi con etichette identiche nello stesso foglio. Per connessioni tra due fogli differenti, bisogna usare etichette globali o gerarchiche.

Global label icon

Inserimento etichetta globale. Tutte le etichette globali con lo stesso nome sono connesse assieme, anche tra fogli diversi.

icons/add_hierarchical_label_png

Inserimento etichetta gerarchica. Questo rende possibile inserire una connessione tra un foglio e il foglio genitore che lo contiene.

icons/add_hierarchical_subsheet_png

Inserisce un sotto-foglio gerarchico. È necessario specificare il nome del file per questo sotto-foglio.

icons/import_hierarchical_label_png

Importazione etichette gerarchiche da un sotto-foglio. Queste etichette gerarchiche devono già essere inserite nel sotto-foglio. Sono equivalenti ai pin di un componente, e devono essere connesse usando fili.

icons/add_hierar_pin_png

Place hierarchical label in a subsheet symbol. This is placed by name and does not require the label to already exist in the subsheet itself.

icons/add_dashed_line_png

Disegna una linea. Queste sono solo grafiche e non connettono alcunché.

icons/add_text_png

Place textual comments. These are only graphical.

icons/image_png

Place a bitmap image.

icons/cancel_png

Elimina l’elemento selezionato.

If several superimposed elements are selected, the priority is given to the smallest (in the decreasing priorities: junction, "No Connect", wire, bus, text, component). This also applies to hierarchical sheets. Note: the "Undelete" function of the general toolbar allows you to cancel last deletions.

2.10. Icone barra degli strumenti di sinistra

This toolbar manages the display options:

icons/grid

Show/Hide the grid.

icons/unit_inch

Passa a pollici.

icons/unit_mm

Passa a millimetri.

icons/cursor_shape

Scegli la forma del cursore

icons/hidden_pin

Visibility of "invisible" pins.

icons/lines90

Allowed orientation of wires and buses.

2.11. Menu a scomparsa e modifiche veloci

A right-click opens a contextual menu for the selected element. This contains:

  • Fattore di zoom.

  • Regolazione della griglia.

  • Commonly edited parameters of the selected element.

Pop-up without selected element.

1000000000000134000001411D7B987C_png

Editing of a label.

1000000000000198000001DF29593D94_png

Modifica di un componente.

10000000000001AC000001C185B85332_png

3. Menu principale in alto

3.1. Menu file

Menu file

New Schematic Project

Clear current schematic and initialize a new one

Open Schematic Project

Load a schematic hierarchy

Open Recent

Open a list of recently opened files

Append Schematic Sheet

Insert the contents of another sheet into the current one

Save Schematic Project

Save current sheet and all its hierarchy.

Save Current Sheet Only

Save current sheet, but not others in a hierarchy.

Save Current Sheet As…

Save current sheet with a new name.

Page Settings

Configure page dimensions and title block.

Print

Print schematic hierarchy (See also chapter Plot and Print).

Plot

Export to PDF, PostScript, HPGL or SVG format (See chapter Plot and Print).

Close

Quit without saving.

3.2. Preferences menu

3.2.1. Preferences

Preferences menu

Component Libraries

Select libraries and library search path.

Set Colors Scheme

Select colors for display, print and plot.

Schematic Editor Options

General options (units, grid size, field names, etc.).

Language

Select interface language.

Hotkeys

List, edit, export, and import hotkey settings.

Save Preferences

Save the project settings to the .pro file.

Load Preferences

Load the project settings from a .pro file.

3.2.2. Menu preferenze / Librerie componenti

Library settings

This dialog is used to configure component libraries and search paths. The configuration parameters are saved in the .pro file. Different configuration files in different directories are also possible.

Eeschema searches, in order:

  1. The configuration file (projectname.pro) in the current directory. The kicad.pro configuration file in the KiCad directory. This file can thus be the default configuration. Default values if no file is found. It will at least then be necessary to fill out the list of libraries to load, and then save the configuration.

The Check for cache/library conflicts at schematic load box is used to configure the library conflict rescue behavior. See Rescuing Cached Components for more information about that.

3.2.3. Menu preferenze / Imposta schema colori

Color settings

Color scheme for various graphic elements, and background color selection (either black or white).

3.2.4. Menu preferenze / Opzioni editor schemi elettrici

Opzioni editor schemi elettrici

Unità di misura:

Seleziona le unità di misura per lo schermo e le coordinate del puntatore (pollici o millimetri).

Dimensione griglia:

Selezione dimensione griglia.

It is recommended to work with normal grid (0.050 inches or 1,27 mm). Smaller grids are used for component building.

Largezza predefinita bus:

Spessore penna usato per disegnare i bus.

Default line width:

Pen size used to draw objects that do not have a specified pen size.

Default text size:

Text size used when creating new text items or labels

Repeat draw item horizontal displacement

increment on X axis during element duplication (usual value 0)

(after placing an item like a component, label or wire,

a duplication is made by the Insert key)

Repeat draw item vertical displacement

increment on Y axis during element duplication (usual value is 0.100 inches or 2,54 mm)

Repeat label increment:

Increment of label value during duplication of texts ending in a number, such as bus members (usual value 1 or -1).

Auto save time interval:

Time in minutes between saving backups.

Part id notation:

Style of suffix that is used to denote component parts (U1A, U1.A, U1-1, etc.)

Show Grid:

If checked: display grid.

Show hidden pins:

Display invisible (or hidden) pins, typically power pins. If checked, allows the display of power pins.

Do not center and warp cursor on zoom:

When zooming, keep the position and cursor where they are.

Use middle mouse button to pan

When enabled, the sheet can be dragged around using the middle mouse button.

Limit panning to scroll size

When enabled, the middle mouse button cannot move the sheet area outside the displayed area.

Pan while moving object

If checked, automatically shifts the window if the cursor leaves the window during drawing or moving.

Allow buses and wires to be placed in H or V orientation only

If checked, buses and wires can only be vertical or horizontal.

Otherwise, buses and wires can be placed at any orientation.

Show page limits

If checked, shows the page boundaries on screen.

3.2.5. Preferences and Language

Use default mode. Other languages are available mainly for development purposes.

3.3. Help menu

Access to on-line help (this document) for an extensive tutorial about KiCad. Use “Copy Version Information” when submitting bug reports to identify your build and system.

4. General Top Toolbar

4.1. Sheet management

The Sheet Settings icon, Sheet Settings icon , allows you to define the sheet size and the contents of the title block.

Page Settings

Sheet numbering is automatically updated. You can set the date to today by pressing the left arrow button by "Issue Date", but it will not be automatically changed.

4.2. Options of the schematic editor

4.2.1. General options

Opzioni editor schemi elettrici

4.2.2. Template fields names

You can define custom fields that will exist by default in each component (even if left empty).

Template Field Names settings

4.3. Search tool

The Find icon, Find icon , can be used to access the search tool.

Find dialog

You can search for a reference, a value, or a text string in the current sheet or in the whole hierarchy. Once found, the cursor will be positioned on the found element in the relevant sub-sheet.

4.4. Netlist tool

The Netlist icon, Netlist icon , opens the netlist generation tool.

The netlist file it creates describes all connections in the entire hierarchy.

In a multisheet hierarchy, any local label is visible only inside the sheet to which it belongs. Thus, the label TOTO of sheet 3 is different from the label TOTO of sheet 5 (if no connection has been intentionally introduced to connect them). This is due to the fact that the sheet name path is internally associated with the local label.

Note 1:

Label lengths have no limitations in Eeschema, but the software exploiting the generated netlist can be limited on this point.

Note 2:

Avoid spaces in the labels, because they will appear as separated words. It is not a limitation of Eeschema, but of many netlist formats, which often assume that a label has no spaces.

Finestra di dialogo netlist

Opzioni:

Formato predefinito:

Check to select Pcbnew as the default format.

Other formats can also be generated:

  • Orcad PCB2

  • CadStar

  • Spice, for simulators

External plugins can be launched to extend the netlist formats list (a PadsPcb Plugin was added here).

4.5. Annotation tool

The icon icons_annotate_png gives access to the annotation tool. This tool performs an automatic naming of all components in the schematic.

For multi-part components (such as 7400 TTL which contains 4 gates), a multi-part suffix is also allocated (thus a 7400 TTL designated U3 will be divided into U3A, U3B, U3C and U3D).

You can unconditionally annotate all the components, or only the new components, i.e. those which were not previously annotated.

annotate-dialog_img

Scope

Use the entire schematic. All the sheets are re-annotated (usual Option).

Use the current page only. Only the current sheet is re-annotated (this option is to be used only in special cases, for example to evaluate the amount of resistors in the current sheet.).

Keep existing annotation. Conditional annotation, only the new components will be re-annotated (usual option).

Reset existing annotation. Unconditional annotation, all the components will be re-annotated (this option is to be used when there are duplicated references).

Reset, but do not swap any annotated multi-unit parts. This keeps all groups of multiple units (e.g. U2A, U2B) together when reannotating.

Ordine di annotazione

Selects the order in which components will be numbered.

Scelte di annotazione

Selects the method by which numbers will be selected.

4.6. Electrical Rules Check tool

The icon ERC icon gives access to the electrical rules check (ERC) tool.

This tool performs a design verification and is particularly useful to detect forgotten connections, and inconsistencies.

Once you have run the ERC, Eeschema places markers to highlight problems. The diagnosis can then be given by left clicking on the marker. An error file can also be generated.

4.6.1. Main ERC dialog

ERC dialog

Errors are displayed in the Electrical Rules Checker dialog box:

  • Total count of errors and warnings.

  • Errors count.

  • Warnings count.

Opzioni:

  • Create ERC file report: check this option to generate an ERC report file.

Commands:

  • Delete Markers: to remove all ERC error/warnings markers.

  • Run: to perform an Electrical Rules Check.

  • Close: to exit this dialog box.

Note:

  • Clicking on an error message jumps to the corresponding marker in the schematic.

4.6.2. ERC options dialog

ERC Options dialog

This tab allows you to establish connectivity rules between pins; you can choose between 3 options for each case:

  • No error

  • Warning

  • Error

Each square of the matrix can be modified by clicking on it.

4.7. Bill of Material tool

The icon BOM icon gives access to the bill of materials (BOM) generator. This menu allows the generation of a file listing of the components and/or hierarchical connections (global labels).

BOM dialog

Eeschema’s BOM generator makes use of external plugins, generally in XSLT or Python form. Some are provided, and will be installed inside the KiCad program files directory.

A useful set of component properties to use for a BOM are:

  • Value - unique name for each part used.

  • Footprint - either manually entered or back-annotated (see below).

  • Field1 - Manufacturer’s name.

  • Field2 - Manufacturer’s Part Number.

  • Field3 - Distributor’s Part Number.

For example:

Finestra di dialogo proprietà componente

4.8. Import tool for footprint assignment:

4.8.1. Access:

The icon Import Footprint Names icon gives access to the back-annotate tool.

This tool allows footprint changes made in PcbNew to be imported back into the footprint fields in Eeschema.

5. Schematic Creation and Editing

5.1. Introduzione

A schematic can be represented by a single sheet, but, if big enough, it will require several sheets.

A schematic represented by several sheets is hierarchical, and all its sheets (each one represented by its own file) constitute an Eeschema project. The manipulation of hierarchical schematics will be described in the Hierarchical Schematics chapter.

5.2. General considerations

A schematic designed with Eeschema is more than a simple graphic representation of an electronic device. It is normally the entry point of a development chain that allows for:

A schematic mainly consists of components, wires, labels, junctions, buses and power ports. For clarity in the schematic, you can place purely graphical elements like bus entries, comments, and polylines.

5.3. The development chain

dev-chain_png

Components are added to the schematic from component libraries. After the schematic is made, a netlist is generated, which is later used to import the set of connections and footprints into PcbNew.

5.4. Component placement and editing

5.4.1. Find and place a component

To load a component into your schematic you can use the icon New Component icon . A dialog box allows you to type the name of the component to load.

Choose Component dialog

The Choose Component dialog will filter components by name, keywords, and description according to what you type into the search field.

Before placing the component in the schematic, you can rotate it, mirror it, and edit its fields, by either using the hotkeys or the right-click context menu. This can be done the same way after placement.

Here is a component during placement:

component during placement

5.4.2. Power ports

A power port symbol is a component (the symbols are grouped in the “power” library), so they can be placed using the component chooser. However, as power placements are frequent, the Add Power icon tool is available. This tool is similar, except that the search is done directly in the “power” library.

5.4.3. Component Editing and Modification (already placed component)

There are two ways to edit a component:

  • Modification of the component itself: position, orientation, unit selection on a multi-unit component.

  • Modification of one of the fields of the component: reference, value, footprint, etc.

When a component has just been placed, you may have to modify its value (particularly for resistors, capacitors, etc.), but it is useless to assign to it a reference number right away, or to select the unit (except for components with locked units, which you have to assign manually). This can be done automatically by the annotation function.

Component modification

To modify some feature of a component, position the cursor on the component, and then either:

  • Double-click on the component to open the full editing dialog.

  • Right-click to open the context menu and use one of the commands: Move, Orientation, Edit, Delete, etc.

Text fields modification

You can modify the reference, value, position, orientation, text size and visibility of the fields:

  • Double-click on the text field to modify it.

  • Right-click to open the context menu and use one of the commands: Move, Rotate, Edit, Delete, etc.

For more options, or in order to create fields, double-click on the component to open the Component Properties dialog.

Finestra di dialogo proprietà componente

Each field can be visible or hidden, and displayed horizontally or vertically. The displayed position is always indicated for a normally displayed component (no rotation or mirroring) and is relative to the anchor point of the component.

The option “Reset to Library Defaults” set the component to the original orientation, and resets the options, size and position of each field. However, texts fields are not modified because this could break the schematic.

5.5. Wires, Buses, Labels, Power ports

5.5.1. Introduzione

All these drawing elements can also be placed with the tools on the vertical right toolbar.

These elements are:

  • Wires: most connections between components.

  • Buses: to graphically join bus labels

  • Polylines: for graphic presentation.

  • Junctions: to create connections between crossing wires or buses.

  • Bus entries: to show connections between wires and buses. Graphical only!

  • Labels: for labeling or creating connections.

  • Global labels: for connections between sheets.

  • Texts: for comments and annotations.

  • "No Connect" flags: to terminate a pin that does not need any connection.

  • Hierarchical sheets, and their connection pins.

5.5.2. Connections (Wires and Labels)

There are two ways to establish connection:

  • Pin to pin wires.

  • Labels.

The following figure shows the two methods:

Wires labels

Note 1:

The point of “contact” of a label is the lower left corner of the first letter of the label. This point is displayed with a small square when not connected.

This point must thus be in contact with the wire, or be superimposed at the end of a pin so that the label is seen as connected.

Note 2:

To establish a connection, a segment of wire must be connected by its ends to an another segment or to a pin.

If there is overlapping (if a wire passes over a pin, but without being connected to the pin end) there is no connection.

Note 3:

Wires that cross are not implicitly connected. It is necessary to join them with a junction dot if a connection is desired.

The previous figure (wires connected to DB25FEMALE pins 22, 21, 20, 19) shows such a case of connection using a junction symbol.

Note 4:

If two different labels are placed on the same wire, they are connected together and become equivalent: all the other elements connected to one or the other labels are then connected to all of them.

5.5.3. Connections (Buses)

In the following schematic, many pins are connected to buses.

Example schematic with buses
Bus members

From the schematic point of view, a bus is a collection of signals, starting with a common prefix, and ending with a number. For example, PCA0, PCA1, and PCA2 are members of the PCA bus.

The complete bus is named PCA[N..m], where N and m are the first and the last wire number of this bus. Thus if PCA has 20 members from 0 to 19, the complete bus is noted PCA[0..19]. A collection of signals like PCA0, PCA1, PCA2, WRITE, READ cannot be contained in a bus.

Connections between bus members

Pins connected between the same members of a bus must be connected by labels. It is not possible to connect a pin directly to a bus; this type of connection will be ignored by Eeschema.

In the example above, connections are made by the labels placed on wires connected to the pins. Bus entries (wire segments at 45 degrees) to buses are graphical only, and are not necessary to form logical connections.

In fact, using the repetition command (Insert key), connections can be very quickly made in the following way, if component pins are aligned in increasing order (a common case in practice on components such as memories, microprocessors…):

  • Place the first label (for example PCA0)

  • Use the repetition command as much as needed to place members. Eeschema will automatically create the next labels (PCA1, PCA2…) vertically aligned, theoretically on the position of the other pins.

  • Draw the wire under the first label. Then use the repetition command to place the other wires under the labels.

  • If needed, place the bus entries by the same way (Place the first entry, then use the repetition command).

Nota

In the Preferences/Options menu, you can set the repetition parameters:

  • Vertical step.

  • Horizontal step.

  • Label increment (which can thus be incremented by 2, 3. or decremented).

Connessioni globali tra bus

You may need connections between buses, in order to link two buses having different names, or in the case of a hierarchy, to create connections between different sheets. You can make these connections in the following way.

Bus junction example

Buses PCA [0..15], ADR [0..7] and BUS [5..10] are connected together (note the junction here because the vertical bus wire joins the middle of the horizontal bus segment).

More precisely, the corresponding members are connected together : PCA0, ADR0 are connected, (as same as PCA1 and ADR1 … PCA7 and ADR7).

Furthermore, PCA5, BUS5 and ADR5 are connected (just as PCA6, BUS6 and ADR6 like PCA7, BUS7 and ADR7).

PCA8 and BUS8 are also connected (just as PCA9 and BUS9, PCA10 and BUS10)

5.5.4. Power ports connection

When the power pins of the components are visible, they must be connected, as for any other signal.

Components such as gates and flip-flops may have invisible power pins. Care must be taken with these because:

  • You cannot connect wires, because of their invisibility.

  • You do not know their names.

And moreover, it would be a bad idea to make them visible and to connect them like the other pins, because the schematic would become unreadable and not in accordance with usual conventions.

Nota
If you want to enforce the display of these invisible power pins, you must check the option “Show invisible power pins” in the Preferences/Options dialog box of the main menu, or the icon images/icons/hidden_pin.png on the left (options) toolbar.

Eeschema automatically connects invisible power pins of the same name to the power net of that name. It may be necessary to join power nets of different names (for example, "GND" in TTL components and "VSS" in MOS components); use power ports for this.

It is not recommended to use labels for power connection. These only have a “local” connection scope, and would not connect the invisible power pins.

The figure below shows an example of power port connections.

Power ports example

In this example, ground (GND) is connected to power port VSS, and power port VCC is connected to VDD.

Two PWR_FLAG symbols are visible. They indicate that the two power ports VCC and GND are really connected to a power source. Without these two flags, the ERC tool would diagnose: Warning: power port not powered.

All these symbols are components of the schematic library “power”.

5.5.5. "No Connect" flag

These symbols are very useful to avoid undesired ERC warnings. The electric rules check ensures that no connection has been accidentally left unconnected.

If pins must really remain unconnected, it is necessary to place a "No Connect" flag (tool No connection icon ) on these pins. These symbols do not have any influence on the generated netlists.

5.6. Drawing Complements

5.6.1. Text Comments

It can be useful (to aid in understanding the schematic) to place annotations such as text fields and frames. Text fields (tool images/icons/add_text.png ) and Polyline (tool images/icons/add_dashed_line.png ) are intended for this use, contrary to labels and wires, which are connection elements.

Here you can find an example of a frame with a textual comment.

Frame with comment example

5.6.2. Sheet title block

The title block is edited with the tool Page Settings tool .

Page settings dialog
Title block

The sheet number (Sheet X/Y) is automatically updated.

5.7. Rescuing cached components

By default, Eeschema loads component symbols out of the libraries according to the set paths. This can cause a problem when loading a very old project: if the symbols in the library have changed since they were used in the project, the ones in the project would be automatically replaced with the new versions. The new versions might not line up correctly or might be oriented differently, leading to a broken schematic.

However, when a project is saved, a cache library is saved along with it. This allows the project to be distributed without the full libraries. If you load a project where symbols are present both in its cache and in the system libraries, Eeschema will scan the libraries for conflicts. Any conflicts found will be listed in the following dialog:

Rescue conflicts dialog

You can see in this example that the project originally used a diode with the cathode facing up, but the library now contains one with the cathode facing down. This change could ruin the project! Pressing OK here will cause the old symbol to be saved into a special “rescue” library, and all the components using that symbol will be renamed to avoid naming conflicts.

If you press Cancel, no rescues will be made, so Eeschema will load all the new components by default. Because no changes were made, you can still go back and run the rescue function again: choose "Rescue Cached Components" in the Tools menu to call up the dialog again.

If you would prefer not to see this dialog, you can press "Never Show Again". The default will be to do nothing and allow the new components to be loaded. This option can be changed back in the Component Libraries preferences.

6. Schemi elettrici gerarchici

6.1. Introduzione

Una rappresentazione gerarchica è in genere una buona soluzione al problema dei progetti consistenti in più di qualche foglio. Se si vuole gestire questa tipologia di progetti, è necessario:

  • Usare fogli grandi, con il risultato di avere poi problemi di stampa e di gestione dei fogli.

  • Usare diversi fogli gerarchici, che portano ad una struttura gerarchica.

Lo schema elettrico completo consisterà quindi in un foglio principale, chiamato foglio radice, e dei sotto-fogli costituenti la gerarchia. Inoltre, una attenta suddivisione del progetto in fogli separati migliora la sua leggibilità.

From the root sheet, you must be able to find all sub-sheets. Hierarchical schematics management is very easy with Eeschema, thanks to an integrated "hierarchy navigator" accessible via the icon icons/hierarchy_nav_png of the top toolbar.

There are two types of hierarchy that can exist simultaneously: the first one has just been evoked and is of general use. The second consists in creating components in the library that appear like traditional components in the schematic, but which actually correspond to a schematic which describes their internal structure.

This second type is used to develop integrated circuits, because in this case you have to use function libraries in the schematic you are drawing.

Eeschema currently doesn’t treat this second case.

Una gerarchia può essere:

  • semplice: un dato foglio è usato solo una volta

  • complessa: un dato foglio viene usato più di una volta (istanze multiple)

  • piatta: che consiste in una gerarchia semplice, ma le connessioni tra fogli non sono disegnate.

Eeschema può gestire tutte queste gerarchie.

La creazione di uno schema elettrico gerarchico è semplice, l’intera gerarchia viene gestita partendo dallo schema radice, come se si trattasse di un unico schema elettrico.

Due passi importanti da comprendere sono:

  • Come creare un sotto-foglio.

  • Come creare delle connessioni elettriche tra sotto-fogli.

Navigation among sub-sheets It is very easy thanks to the navigator tool accessible via the button icons/hierarchy_nav_png on the top toolbar.

100000000000010C00000104307CA6BA_png

Each sheet is reachable by clicking on its name. For quick access, right click on a sheet name, and choose to Enter Sheet.

You can quickly reach the root sheet, or a sub-sheet thanks to the tool icons/hierarchy_cursor_png of the right toolbar. After the navigation tool has been selected:

  • Fare clic su un nome foglio per selezionarlo.

  • Fare clic da qualunque altra parte per selezionare il foglio principale.

6.3. Locale, etichette gerarchiche e globali

6.3.1. Proprietà

Local labels, tool icons/add_line_label_png , are connecting signals only within a sheet. Hierarchical labels (tool icons/add_hierarchical_label_png ) are connecting signals only within a sheet and to a hierarchical pin placed in the parent sheet.

Global labels (tool Global label icon ) are connecting signals across all the hierarchy. Power pins (type power in and power out) invisible are like global labels because they are seen as connected between them across all the hierarchy.

Nota
Within a hierarchy (simple or complex) one can use both hierarchical labels and/or global labels.

6.4. Hierarchy creation of headlines

You have to:

  • Place in the root sheet a hierarchy symbol called "sheet symbol".

  • Enter into the new schematic (sub-sheet) with the navigator and draw it, like any other schematic.

  • Draw the electric connections between the two schematics by placing Global Labels (HLabels) in the new schematic (sub-sheet), and labels having the same name in the root sheet, known as SheetLabels. These SheetLabels will be connected to the sheet symbol of the root sheet to the other elements of the schematic like standard component pins.

6.5. Sheet symbol

Draw a rectangle defined by two diagonal points symbolizing the sub-sheet.

The size of this rectangle must allow you to place later particular labels, hierarchy pins, corresponding to the global labels (HLabels) in the sub-sheet.

These labels are similar to usual component pins. Select the tool icons/add_hierarchical_subsheet_png .

Click to place the upper left corner of the rectangle. Click again to place the lower right corner, having a large enough rectangle.

You will then be prompted to type a file name and a sheet name for this sub-sheet (in order to reach the corresponding schematic, using the hierarchy navigator).

20000008000024130000119315BBAF66_png

You must give at least a file name. If there is no sheet name, the file name will be used as sheet name (usual way to do that).

6.6. Connections - hierarchical pins

You will create here points of connection (hierarchy pins) for the symbol which has been just created.

These points of connection are similar to normal component pins, with however the possibility to connect a complete bus with only one point of connection.

There are two ways to do this:

  • Place the different pins before drawing the sub-sheet (manual placement).

  • Place the different pins after drawing the sub-sheet, and the global labels (semi-automatic placement).

The second solution is quite preferable.

Manual placement:

  • To select the tool icons/add_hierar_pin_png .

  • Click on the hierarchy symbol where you want to place this pin.

See below an example of the creation of the hierarchical pin called "CONNEXION".

1000000000000160000000CD797712D0_png

You can define its graphical attributes, and size or later, by editing this pin sheet (Right click and select Edit in the PopUp menu).

Various pin symbols are available:

  • Input

  • Output

  • Bidirectional

  • Tri-State

  • Passive

These pin symbols are only graphic enhancements, and have no other role.

Automatic placement:

  • Select the tool icons/import_hierarchical_label_png .

  • Click on the hierarchy symbol from where you want to import the pins corresponding to global labels placed in the corresponding schematic. A hierarchical pin appears, if a new global label exists, i.e. not corresponding to an already placed pin.

  • Click where you want to place this pin.

All necessary pins can thus be placed quickly and without error. Their aspect is in accordance with corresponding global labels.

6.7. Connections - hierarchical labels

Each pin of the sheet symbol just created, must correspond to a label called hierarchical Label in the sub-sheet. Hierarchical labels are similar to labels, but they provide connections between sub-sheet and root sheet. The graphical representation of the two complementary labels (pin and HLabel) is similar. Hierarchical labels creation is made with the tool icons/add_hierarchical_label_png .

See below a root sheet example:

hierarchical_label_root_png

Notice pin VCC_PIC, connected to connector JP1.

Here are the corresponding connections in the sub-sheet :

hierarchical_label_sub_png

You find again, the two corresponding hierarchical labels, providing connection between the two hierarchical sheets.

Nota
You can use hierarchical labels and hierarchy pins to connect two buses, according to the syntax (Bus [N. .m]) previously described.

6.7.1. Labels, hierarchical labels, global labels and invisible power pins

Here are some comments on various ways to provide connections, others than wire connections.

Simple labels

Simple labels have a local capacity of connection, i.e. limited to the schematic sheet where they are placed. This is due to the fact that :

  • Each sheet has a sheet number.

  • This sheet number is associated to a label.

Thus, if you place the label "TOTO" in sheet n° 3, in fact the true label is "TOTO_3". If you also place a label "TOTO" in sheet n° 1 (root sheet) you place in fact a label called "TOTO_1", different from "TOTO_3". This is always true, even if there is only one sheet.

Hierarchical labels

What is said for the simple labels is also true for hierarchical labels.

Thus in the same sheet, a HLabel "TOTO" is considered to be connected to a local label "TOTO", but not connected to a HLabel or label called "TOTO" in another sheet.

However a HLabel is considered to be connected to the corresponding SheetLabel symbol in the hierarchical symbol placed in the root sheet.

Invisible power pins

It was seen that invisible power pins were connected together if they have the same name. Thus all the power pins declared "Invisible Power Pins" and named VCC are connected and form the equipotential VCC, whatever the sheet they are placed on.

This means that if you place a VCC label in a sub-sheet, it will not be connected to VCC pins, because this label is actually VCC_n, where n is the sheet number.

If you want this label VCC to be really connected to the equipotential VCC, it will have to be explicitly connected to an invisible power pin, thanks to a VCC power port.

6.7.2. Global labels

Global labels that have an identical name are connected across the whole hierarchy.

(power labels like vcc … are global labels)

6.8. Complex Hierarchy

Here is an example. The same schematic is used twice (two instances). The two sheets share the same schematic because the file name is the same for the two sheets (“other_sheet.sch”). But the sheet names must be different.

10000000000001C6000001CAAC972C0B_png

6.9. Flat hierarchy

You can create a project using many sheets, without creating connections between these sheets (flat hierarchy) if the next rules are respected:

  • You must create a root sheet containing the other sheets, which acts as a link between others sheets.

  • No explicit connections are needed.

  • All connections between sheets will use global labels instead of hierarchical labels.

Here is an example of a root sheet.

10000000000002C800000134F8E86C51_png

Here is the two pages, connected by global labels.

Here is the pic_programmer.sch.

100000000000020B000001B70A60DECC_png

Here is the pic_sockets.sch.

1000000000000272000001C015CA854E_png

Guardare le etichette globali.

100000000000009B00000079AC689E05_png

7. Annotazione classificazione automatica

7.1. Introduzione

Lo strumento di annotazione classificazione automatica permette di assegnare automaticamente un riferimento a componenti nello schema. Per componenti multiparte, assegna un suffisso multi-parte per minimizzare il numero di questi pacchetti. Lo strumento di annotazione classificazione automatica è accessibile tramite l’icona icons_annotate_png . Qui si trova sua finestra principale.

annotate-dialog_img

Varie possibilità sono disponibili:

  • Annota tutti i componenti (reimpostando le opzioni di annotazione esistenti)

  • Annota tutti i componenti, ma non scambiare nessuna multiparte annotata precedentemente.

  • Annota solo i nuovi componenti (cioè quelli i cui riferimenti finiscono per ? come IC?) (mantieni le opzioni di annotazione esistenti).

  • Annota l’intera gerarchia (usa l’opzione schema intero).

  • Annota solo il foglio attuale (usa l’opzione solo pagina corrente).

L’opzione “Reimposta ma non scambiare nessuna parte multipla annotata” mantiene tutte le associazioni esistenti tra parti multi-unità. In pratica, se si ha U2A e U2B, queste possono essere riannotate rispettivamente a U1A e U1B, ma non saranno mai riannotate a U1A e U2A, né a U2B e U2A. Utile se ci si vuole assicurare che i raggruppamenti di pin vengano mantenuti se si è già deciso che sottounità sia meglio piazzare in una determinata posizione.

La scelta dell’ordine di annotazione fornisce il metodo usato per impostare il numero di riferimento dentro ogni foglio della gerarchia.

Ad eccezione di casi particolari, l’annotazione automatica si applica all’intero progetto (tutti i fogli) e ad i nuovi componenti, se non si vuole modificare le annotazioni precedenti.

La scelta annotazione fornisce il metodo usato per calcolare l’id del riferimento:

  • Usa il primo numero libero nello schema: i componenti vengono annotati da 1 (per ogni prefisso di riferimento). Se esiste una precedente annotazione, verranno usati i numeri non ancora in uso.

  • Comincia dal foglio numero*100 e usa il primo numero libero: l’annotazione comincia da 101 per il foglio numero 1, da 201 per il foglio numero 2, ecc. Se ci sono più di 99 elementi con lo stesso prefisso di riferimento (U, R) nel foglio 1, lo strumento di annotazione usa il numero 200 e più, e l’annotazione per il foglio 2 comincerà dal prossimo numero libero.

  • Comincia dal foglio numero*1000 e usa il primo numero libero. L’annotazione comincia da 1001 per il foglio 1, 2001 per il foglio 2.

7.2. Alcuni esempi

7.2.1. Ordine di annotazione

Questo esempio mostra 5 elementi piazzati, ma non annotati.

2000000800003E6E0000154B2A71537E_png

Dopo che lo strumento di annotazione viene eseguito, viene ottenuto il seguente risultato.

Ordinato per posizione X.

100000000000022C000000B9BA2E1A94_png

Ordinato per posizione Y.

100000000000023D000000BC05569580_png

Si può osservare che quattro porte 74LS00 sono state distribuite nel contenitore U1, e che la quinta 74LS00 è stata assegnata al successivo U2.

7.2.2. Scelte di annotazione

Ecco un’annotazione nel foglio 2 dove è stata impostata l’opzione usa il primo numero libero nello schema.

100000000000014300000137E6B02665_png

L’optione comincia dal foglio numero*100 e usa il prino numero libero produce il seguente risultato.

1000000000000138000001495A2E0270_png

L’opzione comincia dal numero*1000 e usa il primo numero libero produce il seguente risultato.

1000000000000117000001359D8B03B1_png

8. Design verification with Electrical Rules Check

8.1. Introduzione

The Electrical Rules Check (ERC) tool performs an automatic check of your schematic. The ERC checks for any errors in your sheet, such as unconnected pins, unconnected hierarchical symbols, shorted outputs, etc. Naturally, an automatic check is not infallible, and the software that makes it possible to detect all design errors is not yet 100% complete. Such a check is very useful, because it allows you to detect many oversights and small errors.

In fact all detected errors must be checked and then corrected before proceeding as normal. The quality of the ERC is directly related to the care taken in declaring electrical pin properties during library creation. ERC output is reported as "errors" or "warnings".

ERC dialog

8.2. How to use ERC

ERC can be started by clicking on the icon ERC icon .

Warnings are placed on the schematic elements raising an ERC error (pins or labels).

Nota
  • In this dialog window, when clicking on an error message you can jump to the corresponding marker in the schematic.

  • In the schematic right-click on a marker to access the corresponding diagnostic message.

You can also delete error markers from the dialog.

8.3. Example of ERC

ERC pointers

Here you can see four errors:

  • Two outputs have been erroneously connected together (red arrow).

  • Two inputs have been left unconnected (green arrow).

  • There is an error on an invisible power port, power flag is missing (green arrow on the top).

8.4. Displaying diagnostics

By right-clicking on a marker the pop-up menu allows you to access the ERC marker diagnostic window.

ERC pointers info

and when clicking on Marker Error Info you can get a description of the error.

1000000000000250000000D72B1E53C2_png

8.5. Power pins and Power flags

It is common to have an error or a warning on power pins, even though all seems normal. See example above. This happens because, in most designs, the power is provided by connectors that are not power sources (like regulator output, which is declared as Power out).

The ERC thus won’t detect any Power out pin to control this wire and will declare them not driven by a power source.

To avoid this warning you have to place a "PWR_FLAG" on such a power port. Take a look at the following example:

20000008000030E4000026DDFDF3D5E2_png

Il marcatore dell’errore allora sparirà.

Most of the time, a PWR_FLAG must be connected to GND, because usually regulators have outputs declared as power out, but ground pins are never power out (the normal attribute is power in), so grounds never appear connected to a power source without a pwr_flag.

8.6. Configurazione

The Options panel allows you to configure connectivity rules to define electrical conditions for errors and warnings check.

10000000000002810000024A2E8220E0_png

Rules can be changed by clicking on the desired square of the matrix, causing it to cycle through the choices: normal, warning, error.

8.7. ERC report file

An ERC report file can be generated and saved by checking the option Write ERC report. The file extension for ERC report files is .erc. Here is an example of ERC report file.

ERC control (4/1/1997-14:16:4)

***** Sheet 1 (INTERFACE UNIVERSAL)
ERC: Warning Pin input Unconnected @ 8.450, 2.350
ERC: Warning passive Pin Unconnected @ 8.450, 1.950
ERC: Warning: BiDir Pin connected to power Pin (Net 6) @ 10.100, 3.300
ERC: Warning: Power Pin connected to BiDir Pin (Net 6) @ 4.950, 1.400

>> Errors ERC: 4

9. Creazione di una netlist

9.1. Panoramica

A netlist is a file which describes electrical connections between components. In the netlist file you can find:

  • The list of the components

  • The list of connections between components, called equi-potential nets.

Different netlist formats exist. Sometimes the components list and the equi-potential list are two separate files. This netlist is fundamental in the use of schematic capture software, because the netlist is the link with other electronic CAD software, like:

  • PCB software.

  • Schematic and PCB Simulators.

  • CPLD (and other programmable IC’s) compilers.

Eeschema supports several netlist formats.

  • PCBNEW format (printed circuits).

  • ORCAD PCB2 format (printed circuits).

  • CADSTAR format (printed circuits).

  • Spice format, for various simulators (the Spice format is also used by other simulators).

9.2. Formati netlist

Select the tool Netlist icon to open the netlist creation dialog box.

Pcbnew selected

100000000000015B00000103C7B601A8_png

Spice selected

100000000000015C0000010342AD04EC_png

Using the different tabs you can select the desired format. In Spice format you can generate netlists with either equi-potential names (it is more legible) or net numbers (old Spice versions accept numbers only). By clicking the Netlist button, you will be asked for a netlist file name.

Nota
With big projects, the netlist generation can take up to few minutes.

9.3. Esempi netlist

You can see below a schematic design using the PSPICE library:

10000000000002BE0000017EB6C97C72_png

Example of a PCBNEW netlist file:

# Eeschema Netlist Version 1.0 generee le 21/1/1997-16:51:15
(
(32E35B76 $noname C2 1NF {Lib=C}
(1 0)
(2 VOUT_1)
)
(32CFC454 $noname V2 AC_0.1 {Lib=VSOURCE}
(1 N-000003)
(2 0)
)
(32CFC413 $noname C1 1UF {Lib=C}
(1 INPUT_1)
(2 N-000003)
)
(32CFC337 $noname V1 DC_12V {Lib=VSOURCE}
(1 +12V)
(2 0)
)
(32CFC293 $noname R2 10K {Lib=R}
(1 INPUT_1)
(2 0)
)
(32CFC288 $noname R6 22K {Lib=R}
(1 +12V)
(2 INPUT_1)
)
(32CFC27F $noname R5 22K {Lib=R}
(1 +12V)
(2 N-000008)
)
(32CFC277 $noname R1 10K {Lib=R}
(1 N-000008)
(2 0)
)
(32CFC25A $noname R7 470 {Lib=R}
(1 EMET_1)
(2 0)
)
(32CFC254 $noname R4 1K {Lib=R}
(1 +12V)
(2 VOUT_1)
)
(32CFC24C $noname R3 1K {Lib=R}
(1 +12V)
(2 N-000006)
)
(32CFC230 $noname Q2 Q2N2222 {Lib=NPN}
(1 VOUT_1)
(2 N-000008)
(3 EMET_1)
)
(32CFC227 $noname Q1 Q2N2222 {Lib=NPN}
(1 N-000006)
(2 INPUT_1)
(3 EMET_1)
)
)
# End

In PSPICE format, the netlist is as follows:

* Eeschema Netlist Version 1.1 (Spice format) creation date: 18/6/2008-08:38:03

.model Q2N2222 npn (bf=200)
.AC 10 1Meg \*1.2
.DC V1 10 12 0.5


R12   /VOUT N-000003 22K
R11   +12V N-000003 100
L1   N-000003 /VOUT 100mH
R10   N-000005 N-000004 220
C3   N-000005 0 10uF
C2   N-000009 0 1nF
R8   N-000004 0 2.2K
Q3   /VOUT N-000009 N-000004 N-000004 Q2N2222
V2   N-000008 0 AC 0.1
C1   /VIN N-000008 1UF
V1   +12V 0 DC 12V
R2   /VIN 0 10K
R6   +12V /VIN 22K
R5   +12V N-000012 22K
R1   N-000012 0 10K
R7   N-000007 0 470
R4   +12V N-000009 1K
R3   +12V N-000010 1K
Q2   N-000009 N-000012 N-000007 N-000007 Q2N2222
Q1   N-000010 /VIN N-000007 N-000007 Q2N2222

.print ac v(vout)
.plot ac v(nodes) (-1,5)

.end

9.4. Note sulle netlist

9.4.1. Netlist name precautions

Many software tools that use netlists do not accept spaces in the component names, pins, equi-potential nets or others. Systematically avoid spaces in labels, or names and value fields of components or their pins.

In the same way, special characters other than letters and numbers can cause problems. Note that this limitation is not related to Eeschema, but to the netlist formats that can then become untranslatable to software that uses netlist files.

9.4.2. PSPICE netlists

For the Pspice simulator, you have to include some command lines in the netlist itself (.PROBE, .AC, etc.).

Any text line included in the schematic diagram starting with the keyword -pspice or -gnucap will be inserted (without the keyword) at the top of the netlist.

Any text line included in the schematic diagram starting with the keyword +pspice or +gnucap will be inserted (without the keyword) at the end of the netlist.

Here is a sample using many one-line texts and one multi-line text:

100000000000021B000001BDEA9ADDBA_png

For example, if you type the following text (do not use a label!):

-PSPICE .PROBE

a line .PROBE will be inserted in the netlist.

In the previous example three lines were inserted at the beginning of the netlist and two at the end with this technique.

If you are using multiline texts, +pspice or +gnucap keywords are needed only once:

+PSPICE .model NPN NPN
.model PNP PNP
.lib C:\Program Files\LTC\LTspiceIV\lib\cmp\standard.bjt
.backanno

creates the four lines:

.model NPN NPN
.model PNP PNP
.lib C:\Program Files\LTC\LTspiceIV\lib\cmp\standard.bjt
.backanno

Also note that the equipotential GND must be named 0 (zero) for Pspice.

9.5. Other formats

For other netlist formats you can add netlist converters in the form of plugins. These converters are automatically launched by Eeschema. Chapter 14 gives some explanations and examples of converters.

A converter is a text file (xsl format) but one can use other languages like Python. When using the xsl format, a tool (xsltproc.exe or xsltproc) read the intermediate file created by Eeschema, and the converter file to create the output file. In this case, the converter file (a sheet style) is very small and very easy to write.

9.5.1. Init the dialog window

You can add a new netlist plug-in via the Add Plugin button.

10000000000000DA000000C6E73B58D7_png

Here is the plug-in PadsPcb setup window:

100000000000021300000103755CDB21_png

The setup will require:

  • A title (for example, the name of the netlist format).

  • The plug-in to launch.

When the netlist is generated:

  1. Eeschema creates an intermediate file *.tmp, for example test.tmp.

  2. Eeschema run the plug-in, which reads test.tmp and creates test.net.

9.5.2. Command line format

Here is an example, using xsltproc.exe as a tool to convert .xsl files, and a file netlist_form_pads-pcb.xsl as converter sheet style:

f:/kicad/bin/xsltproc.exe -o %O.net f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl %I

With:

f:/kicad/bin/xsltproc.exe

A tool to read and convert xsl file

-o %O.net

Output file: %O will define the output file.

f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl

File name converter (a sheet style, xsl format).

%I

Will be replaced by the intermediate file created by Eeschema (*.tmp).

For a schematic named test.sch, the actual command line is:

f:/kicad/bin/xsltproc.exe -o test.net f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl test.tmp.

9.5.3. Converter and sheet style (plug-in)

This is a very simple piece of software, because its purpose is only to convert an input text file (the intermediate text file) to another text file. Moreover, from the intermediate text file, you can create a BOM list.

When using xsltproc as the converter tool only the sheet style will be generated.

9.5.4. Intermediate netlist file format

See Chapter 14 for more explanations about xslproc, descriptions of the intermediate file format, and some examples of sheet style for converters.

10. Plot and Print

10.1. Introduzione

You can access both print and plot commands via the file menu.

100000000000017E000001109CDAC612_png

The suported output formats are Postscript, PDF, SVG, DXF and HPGL. You can also directly print to your printer.

10.2. Comandi di stampa comuni

Plot Current Page

prints one file for the current sheet only.

Plot All Pages

allows you to plot the whole hierarchy (one print file is generated for each sheet).

10.3. Plot in Postscript

This command allows you to create PostScript files.

100000000000017A000001555B390DD5_png

The file name is the sheet name with an extension .ps. You can disable the option "Plot border and title block". This is useful if you want to create a postscript file for encapsulation (format .eps) often used to insert a diagram in a word processing software. The message window displays the file names created.

10.4. Plot in PDF

eeschema_plot_pdf.png

Allows you to create plot files using the format PDF. The file name is the sheet name with an extension .pdf.

10.5. Plot in SVG

10000000000001D8000001A61AC74D2A_png

Allows you to create plot files using the vectored format SVG. The file name is the sheet name with an extension .svg.

10.6. Plot in DXF

10000000000000FB00000191F3D6461D_png

Allows you to create plot files using the format DXF. The file name is the sheet name with an extension .dxf.

10.7. Plot in HPGL

This command allows you to create an HPGL file. In this format you can define:

  • Page size.

  • Origin.

  • Pen width (in mm).

The plotter setup dialog window looks like the following:

1000000000000196000001CC52FEA30B_png

The output file name will be the sheet name plus the extension .plt.

10.7.1. Sheet size selection

Sheet size is normally checked. In this case, the sheet size defined in the title block menu will be used and the chosen scale will be 1. If a different sheet size is selected (A4 with A0, or A with E), the scale is automatically adjusted to fill the page.

10.7.2. Offset adjustments

For all standard dimensions, you can adjust the offsets to center the drawing as accurately as possible. Because plotters have an origin point at the center or at the lower left corner of the sheet, it is necessary to be able to introduce an offset in order to plot properly.

Generally speaking:

  • For plotters having their origin point at the center of the sheet the offset must be negative and set at half of the sheet dimension.

  • For plotters having their origin point at the lower left corner of the sheet the offset must be set to 0.

To set an offset:

  • Select sheet size.

  • Set offset X and offset Y.

  • Click on accept offset.

This command, available via the icon icons/print_button_png , allows you to visualize and generate design files for the standard printer.

100000000000015A000000C1CF6CC2C5_png

The "Print sheet reference and title block" option enables or disables sheet references and title block.

The "Print in black and white" option sets printing in monochrome. This option is generally necessary if you use a black and white laser printer, because colors are printed into half-tones that are often not so readable.

11. Editor dei componenti della libreria

11.1. Informazioni generali sui componenti della libreria

Un componente è un elemento dello schema elettrico che contiene una rappresentazione grafica, connessioni elettriche e campi che definiscono il componente stesso. I componenti usati in uno schema elettrico vengono memorizzati nelle librerie di componenti. Eeschema fornisce uno strumento di modifica dei componenti di libreria che permette di creare librerie, aggiungere, eliminare o trasferire componenti tra librerie, esportare componenti su file e importare componenti da file. In breve, lo strumento di modifica delle librerie fornisce un modo semplice per gestire i file delle librerie di componenti.

11.2. Panoramica delle librerie di componenti

Una libreria di componenti è composta da uno o più componenti. Generalmente i componenti sono raggruppati per funzione, tipo e/o produttore.

Un componente è composto di:

  • Elementi grafici (linee, cerchi, archi, testo, ecc.) che forniscono la definizione del simbolo.

  • I piedini hanno sia proprietà grafiche (linea, clock, inversione, attivo basso, ecc.) che proprietà elettriche (ingresso, uscita, bidirezionale, ecc.) usate dallo strumento di controllo regole elettriche (ERC).

  • Campi come riferimenti, valori, nomi impronte corrispondenti per la progettazione del circuito stampato, ecc.

  • Alias usati per associare a componenti comuni come un 7400 con tutte le sue derivazioni come 74LS00, 74HC00 e 7437. Tutti questi alias condividono lo stesso componente di libreria.

La corretta progettazione di componenti richiede:

  • Specificare se il componente è formato da più di un’unità.

  • Specificare se il componente possiede uno stile corpo alternativo altrimenti detto rappresentazione De Morgan.

  • La progettazione della sua rappresentazione simbolica usando linee, rettangoli, cerchi, poligoni e testo.

  • L’aggiunta di pin definendo con cura l’elemento grafico di ogni pin, il nome, il numero, e le sue proprietà elettriche (ingresso, uscita, tri-state, alimentazione, ecc.).

  • L’aggiunta di un alias per altri componenti che hanno lo stesso simbolo e piedinatura o la rimozione di uno di questi se il componente è stato creato da un altro componente.

  • L’aggiunta di campi opzionali come il nome dell’impronta usata dal software di progettazione di circuiti stampati e/o la definizione della loro visibilità.

  • La documentazione del componente aggiungendo una stringa di descrizione, collegamenti ai datasheet, ecc.

  • Il salvataggio nella libreria scelta.

11.3. Panoramica dell’editor dei componenti di libreria

Di seguito si può osservare la finestra principale dell’editor di librerie componenti. Esso consiste in tre barre degli strumenti che servono a velocizzare l’accesso alle funzioni più comuni, e un’area di visualizzazione/modifica del componente. Sulle barre degli strumenti non sono disponibili tutti comandi, ma quelli che mancano sono comunque accessibili tramite i menu.

100000000000049F000002C20FF41347_png

11.3.1. Barra strumenti principale

La barra degli strumenti principale è collocata tipicamente in cima alla finestra principale, come mostrato sotto, e consiste nei comandi di gestione delle librerie, annullamento e ripetizione delle ultime operazioni, zoom e apertura delle finestre di dialogo delle proprietà dei componenti.

images/toolbar_libedit.png

icons/save_library_png

Salva la libreria attualmente selezionata. Il pulsante sarà disabilitato se non è attualmente selezionata nessuna libreria o se non sono stati effettuati dei cambiamenti alla libreria attualmente selezionata.

icons/library_png

Seleziona la libreria da modificare.

icons/delete_png

Elimina un componente dalla libreria correntemente selezionata o da qualsiasi libreria definita dal progetto se non ci sono librerie selezionate.

icons/library_browse_png

Apre il browser della libreria componenti per selezionare la libreria e il componente da modificare.

icons/new_component_png

Crea un nuovo componente.

icons/import_cmp_from_lib_png

Carica un componente dalla libreria attualmente selezionata per la modifica.

icons/copycomponent_png

Crea un nuovo componente dal componente attualmente caricato.

icons/save_part_in_mem_png

Salva i cambiamenti del componente corrente in memoria. Il file della libreria non viene modificato.

icons/import_png

Importa un componente da un file.

icons/export_png

Esporta il componente corrente in un file.

icons/new_library_png

Crea un nuvo file libreria contenente il componente corrente. Nota: le nuove librerie non vengono automaticamente aggiunte al progetto.

icons/undo_png

Annulla l’ultima modifica.

icons/redo_png

Annulla l’ultimo annullamento.

icons/part_properties_png

Modifica le proprietà del componente corrente.

icons/add_text_png

Modifica i campi del componente corrente.

icons/erc_png

Controllo nel componente corrente la presenza di errori di progettazione.

images/icons/zoom_in.png

Zoom in.

images/icons/zoom_out.png

Zoom out.

images/icons/zoom_redraw.png

Aggiorna lo schermo.

images/icons/zoom_fit_in_page.png

Zoom sul componente della dimensione schermo.

icons/morgan1_png

Seleziona lo stile corpo normale. Il pulsante è disabilitato se il componente corrente non ha uno stile corpo alternativo.

icons/morgan2_png

Seleziona lo stile corpo alternativo. Il pulsante è disabiltato se il componente corrente non ha uno stile corpo alternativo.

icons/datasheet_png

Mostra la documentazione associata. Il pulsante sarà disabilitato se non è stata definita della documentazione per il componente.

images/toolbar_libedit_part.png

Seleziona l’unità da mostrare. Il menu a discesa sarà disabilitato se il componente corrente non deriva da unità multiple.

images/toolbar_libedit_part.png

Selezione dell’alias. Il menu a discesa sarà disabilitato se il componente corrente non ha nessun alias.

icons/pin2pin_png

Modifica pin: modifica indipendente di forma e posizione di pin per componenti composti da unità e simboli multipli.

icons/pin_table_png

Mostra la tabella piedini.

11.3.2. Barra strumenti elementi

La barra verticale collocata tipicamente sulla destra della finestra principale permette di inserire tutti gli elementi richiesti per la progettazione di un componente. La tabella sottostante definisce ogni pulsante della barra.

icons/cursor_png

Strumento di selezione. Facendo clic destro con questo strumento si apre il menu contestuale per l’oggetto sotto il puntatore. Il clic sinistro invece mostra gli attributi dell’oggetto sotto il puntatore in un pannello messaggi in fondo alla finestra principale. Doppio clic sinistro apre la finestra delle proprietà per l’oggetto sotto il puntatore.

icons/pin_png

Strumento pin. Clic sinistro per aggiungere un nuovo pin.

icons/add_text_png

Strumento testo grafico. Clic sinistro per aggiungere un nuovo elemento di testo grafico.

icons/add_rectangle_png

Strumento rettangolo. Clic sinistro per cominciare a disegnare il primo angolo di un rettangolo grafico. Di nuovo clic sinistro per piazzare l’angolo opposto del rettangolo.

icons/add_circle_png

Strumento cerchio. Clic sinistro per cominciare a disegnare un nuovo cerchio grafico dal centro. Di nuovo clic sinistro per definire il raggio del cerchio.

icons/add_arc_png

Strumento arco. Clic sinistro per cominciare a disegnare un nuovo arco grafico dal centro. Di nuovo clic sinistro per definire la prima estremità dell’arco. Ancora clic sinistro per definire la seconda estremità dell’arco.

icons/add_polygon_png

Strumento poligono. Clic sinistro per cominciare a disegnare un nuovo poligono grafico nel componente corrente. Clic sinistro per ogni linea aggiunta al poligono. Doppio clic sinistro per completare il poligono.

icons/anchor_png

Strumento àncora. Clic sinistro per impostar la posizione di ancoraggio del componente.

icons/import_png

Importa un componente da file.

icons/export_png

Esporta il componente corrente in un file.

icons/delete_png

Strumento cancella. Clic sinistro per cancellare un oggetto dal componente corrente.

11.3.3. Barra opzioni

La barra strumenti verticale, tipicamente collocata sul lato sinistro della finestra principale, permette di impostare alcune opzioni di disegno dell’editor. La tabella sottostante descrive ogni pulsante della barra.

icons/grid_png

Abilita/disabilita la visibilità della griglia.

icons/unit_inch_png

Imposta l’unità in pollici.

icons/unit_mm_png

Imposta l’unità in millimetri.

icons/cursor_shape_png

Abilita/disabilia il puntatore a pieno schermo.

11.4. Selezione e manutenzione librerie

La selezione della libreria corrente è possibile tramite l’icona icons/library_png che mostra tutte le librerie disponibili e permette di selezionarne una. Quando un componente viene caricato o salvato, viene messo un questa libreria. In nome di libreria del componente è il contenuto del suo campo valore.

Nota
  • È necessario caricare una libreria in Eeschema, per avere accesso ai suoi contenuti.

  • Il contenuto della libreria corrente può essere salvato dopo le modifiche, facendo clic sull’icona icons/save_library_png nella barra strumenti principale.

  • Un componente può essere rimosso da qualsiasi libreria facendo clic sul’icona icons/delete_png .

11.4.1. Selezione e salvataggio di un componente

Quando si modifica un componente non si sta veramente lavorando sul componente nella sua libreria ma su una copia di esso nella memoria del computer. Ogni azione di modifica può essere facilmente annullata. Un componente può essere caricato da una libreria locale o da un componente esistente.

Selezione componenti

Facendo clic sull’icona icons/import_cmp_from_lib_png sulla barra strumenti principale viene mostrato l’elenco di tutti i componenti disponibili, pronti per essere selezionati e caricati dalla libreria correntemente selezionata.

Nota
Se un componente selezionato è un alias, il nome del componente caricato viene mostrato sulla barra del titolo della finestra al posto dell’alias selezionato. L’elenco degli alias dei componenti viene sempre caricato con ogni componente e può essere modificato. Si può creare un nuovo componente selezionando un alias del componente corrente dal pulsante images/toolbar_libedit_alias.png . Il primo elemento nell’elenco degli alias è il nome radice del componente.
Nota
Oppure, facendo clic sull’icona icons/import_png consente di caricare un componente precedentemente salvato tramite il pulsante icons/export_png .
Salvataggio di un componente

Dopo la modifica, un componente può essere salvato nella libreria corrente, in una nuova libreria o esportato su un file di salvataggio.

Per salvare il componente modificato nella libreria corrente, fare clic sull’icona icons/save_part_in_mem_png . Si noti che il comando di salvataggio salva solo i cambiamenti del componente nella memoria locale. In questo modo, si può cambiare idea prima di salvare la libreria.

Per salvare permanentemente i cambiamenti al componente sul file di libreria, fare clic sull’icona icons/save_library_png ; sovrascriverà il file di libreria esistente con i cambiamenti del componente.

Se si desidera creare una nuova libreria contenente il componente corrente, fare clic sull’icona icons/new_library_png . Verrà richiesto di inserire il nome per la nuova libreria.

Nota

Le nuove librerie non sono automaticamente aggiunte al progetto corrente.

Bisogna aggiungere qualsiasi nuova libreria si desideri usare in uno schema all’elenco delle librerie del progetto in Eeschema usando la finestra di dialogo di configurazione del componente.

Library settings

Fare clic sull’icona icons/export_png per creare un file contenente solo il componente corrente. Questo file sarà un file di libreria standard che conterrà solo un componente. Questo file può essere usato per importare il componente in un’altra libreria. I effetti il comando per la creazione di una nuova libreria ed il comando di esportazione sono praticamente identici.

Trasferire componenti ad un’altra libreria

È molto facile copiare un componente da una libreria sorgente in una di destinazione usando i seguenti comandi:

  • Selezionare la libreria sorgente facendo clic su icons/library_png .

  • Carica il componente da trasferire facendo clic su icons/import_cmp_from_lib_png . Il componente verrà mostrato nell’area di modifica.

  • Selezionare la libreria di destinazione facendo clic su icons/library_png .

  • Salvare il componente corrente sulla nuova libreria nella memoria locale facendo clic su icons/save_part_in_mem_png .

  • Salvare il componente nel file della libreria locale corrente facendo clic su icons/save_library_png .

Abbandonare i cambiamenti del componente

Quando si sta lavorando su un componente, il componente modificato è solo una copia di lavoro del componente effettivo nella sua libreria. Ciò significa che fintantoché questo non sia stato salvato, si può ricaricare e annullare tutti cambiamenti effettuati. Se lo si è già aggiornato nella memoria locale e non lo si è salvato nel file di libreria, si può sempre uscire e ricominciare. Eeschema annullerà tutti i cambiamenti.

11.5. Creare componenti di libreria

11.5.1. Creare un nuovo componente

A new component can be created clicking the icons/new_component_png . You will be asked for a component name (this name is used as default value for the value field in the schematic editor), the reference designator (U, IC, R…), the number of units per package (for example a 7400 is made of 4 units per package) and if an alternate body style (sometimes referred to as DeMorgan) is desired. If the reference designator field is left empty, it will default to "U". These properties changed later, but it is preferable to set them correctly at the creation of the component.

1000000000000153000001795877268E_png

A new component will be created using the properties above and will appear in the editor as shown below.

100000000000030A00000205F0A88B4F_png

11.5.2. Creare un componente da un altro componente

Spesso, il componente che si vuole creare è simile ad un altro già presente in una libreria componenti. In questo caso risulta più facile caricare e modificare un componente esistente (N.d.T. piuttosto che ricrearne uno nuovo da zero).

  • Caricare il componente che verrà usato come punto di partenza.

  • Fare clic su icons/copycomponent_png o modificarne il nome facendo clic destro sul campo valore modificando il testo. Se si sceglie di duplicare il componente corrente, verrà richiesto di inserire un nuovo nome componente.

  • Se il componente modello possiede degli alias, verrà richiesto di rimuovere gli alias dal nuovo componente che vanno in conflitto con la libreria corrente. Se la risposta è no, la creazione del nuovo componente verrà abortita. Le librerie componnenti non possono avere nomi o alias duplicati.

  • Modifica il nuovo componente come richiesto.

  • Aggiornare il nuovo componente nella libreria corrente facendo clic su icons/save_part_in_mem_png oppure salvare su una nuova libreria facendo clic su icons/new_library_png altrimenti, se si vuole salvare questo nuovo componente in un’altra libreria preesistente, selezionare l’altra libreria facendo clic su icons/library_png e salvare il nuovo componente.

  • Salvare il file di libreria corrente su disco facendo clic su icons/save_library_png .

11.5.3. Proprietà del componente

Component properties should be carefully set during the component creation or alternatively they are inherited from the copied component. To change the component properties, click on the icons/part_properties_png to show the dialog below.

10000000000001B2000001509F311F99_png

It is very important to correctly set the number of units per package and if the component has an alternate symbolic representation parameters correctly because when pins are edited or created the corresponding pins for each unit will created. If you change the number of units per package after pin creation and editing, there will be additional work introduced to add the new unit pins and symbols. Nevertheless, it is possible to modify these properies at any time.

The graphic options "Show pin number" and "Show pin name" define the visibility of the pin number and pin name text. This text will be visible if the corresponding options are checked. The option "Place pin names inside" defines the pin name position relative to the pin body. This text will be displayed inside the component outline if the option is checked. In this case the "Pin Name Position Offset" property defines the shift of the text away from the body end of the pin. A value from 30 to 40 (in 1/1000 inch) is reasonable.

The example below shows a component with the "Place pin name inside" option unchecked. Notice the position of the names and pin numbers.

2000000800003D8000002550D6E11DAF_png

11.5.4. Components with Alternate Symbols

If the component has more than one symbolic repersentation, you will have to select the different symbols of the component in order to edit them. To edit the normal symbol, click the icons/morgan1_png .

To edit the alternate symbol click on the icons/morgan2_png . Use the images/toolbar_libedit_part.png shown below to select the unit you wish to edit.

1000000000000456000002680D968591_png

11.6. Graphical Elements

Graphical elements create the symbolic representation of a component and contain no electrical connection information. Their design is possible using the following tools:

  • Lines and polygons defined by start and end points.

  • Rectangles defined by two diagonal corners.

  • Circles defined by the center and radius.

  • Arcs defined by the starting and ending point of the arc and its center. An arc goes from 0° to 180°.

The vertical toolbar on the right hand side of the main window allows you to place all of the graphical elements required to design a component’s symbolic representation.

11.6.1. Graphical Element Membership

Each graphic element (line, arc, circle, etc.) can be defined as common to all units and/or body styles or specific to a given unit and/or body style. Element options can be quickly accessed by right-clicking on the element to display the context menu for the selected element. Below is the context menu for a line element.

20000009000056D200003432E4789F12_png

You can also double-left-click on an element to modify its properties. Below is the properties dialog for a polygon element.

100000000000012100000146E8D1DDCE_png

The properties of a graphic element are:

  • Line width which defines the width of the element’s line in the current drawing units.

  • The "Common to all units in component" setting defines if the graphical element is drawn for each unit in component with more than one unit per package or if the graphical element is only drawn for the current unit.

  • The "Common by all body styles (DeMorgan)" setting defines if the graphical element is drawn for each symbolic representation in components with an alternate body style or if the graphical element is only drawn for the current body style.

  • The fill style setting determines if the symbol defined by the graphical element is to be drawn unfilled, background filled, or foreground filled.

11.6.2. Graphical Text Elements

The icons/add_text_png allows for the creation of graphical text. Graphical text is always readable, even when the component is mirrored. Please note that graphical text items are not fields.

11.7. Multiple Units per Component and Alternate Body Styles

Components can have two symbolic representations (a standard symbol and an alternate symbol often referred to as "DeMorgan") and/or have more than one unit per package (logic gates for example). Some components can have more than one unit per package each with different symbols and pin configurations.

Consider for instance a relay with two switches which can be designed as a component with three different units: a coil, switch 1, and switch Designing a component with multiple units per package and/or alternate body styles is very flexible. A pin or a body symbol item can be common to all units or specific to a given unit or they can be common to both symbolic representation so are specific to a given symbol representation.

By default, pins are specific to each symbolic representation of each unit, because the pin number is specific to a unit, and the shape depends on the symbolic representation. When a pin is common to each unit or each symbolic representation, you need to create it only once for all units and all symbolic representations (this is usually the case for power pins). This is also the case for the body style graphic shapes and text, which may be common to each unit (but typically are specific to each symbolic representation).

11.7.1. Example of a Component Having Multiple Units with Different Symbols:

This is an example of a relay defined with three units per package, switch 1, switch 2, and the coil:

Option: pins are not linked. One can add or edit pins for each unit without any coupling with pins of other units.

2000000900003094000008CA41334F3B_png

All units are not interchangeable must be selected.

10000000000001B20000014F8449F983_png

Unit 1

10000000000000FF000000A989993852_png

Unit 2

1000000000000114000000B804ED21E4_png

Unit 3

100000000000010C000000B26BA7AD80_png

It does not have the same symbol and pin layout and therefore is not interchangeable with units 1 and 2.

Graphical Symbolic Elements

Shown below are properties for a graphic body element. From the relay example above, the three units have different symbolic representations. Therefore, each unit was created separately and the graphical body elements must have the "Common to all units in component" disabled.

2000000900003855000027B1F162801F_png

11.8. Pin Creation and Editing

You can click on the icons/pin_png to create and insert a pin. The editing of all pin properties is done by double-clicking on the pin or right-clicking on the pin to open the pin context menu. Pins must be created carefully, because any error will have consequences on the PCB design. Any pin already placed can be edited, deleted, and/or moved.

11.8.1. Pin Overview

A pin is defined by its graphical representation, its name and its "number". The pin’s "number" is defined by a set of 4 letters and / or numbers. For the Electrical Rules Check (ERC) tool to be useful, the pin’s "electrical" type (input, output, tri-state…) must also be defined correctly. If this type is not defined properly, the schematic ERC check results may be invalid.

Important notes:

  • Do not use spaces in pin names and numbers.

  • To define a pin name with an inverted signal (overline) use the ~ (tilde) character. The next ~ character will turn off the overline. For example \~FO~O would display FO O.

  • If the pin name is reduced to a single symbol, the pin is regarded as unnamed.

  • Pin names starting with #, are reserved for power port symbols.

  • A pin "number" consists of 1 to 4 letters and/ or numbers. 1,2,..9999 are valid numbers. A1, B3, Anod, Gnd, Wire, etc. are also valid.

  • Duplicate pin "numbers" cannot exist in a component.

11.8.2. Pin Properties

100000000000031000000198EA7FCC88_png

The pin properties dialog allows you to edit all of the characteristics of a pin. This dialog pops up automatically when you create a pin or when double-clicking on an existing pin. This dialog allows you modify:

  • Name and name’s text size.

  • Number and number’s text size.

  • Length.

  • Electrical and graphical types.

  • Unit and alternate representation membership.

  • Visibility.

11.8.3. Pins Graphical Styles

Shown in the figure below are the different pin graphical styles. The choice of graphic styles does not have any influence on the pin’s electrical type.

10000000000003100000019800B8A351_png

11.8.4. Pin Electrical Types

Choosing the correct electrical type is important for the schematic ERC tool. The electrical types defined are:

  • Bidirectional which indicates bidirectional pins commutable between input and output (microprocessor data bus for example).

  • Tri-state is the usual 3 states output.

  • Passive is used for passive component pins, resistors, connectors, etc.

  • Unspecified can be used when the ERC check doesn’t matter.

  • Power input is used for the component’s power pins. Power pins are automatically connected to the other power input pins with the same name.

  • Power output is used for regulator outputs.

  • Open emitter and open collector types can be used for logic outputs defined as such.

  • Not connected is used when a component has a pin that has no internal connection.

11.8.5. Pin Global Properties

You can modify the length or text size of the name and/or number of all the pins using the Global command entry of the pin context menu. Click on the parameter you want to modify and type the new value which will then be applied to all of the current component’s pins.

100000000000018D000001023AE0F5CF_png

11.8.6. Defining Pins for Multiple Units and Alternate Symbolic Representations

Components with multiple units and/or graphical representations are particularly problematic when creating and editing pins. The majority of pins are specific to each unit (because their pin number is specific to each unit) and to each symbolic representation (because their form and position is specific to each symbolic representation). The creation and the editing of pins can be problematic for components with multiple units per package and alternate symbolic representations. The component library editor allows the simultaneous creation of pins. By default, changes made to a pin are made for all units of a multiple unit component and both representations for components with an alternate representation.

The only exception to this is the pin’s graphical type and name. This dependency was established to allow for easier pin creation and editing in most of the cases. This dependency can be disabled by toggling the icons/pin2pin_png on the main tool bar. This will allow you to create pins for each unit and representation completely independently.

A component can have two symbolic representations (representation known as "DeMorgan") and can be made up of more than one unit as in the case of components with logic gates. For certain components, you may want several different graphic elements and pins. Like the relay sample shown in section 11.7.1, a relay can be represented by three distinct units: a coil, switch contact 1, and switch contact 2.

The management of the components with multiple units and components with alternate symbolic representations is flexible. A pin can be common or specific to different units. A pin can also be common to both symbolic representations or specific to each symbolic representation.

By default, pins are specific to each representation of each unit, because their number differs for each unit, and their design is different for each symbolic representation. When a pin is common to all units, it only has to drawn once such as in the case of power pins.

An example is the output pin 7400 quad dual input NAND gate. Since there are four units and two symbolic representations, there are eight separate output pins defined in the component definition. When creating a new 7400 component, unit A of the normal symbolic representation will be shown in the library editor. To edit the pin style in alternate symbolic representation, it must first be enabled by clicking the icons/morgan2_png button on the tool bar. To edit the pin number for each unit, select the appropriate unit using the images/toolbar_libedit_alias.png drop down control.

11.9. Component Fields

All library components are defined with four default fields. The reference designator, value, footprint assignment, and documentation file link fields are created whenever a component is created or copied. Only the reference designator and value fields are required. For existing fields, you can use the context menu commands by right-clicking on the pin. Components defined in libraries are typically defined with these four default fields. Additional fields such as vendor, part number, unit cost, etc. can be added to library components but generally this is done in the schematic editor so the additional fields can be applied to all of the components in the schematic.

11.9.1. Editing Component Fields

To edit an existing component field, right-click on the field text to show the field context menu shown below.

200000090000154B000027E6496104E3_png

To edit undefined fields, add new fields, or delete optional fields icons/add_text_png on the main tool bar to open the field properties dialog shown below.

1000000000000208000002211F585317_png

Fields are text sections associated with the component. Do not confuse them with the text belonging to the graphic representation of this component.

Important notes:

  • Modifying value fields effectively creates a new component using the current component as the starting point for the new component. This new component has the name contained in the value field when you save it to the currently selected library.

  • The field edit dialog above must be used to edit a field that is empty or has the invisible attribute enable.

  • The footprint is defined as an absolute footprint using the LIBNAME:FPNAME format where LIBNAME is the name of the footprint library defined in the footprint library table (see the "Footprint Library Table" section in the Pcbnew "Reference Manual") and FPNAME is the name of the footprint in the library LIBNAME.

11.10. Power Symbols

Power symbols are created the same way as normal components. It may be useful to place them in a dedicated library such as power.lib. Power symbols consist of a graphical symbol and a pin of the type "Power Invisible". Power port symbols are handled like any other component by the schematic capture software. Some precautions are essential. Below is an example of a power +5V symbol.

1000000000000438000002C20F7CD114_png

To create a power symbol, use the following steps:

  • Add a pin of type "Power input" named +5V (important because this name will establish connection to the net +5V), with a pin number of 1 (number of no importance), a length of 0, and a "Line" "Graphic Style".

  • Place a small circle and a segment from the pin to the circle as shown.

  • The anchor of the symbol is on the pin.

  • The component value is +5V.

  • The component reference is \#+5V. The reference text is not important except the first character which must be # to indicate that the component is a power symbol. By convention, every component in which the reference field starts with a # will not appear in the component list or in the netlist and the reference is declared as invisible.

An easier method to create a new power port symbol is to use another symbol as a model:

  • Caricare un simbolo di alimentazione esistente.

  • Cambiare il nome del pin nel nome del nuovo simbolo di alimentazione.

  • Edit the value field to the same name as the pin, if you want to display the power port value.

  • Salvare il nuovo componente.

12. LibEdit - Complements

12.1. Panoramica

Un componente consiste dei seguenti elementi

  • Una rappresentazione grafica (forma geometrica, testi).

  • Piedini.

  • Campi o testo associato usato dai post processori: netlist, elenco componenti.

Two fields are to be initialized: reference and value. The name of the design associated with the component, and the name of the associated footprint, the other fields are the free fields, they can generally remain empty, and could be filled during schematic capture.

However, managing the documentation associated with any component facilitates the research, use and maintenance of libraries. The associated documentation consists of

  • Una riga di commento.

  • Una riga di parole chiave come TTL CMOS NAND2, separate da spazi.

  • Un nome file allegato (per esempio una application note o un file pdf).

    La cartella predefinita per i file allegati:

    kicad/share/library/doc

    Se non trovato:

    kicad/library/doc

    Sotto Linux:

    /usr/local/kicad/share/library/doc

    /usr/share/kicad/library/doc

    /usr/local/share/kicad/library/doc

Key words allow you to selectively search for a component according to various selection criteria. Comments and key words are displayed in various menus, and particularly when you select a component from the library.

The component also has an anchoring point. A rotation or a mirror is made relatively to this anchor point and during a placement this point is used as a reference position. It is thus useful to position this anchor accurately.

A component can have aliases, i.e. equivalent names. This allows you to considerably reduce the number of components that need to be created (for example, a 74LS00 can have aliases such as 74000, 74HC00, 74HCT00…).

Finally, the components are distributed in libraries (classified by topics, or manufacturer) in order to facilitate their management.

12.2. Position a component anchor

The anchor is at the coordinates (0,0) and it is shown by the blue axes displayed on your screen.

10000000000003830000027F3B1EDABD_png

The anchor can be repositioned by selecting the icon icons/anchor_png and clicking on the new desired anchor position. The drawing will be automatically re-centered on the new anchor point.

12.3. Component aliases

An alias is another name corresponding to the same component in the library. Components with similar pin-out and representation can then be represented by only one component, having several aliases (e.g. 7400 with alias 74LS00, 74HC00, 74LS37 ).

The use of aliases allows you to build complete libraries quickly. In addition these libraries, being much more compact, are easily loaded by KiCad.

To modify the list of aliases, you have to select the main editing window via the icon icons/part_properties_png and select the alias folder.

10000000000001B50000013E8AB145A7_png

You can thus add or remove the desired alias. The current alias cannot obviously be removed since it is edited.

To remove all aliases, you have firstly to select the root component. The first component in the alias list in the window of selection of the main toolbar.

12.4. Component fields

The field editor is called via the icon icons/add_text_png .

There are four special fields (texts attached to the component), and configurable user fields

10000000000002870000021DEC5337FC_png

Special fields

  • Reference.

  • Value. It is the component name in the library and the default value field in schematic.

  • Footprint. It is the footprint name used for the board. Not very useful when using CvPcb to setup the footprint list, but mandatory if CvPcb is not used.

  • Sheet. It is a reserved field, not used at the time of writing.

12.5. Component documentation

To edit documentation information, it is necessary to call the main editing window of the component via the icon icons/part_properties_png and to select the document folder.

10000000000001B70000014140B7CFE4_png

Be sure to select the right alias, or the root component, because this documentation is the only characteristic which differs between aliases. The "Copy Doc" button allows you to copy the documentation information from the root component towards the currently edited alias.

12.5.1. Component keywords

Keywords allow you to search in a selective way for a component according to specific selection criteria (function, technological family, etc.)

The Eeschema research tool is not case sensitive. The most current key words used in the libraries are

  • CMOS TTL for the logic families

  • AND2 NOR3 XOR2 INV… for the gates (AND2 = 2 inputs AND gate, NOR3 = 3 inputs NOR gate).

  • JKFF DFF… for JK or D flip-flop.

  • ADC, DAC, MUX…

  • OpenCol for the gates with open collector output. Thus if in the schematic capture software, you search the component: by keys words NAND2 OpenCol Eeschema will display the list of components having these 2 key words.

12.5.2. Component documentation (Doc)

The line of comment (and keywords) is displayed in various menus, particularly when you select a component in the displayed components list of a library and in the ViewLib menu.

If this Doc. file exists, it is also accessible in the schematic capture software, in the pop-up menu displayed by right-clicking on the component.

12.5.3. Associated documentation file (DocFileName)

Indicates an attached file (documentation, application schematic) available ( pdf file, schematic diagram, etc.).

12.5.4. Footprint filtering for CvPcb

You can enter a list of allowed footprints for the component. This list acts as a filter used by CvPcb to display only the allowed footprints. A void list does not filter anything.

10000000000001B8000001406BAFF1AF_png

Wild-card characters are allowed.

S014* allows CvPcb to show all the footprints with a name starting by SO14.

For a resistor, R? shows all the footprints with a 2 letters name starting by R.

Here are samples: with and without filtering

With filtering

1000000000000205000001F7190A1FAC_png

Without filtering

1000000000000202000001F61A671096_png

12.6. Symbol library

You can easily compile a graphic symbols library file containing frequently used symbols .This can be used for the creation of components (triangles, the shape of AND, OR, Exclusive OR gates, etc.) for saving and subsequent re-use.

These files are stored by default in the library directory and have a .sym extension. The symbols are not gathered in libraries like the components because they are generally not so many.

12.6.1. Export or create a symbol

A component can be exported as a symbol with the button icons/import_png . You can generally create only one graphic, also it will be a good idea to delete all pins, if they exist.

12.6.2. Import a symbol

Importing allows you to add graphics to a component you are editing. A symbol is imported with the button Import graphic icon . Imported graphics are added as they were created in existing graphics.

13. Viewlib

13.1. Introduzione

Viewlib allows you to quickly examine the content of libraries. Viewlib is called by the tool icons/library_browse_png or by the "place component" tool available from the right-hand side toolbar.

100000000000016D000000E7007BA5B8_png

13.2. Viewlib - main screen

100000000000028A000001DC54042D35_png

To examine the library content you need to select the wanted library from the list on the left-hand side. Available components will then appear in the second list which allow you to select a component.

100000000000028B000001DD9FC13E33_png

13.3. Viewlib top toolbar

The top tool bar in Viewlib is shown below.

images/toolbar_viewlib.png

The available commands are.

icons/library_png

Selection of the desired library which can be also selected in the displayed list.

icons/add_component_png

Selection of the component which can be also selected in the displayed list.

icons/lib_previous_png

Display previous component.

icons/lib_next_png

Display next component.

images/icons/zoom_in.png images/icons/zoom_out.png images/icons/zoom_redraw.png images/icons/zoom_fit_in_page.png

Zoom tools.

images/icons/morgan1.png images/icons/morgan2.png

Selection of the representation (normal or converted) if exist.

images/toolbar_viewlib_part.png

Selezione della parte, solo per componenti multiparte.

icons/datasheet_png

If it exist, display the associated documents. Exists only when called by the place component dialog frame from Eeschema.

icons/export_png

Close Viewlib and place the selected component in Eeschema. This icon is only displayed when Viewlib has been called from Eeschema (click on a symbol in the component chooser).

14. Creating Customized Netlists and BOM Files

14.1. File di netlist intermedio

BOM files and netlist files can be converted from an Intermediate netlist file created by Eeschema.

This file uses XML syntax and is called the intermediate netlist. The intermediate netlist includes a large amount of data about your board and because of this, it can be used with post-processing to create a BOM or other reports.

Depending on the output (BOM or netlist), different subsets of the complete Intermediate Netlist file will be used in the post-processing.

14.1.1. Schematic sample

Schematic sample

14.1.2. The Intermediate Netlist file sample

The corresponding intermediate netlist (using XML syntax) of the circuit above is shown below.

<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 20:35:21</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    </comp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts>
    <libpart lib="device" part="C">
      <description>Condensateur non polarise</description>
      <footprints>
        <fp>SM*</fp>
        <fp>C?</fp>
        <fp>C1-1</fp>
      </footprints>
      <fields>
        <field name="Reference">C</field>
        <field name="Value">C</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="device" part="R">
      <description>Resistance</description>
      <footprints>
        <fp>R?</fp>
        <fp>SM0603</fp>
        <fp>SM0805</fp>
        <fp>R?-*</fp>
        <fp>SM1206</fp>
      </footprints>
      <fields>
        <field name="Reference">R</field>
        <field name="Value">R</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="passive"/>
        <pin num="2" name="~" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="conn" part="CONN_4">
      <description>Symbole general de connecteur</description>
      <fields>
        <field name="Reference">P</field>
        <field name="Value">CONN_4</field>
      </fields>
      <pins>
        <pin num="1" name="P1" type="passive"/>
        <pin num="2" name="P2" type="passive"/>
        <pin num="3" name="P3" type="passive"/>
        <pin num="4" name="P4" type="passive"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS04">
      <description>Hex Inverseur</description>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS04</field>
      </fields>
      <pins>
        <pin num="1" name="~" type="input"/>
        <pin num="2" name="~" type="output"/>
        <pin num="3" name="~" type="input"/>
        <pin num="4" name="~" type="output"/>
        <pin num="5" name="~" type="input"/>
        <pin num="6" name="~" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~" type="output"/>
        <pin num="9" name="~" type="input"/>
        <pin num="10" name="~" type="output"/>
        <pin num="11" name="~" type="input"/>
        <pin num="12" name="~" type="output"/>
        <pin num="13" name="~" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
    <libpart lib="74xx" part="74LS74">
      <description>Dual D FlipFlop, Set &amp; Reset</description>
      <docs>74xx/74hc_hct74.pdf</docs>
      <fields>
        <field name="Reference">U</field>
        <field name="Value">74LS74</field>
      </fields>
      <pins>
        <pin num="1" name="Cd" type="input"/>
        <pin num="2" name="D" type="input"/>
        <pin num="3" name="Cp" type="input"/>
        <pin num="4" name="Sd" type="input"/>
        <pin num="5" name="Q" type="output"/>
        <pin num="6" name="~Q" type="output"/>
        <pin num="7" name="GND" type="power_in"/>
        <pin num="8" name="~Q" type="output"/>
        <pin num="9" name="Q" type="output"/>
        <pin num="10" name="Sd" type="input"/>
        <pin num="11" name="Cp" type="input"/>
        <pin num="12" name="D" type="input"/>
        <pin num="13" name="Cd" type="input"/>
        <pin num="14" name="VCC" type="power_in"/>
      </pins>
    </libpart>
  </libparts>
  <libraries>
    <library logical="device">
      <uri>F:\kicad\share\library\device.lib</uri>
    </library>
    <library logical="conn">
      <uri>F:\kicad\share\library\conn.lib</uri>
    </library>
    <library logical="74xx">
      <uri>F:\kicad\share\library\74xx.lib</uri>
    </library>
  </libraries>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>

14.2. Conversione in un nuovo formato di netlist

By applying a post-processing filter to the Intermediate netlist file you can generate foreign netlist files as well as BOM files. Because this conversion is a text to text transformation, this post-processing filter can be written using Python, XSLT, or any other tool capable of taking XML as input.

XSLT itself is a an XML language very suitable for XML transformations. There is a free program called xsltproc that you can download and install. The xsltproc program can be used to read the Intermediate XML netlist input file, apply a style-sheet to transform the input, and save the results in an output file. Use of xsltproc requires a style-sheet file using XSLT conventions. The full conversion process is handled by Eeschema, after it is configured once to run xsltproc in a specific way.

14.3. XSLT approach

The document that describes XSL Transformations (XSLT) is available here:

http://www.w3.org/TR/xslt

14.3.1. Create a Pads-Pcb netlist file

The pads-pcb format is comprised of two sections.

  • The footprint list.

  • The Nets list: grouping pads references by nets.

Immediately below is a style-sheet which converts the Intermediate Netlist file to a pads-pcb netlist format:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to PADS netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    How to use:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<xsl:template match="/export">
    <xsl:text>*PADS-PCB*&nl;*PART*&nl;</xsl:text>
    <xsl:apply-templates select="components/comp"/>
    <xsl:text>&nl;*NET*&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>
    <xsl:text>*END*&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>unknown</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
        <xsl:text>*SIGNAL* </xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
            </xsl:otherwise>
        </xsl:choose>
        <xsl:text>&nl;</xsl:text>
        <xsl:apply-templates select="node"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node">
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

</xsl:stylesheet>

And here is the pads-pcb output file after running xsltproc:

*PADS-PCB*
*PART*
P1 unknown
U2 unknown
U1 unknown
C1 unknown
R1 unknown
*NET*
*SIGNAL* GND
U1.7
C1.2
U2.7
P1.4
*SIGNAL* VCC
R1.1
U1.14
U2.4
U2.1
U2.14
P1.1
*SIGNAL* N-4
U1.2
U2.3
*SIGNAL* /SIG_OUT
P1.2
U2.5
U2.2
*SIGNAL* /CLOCK_IN
R1.2
C1.1
U1.1
P1.3

*END*

The command line to make this conversion is:

kicad\\bin\\xsltproc.exe -o test.net kicad\\bin\\plugins\\netlist_form_pads-pcb.xsl test.tmp

14.3.2. Create a Cadstar netlist file

The Cadstar format is comprised of two sections.

  • The footprint list.

  • The Nets list: grouping pads references by nets.

Here is the style-sheet file to make this specific conversion:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, Jean-Pierre Charras.
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!-- Netlist header -->
<xsl:template match="/export">
    <xsl:text>.HEA&nl;</xsl:text>
    <xsl:apply-templates select="design/date"/>  <!-- Generate line .TIM <time> -->
    <xsl:apply-templates select="design/tool"/>  <!-- Generate line .APP <eeschema version> -->
    <xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->
    <xsl:text>&nl;&nl;</xsl:text>
    <xsl:apply-templates select="nets/net"/>          <!-- Generate list of nets and connections -->
    <xsl:text>&nl;.END&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .TIM 20/08/2010 10:45:33 -->
<xsl:template match="tool">
    <xsl:text>.APP "</xsl:text>
    <xsl:apply-templates/>
    <xsl:text>"&nl;</xsl:text>
</xsl:template>

 <!-- Generate line .APP "eeschema (2010-08-17 BZR 2450)-unstable" -->
<xsl:template match="date">
    <xsl:text>.TIM </xsl:text>
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each component -->
<xsl:template match="comp">
    <xsl:text>.ADD_COM </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:text>"</xsl:text> <xsl:apply-templates select="value"/> <xsl:text>"</xsl:text>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>""</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!-- for each net -->
<xsl:template match="net">
    <!-- nets are output only if there is more than one pin in net -->
    <xsl:if test="count(node)>1">
    <xsl:variable name="netname">
        <xsl:text>"</xsl:text>
        <xsl:choose>
            <xsl:when test = "@name != '' ">
                <xsl:value-of select="@name"/>
            </xsl:when>
            <xsl:otherwise>
                <xsl:text>N-</xsl:text>
                <xsl:value-of select="@code"/>
        </xsl:otherwise>
        </xsl:choose>
        <xsl:text>"&nl;</xsl:text>
        </xsl:variable>
        <xsl:apply-templates select="node" mode="first"/>
        <xsl:value-of select="$netname"/>
        <xsl:apply-templates select="node" mode="others"/>
    </xsl:if>
</xsl:template>

<!-- for each node -->
<xsl:template match="node" mode="first">
    <xsl:if test="position()=1">
       <xsl:text>.ADD_TER </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text>.</xsl:text>
    <xsl:value-of select="@pin"/>
    <xsl:text> </xsl:text>
    </xsl:if>
</xsl:template>

<xsl:template match="node" mode="others">
    <xsl:choose>
        <xsl:when test='position()=1'>
        </xsl:when>
        <xsl:when test='position()=2'>
           <xsl:text>.TER     </xsl:text>
        </xsl:when>
        <xsl:otherwise>
           <xsl:text>         </xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:if test="position()>1">
        <xsl:value-of select="@ref"/>
        <xsl:text>.</xsl:text>
        <xsl:value-of select="@pin"/>
        <xsl:text>&nl;</xsl:text>
    </xsl:if>
</xsl:template>

</xsl:stylesheet>

Here is the Cadstar output file.

.HEA
.TIM 21/08/2010 08:12:08
.APP "eeschema (2010-08-09 BZR 2439)-unstable"
.ADD_COM P1 "CONN_4"
.ADD_COM U2 "74LS74"
.ADD_COM U1 "74LS04"
.ADD_COM C1 "CP"
.ADD_COM R1 "R"


.ADD_TER U1.7 "GND"
.TER     C1.2
         U2.7
         P1.4
.ADD_TER R1.1 "VCC"
.TER     U1.14
         U2.4
         U2.1
         U2.14
         P1.1
.ADD_TER U1.2 "N-4"
.TER     U2.3
.ADD_TER P1.2 "/SIG_OUT"
.TER     U2.5
         U2.2
.ADD_TER R1.2 "/CLOCK_IN"
.TER     C1.1
         U1.1
         P1.3

.END

14.3.3. Create a OrcadPCB2 netlist file

This format has only one section which is the footprint list. Each footprint includes its list of pads with reference to a net.

Here is the style-sheet for this specific conversion:

<?xml version="1.0" encoding="ISO-8859-1"?>
<!--XSL style sheet to Eeschema Generic Netlist Format to CADSTAR netlist format
    Copyright (C) 2010, SoftPLC Corporation.
    GPL v2.

    How to use:
        https://lists.launchpad.net/kicad-developers/msg05157.html
-->

<!DOCTYPE xsl:stylesheet [
  <!ENTITY nl  "&#xd;&#xa;"> <!--new line CR, LF -->
]>

<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:output method="text" omit-xml-declaration="yes" indent="no"/>

<!--
    Netlist header
    Creates the entire netlist
    (can be seen as equivalent to main function in C
-->
<xsl:template match="/export">
    <xsl:text>( { Eeschema Netlist Version 1.1  </xsl:text>
    <!-- Generate line .TIM <time> -->
<xsl:apply-templates select="design/date"/>
<!-- Generate line eeschema version ... -->
<xsl:apply-templates select="design/tool"/>
<xsl:text>}&nl;</xsl:text>

<!-- Generate the list of components -->
<xsl:apply-templates select="components/comp"/>  <!-- Generate list of components -->

<!-- end of file -->
<xsl:text>)&nl;*&nl;</xsl:text>
</xsl:template>

<!--
    Generate id in header like "eeschema (2010-08-17 BZR 2450)-unstable"
-->
<xsl:template match="tool">
    <xsl:apply-templates/>
</xsl:template>

<!--
    Generate date in header like "20/08/2010 10:45:33"
-->
<xsl:template match="date">
    <xsl:apply-templates/>
    <xsl:text>&nl;</xsl:text>
</xsl:template>

<!--
    This template read each component
    (path = /export/components/comp)
    creates lines:
     ( 3EBF7DBD $noname U1 74LS125
      ... pin list ...
      )
    and calls "create_pin_list" template to build the pin list
-->
<xsl:template match="comp">
    <xsl:text> ( </xsl:text>
    <xsl:choose>
        <xsl:when test = "tstamp != '' ">
            <xsl:apply-templates select="tstamp"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>00000000</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "footprint != '' ">
            <xsl:apply-templates select="footprint"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>$noname</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text> </xsl:text>
    <xsl:value-of select="@ref"/>
    <xsl:text> </xsl:text>
    <xsl:choose>
        <xsl:when test = "value != '' ">
            <xsl:apply-templates select="value"/>
        </xsl:when>
        <xsl:otherwise>
            <xsl:text>"~"</xsl:text>
        </xsl:otherwise>
    </xsl:choose>
    <xsl:text>&nl;</xsl:text>
    <xsl:call-template name="Search_pin_list" >
        <xsl:with-param name="cmplib_id" select="libsource/@part"/>
        <xsl:with-param name="cmp_ref" select="@ref"/>
    </xsl:call-template>
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template search for a given lib component description in list
    lib component descriptions are in /export/libparts,
    and each description start at ./libpart
    We search here for the list of pins of the given component
    This template has 2 parameters:
        "cmplib_id" (reference in libparts)
        "cmp_ref"   (schematic reference of the given component)
-->
<xsl:template name="Search_pin_list" >
    <xsl:param name="cmplib_id" select="0" />
    <xsl:param name="cmp_ref" select="0" />
        <xsl:for-each select="/export/libparts/libpart">
            <xsl:if test = "@part = $cmplib_id ">
                <xsl:apply-templates name="build_pin_list" select="pins/pin">
                    <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
                </xsl:apply-templates>
            </xsl:if>
        </xsl:for-each>
</xsl:template>


<!--
    This template writes the pin list of a component
    from the pin list of the library description
    The pin list from library description is something like
          <pins>
            <pin num="1" type="passive"/>
            <pin num="2" type="passive"/>
          </pins>
    Output pin list is ( <pin num> <net name> )
    something like
            ( 1 VCC )
            ( 2 GND )
-->
<xsl:template name="build_pin_list" match="pin">
    <xsl:param name="cmp_ref" select="0" />

    <!-- write pin numner and separator -->
    <xsl:text>  ( </xsl:text>
    <xsl:value-of select="@num"/>
    <xsl:text> </xsl:text>

    <!-- search net name in nets section and write it: -->
    <xsl:variable name="pinNum" select="@num" />
    <xsl:for-each select="/export/nets/net">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name, so count items in this net
        -->
        <xsl:variable name="pinCnt" select="count(node)" />
        <xsl:apply-templates name="Search_pin_netname" select="node">
            <xsl:with-param name="cmp_ref" select="$cmp_ref"/>
            <xsl:with-param name="pin_cnt_in_net" select="$pinCnt"/>
            <xsl:with-param name="pin_num"> <xsl:value-of select="$pinNum"/>
            </xsl:with-param>
        </xsl:apply-templates>
    </xsl:for-each>

    <!-- close line -->
    <xsl:text> )&nl;</xsl:text>
</xsl:template>

<!--
    This template writes the pin netname of a given pin of a given component
    from the nets list
    The nets list description is something like
      <nets>
        <net code="1" name="GND">
          <node ref="J1" pin="20"/>
              <node ref="C2" pin="2"/>
        </net>
        <net code="2" name="">
          <node ref="U2" pin="11"/>
        </net>
    </nets>
    This template has 2 parameters:
        "cmp_ref"   (schematic reference of the given component)
        "pin_num"   (pin number)
-->

<xsl:template name="Search_pin_netname" match="node">
    <xsl:param name="cmp_ref" select="0" />
    <xsl:param name="pin_num" select="0" />
    <xsl:param name="pin_cnt_in_net" select="0" />

    <xsl:if test = "@ref = $cmp_ref ">
        <xsl:if test = "@pin = $pin_num">
        <!-- net name is output only if there is more than one pin in net
             else use "?" as net name
        -->
            <xsl:if test = "$pin_cnt_in_net>1">
                <xsl:choose>
                    <!-- if a net has a name, use it,
                        else build a name from its net code
                    -->
                    <xsl:when test = "../@name != '' ">
                        <xsl:value-of select="../@name"/>
                    </xsl:when>
                    <xsl:otherwise>
                        <xsl:text>$N-0</xsl:text><xsl:value-of select="../@code"/>
                    </xsl:otherwise>
                </xsl:choose>
            </xsl:if>
            <xsl:if test = "$pin_cnt_in_net &lt;2">
                <xsl:text>?</xsl:text>
            </xsl:if>
        </xsl:if>
    </xsl:if>

</xsl:template>

</xsl:stylesheet>

Here is the OrcadPCB2 output file.

( { Eeschema Netlist Version 1.1  29/08/2010 21:07:51
eeschema (2010-08-28 BZR 2458)-unstable}
 ( 4C6E2141 $noname P1 CONN_4
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 /CLOCK_IN )
  (  4 GND )
 )
 ( 4C6E20BA $noname U2 74LS74
  (  1 VCC )
  (  2 /SIG_OUT )
  (  3 N-04 )
  (  4 VCC )
  (  5 /SIG_OUT )
  (  6 ? )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E20A6 $noname U1 74LS04
  (  1 /CLOCK_IN )
  (  2 N-04 )
  (  7 GND )
  (  14 VCC )
 )
 ( 4C6E2094 $noname C1 CP
  (  1 /CLOCK_IN )
  (  2 GND )
 )
 ( 4C6E208A $noname R1 R
  (  1 VCC )
  (  2 /CLOCK_IN )
 )
)
*

14.3.4. Eeschema plugins interface

Intermediate Netlist converters can be automatically launched within Eeschema.

Init the Dialog window

One can add a new netlist plug-in user interface tab by clicking on the Add Plugin button.

10000000000000FC000000C867B9348F_png

Here is what the configuration data for the PadsPcb tab looks like:

100000000000026D000001272BA6B200_png
Plugin Configuration Parameters

The Eeschema plug-in configuration dialog requires the following information:

  • The title: for instance, the name of the netlist format.

  • The command line to launch the converter.

Once you click on the netlist button the following will happen:

Eeschema creates an intermediate netlist file .xml, for instancetest.xml.* 2. Eeschema runs the plug-in by reading test.xml and creates test.net

Generate netlist files with the command line

Assuming we are using the program xsltproc.exe to apply the sheet style to the intermediate file, xsltproc.exe is executed with the following command.

xsltproc.exe -o <output filename> < style-sheet filename> <input XML file to convert>

In KiCad under Windows the command line is the following.

f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

Under Linux the command becomes as following.

xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

Where netlist_form_pads-pcb.xsl is the style-sheet that you are applying. Do not forget the double quotes around the file names, this allows them to have spaces after the substitution by Eeschema.

The command line format accepts parameters for filenames:

The supported formatting parameters are.

  • %B ⇒ base filename and path of selected output file, minus path and extension.

  • %I ⇒ complete filename and path of the temporary input file (the intermediate net file).

  • %O ⇒ complete filename and path of the user chosen output file.

%I will be replaced by the actual intermediate file name

%O will be replaced by the actual output file name.

Command line format: example for xsltproc

The command line format for xsltproc is the following:

<path of xsltproc> xsltproc <xsltproc parameters>

under Windows.

f:/kicad/bin/xsltproc.exe -o "%O" f:/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

under Linux:

xsltproc -o "%O" /usr/local/kicad/bin/plugins/netlist_form_pads-pcb.xsl "%I"

The above examples assume xsltproc is installed on your PC under Windows and all files located in kicad/bin.

14.3.5. Bill of Materials Generation

Because the intermediate netlist file contains all information about used components, a BOM can be extracted from it. Here is the plug-in setup window (on Linux) to create a customized Bill Of Materials (BOM) file:

bom-netlist-tab_png

The path to the style sheet bom2csv.xsl is system dependent. The currently best XSLT style-sheet for BOM generation at this time is called bom2csv.xsl. You are free to modify it according to your needs, and if you develop something generally useful, ask that it become part of the KiCad project.

14.4. Command line format: example for python scripts

The command line format for python is something like:

python <script file name> <input filename> <output filename>

under Windows:

python *.exe f:/kicad/python/my_python_script.py "%I" "%O"

under Linux:

python /usr/local/kicad/python/my_python_script.py "%I" "%O"

Assuming python is installed on your PC.

14.5. Intermediate Netlist structure

This sample gives an idea of the netlist file format.

<?xml version="1.0" encoding="utf-8"?>
<export version="D">
  <design>
    <source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
    <date>29/08/2010 21:07:51</date>
    <tool>eeschema (2010-08-28 BZR 2458)-unstable</tool>
  </design>
  <components>
    <comp ref="P1">
      <value>CONN_4</value>
      <libsource lib="conn" part="CONN_4"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2141</tstamp>
    </comp>
    <comp ref="U2">
      <value>74LS74</value>
      <libsource lib="74xx" part="74LS74"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20BA</tstamp>
    </comp>
    <comp ref="U1">
      <value>74LS04</value>
      <libsource lib="74xx" part="74LS04"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E20A6</tstamp>
    </comp>
    <comp ref="C1">
      <value>CP</value>
      <libsource lib="device" part="CP"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E2094</tstamp>
    <comp ref="R1">
      <value>R</value>
      <libsource lib="device" part="R"/>
      <sheetpath names="/" tstamps="/"/>
      <tstamp>4C6E208A</tstamp>
    </comp>
  </components>
  <libparts/>
  <libraries/>
  <nets>
    <net code="1" name="GND">
      <node ref="U1" pin="7"/>
      <node ref="C1" pin="2"/>
      <node ref="U2" pin="7"/>
      <node ref="P1" pin="4"/>
    </net>
    <net code="2" name="VCC">
      <node ref="R1" pin="1"/>
      <node ref="U1" pin="14"/>
      <node ref="U2" pin="4"/>
      <node ref="U2" pin="1"/>
      <node ref="U2" pin="14"/>
      <node ref="P1" pin="1"/>
    </net>
    <net code="3" name="">
      <node ref="U2" pin="6"/>
    </net>
    <net code="4" name="">
      <node ref="U1" pin="2"/>
      <node ref="U2" pin="3"/>
    </net>
    <net code="5" name="/SIG_OUT">
      <node ref="P1" pin="2"/>
      <node ref="U2" pin="5"/>
      <node ref="U2" pin="2"/>
    </net>
    <net code="6" name="/CLOCK_IN">
      <node ref="R1" pin="2"/>
      <node ref="C1" pin="1"/>
      <node ref="U1" pin="1"/>
      <node ref="P1" pin="3"/>
    </net>
  </nets>
</export>

14.5.1. General netlist file structure

The intermediate Netlist accounts for five sections.

  • The header section.

  • The component section.

  • The lib parts section.

  • The libraries section.

  • The nets section.

The file content has the delimiter <export>

<export version="D">
...
</export>

14.5.2. The header section

The header has the delimiter <design>

<design>
<source>F:\kicad_aux\netlist_test\netlist_test.sch</source>
<date>21/08/2010 08:12:08</date>
<tool>eeschema (2010-08-09 BZR 2439)-unstable</tool>
</design>

This section can be considered a comment section.

14.5.3. The components section

The component section has the delimiter <components>

<components>
<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>
</components>

This section contains the list of components in your schematic. Each component is described like this:

<comp ref="P1">
<value>CONN_4</value>
<libsource lib="conn" part="CONN_4"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>4C6E2141</tstamp>
</comp>

libsource

name of the lib where this component was found.

part

component name inside this library.

sheetpath

path of the sheet inside the hierarchy: identify the sheet within the full schematic hierarchy.

tstamps (time stamps)

time stamp of the schematic file.

tstamp (time stamp)

time stamp of the component.

Note about time stamps for components

To identify a component in a netlist and therefore on a board, the timestamp reference is used as unique for each component. However KiCad provides an auxiliary way to identify a component which is the corresponding footprint on the board. This allows the re-annotation of components in a schematic project and does not loose the link between the component and its footprint.

A time stamp is an unique identifier for each component or sheet in a schematic project. However, in complex hierarchies, the same sheet is used more than once, so this sheet contains components having the same time stamp.

A given sheet inside a complex hierarchy has an unique identifier: its sheetpath. A given component (inside a complex hierarchy) has an unique identifier: the sheetpath + its tstamp

14.5.4. The libparts section

The libparts section has the delimiter <libparts>, and the content of this section is defined in the schematic libraries. The libparts section contains

  • The allowed footprints names (names use jokers) delimiter <fp>.

  • The fields defined in the library delimiter <fields>.

  • The list of pins delimiter <pins>.

<libparts>
<libpart lib="device" part="CP">
  <description>Condensateur polarise</description>
  <footprints>
    <fp>CP*</fp>
    <fp>SM*</fp>
  </footprints>
  <fields>
    <field name="Reference">C</field>
    <field name="Valeur">CP</field>
  </fields>
  <pins>
    <pin num="1" name="1" type="passive"/>
    <pin num="2" name="2" type="passive"/>
  </pins>
</libpart>
</libparts>

Lines like <pin num="1" type="passive"/> give also the electrical pin type. Possible electrical pin types are

Input

Usual input pin

Output

Usual output

Bidirectional

Input or Output

Tri-state

Bus input/output

Passive

Usual ends of passive components

Unspecified

Unknown electrical type

Power input

Power input of a component

Power output

Power output like a regulator output

Open collector

Open collector often found in analog comparators

Open emitter

Open collector sometimes found in logic.

Not connected

Must be left open in schematic

14.5.5. The libraries section

The libraries section has the delimiter <libraries>. This section contains the list of schematic libraries used in the project.

<libraries>
  <library logical="device">
    <uri>F:\kicad\share\library\device.lib</uri>
  </library>
  <library logical="conn">
    <uri>F:\kicad\share\library\conn.lib</uri>
  </library>
</libraries>

14.5.6. The nets section

The nets section has the delimiter <nets>. This section contains the "connectivity" of the schematic.

<nets>
  <net code="1" name="GND">
    <node ref="U1" pin="7"/>
    <node ref="C1" pin="2"/>
    <node ref="U2" pin="7"/>
    <node ref="P1" pin="4"/>
  </net>
  <net code="2" name="VCC">
    <node ref="R1" pin="1"/>
    <node ref="U1" pin="14"/>
    <node ref="U2" pin="4"/>
    <node ref="U2" pin="1"/>
    <node ref="U2" pin="14"/>
    <node ref="P1" pin="1"/>
  </net>
</nets>

This section lists all nets in the schematic.

A possible net is contains the following.

<net code="1" name="GND">
  <node ref="U1" pin="7"/>
  <node ref="C1" pin="2"/>
  <node ref="U2" pin="7"/>
  <node ref="P1" pin="4"/>
</net>

net code

is an internal identifier for this net

name

is a name for this net

node

give a pin reference connected to this net

14.6. More about xsltproc

Refer to the page: http://xmlsoft.org/XSLT/xsltproc.html

14.6.1. Introduzione

xsltproc is a command line tool for applying XSLT style-sheets to XML documents. While it was developed as part of the GNOME project, it can operate independently of the GNOME desktop.

xsltproc is invoked from the command line with the name of the style-sheet to be used followed by the name of the file or files to which the style-sheet is to be applied. It will use the standard input if a filename provided is - .

If a style-sheet is included in an XML document with a Style-sheet Processing Instruction, no style-sheet needs to be named in the command line. xsltproc will automatically detect the included style-sheet and use it. By default, the output is to stdout. You can specify a file for output using the -o option.

14.6.2. Synopsis

xsltproc [[-V] | [-v] | [-o *file* ] | [--timing] | [--repeat] |
[--debug] | [--novalid] | [--noout] | [--maxdepth *val* ] | [--html] |
[--param *name* *value* ] | [--stringparam *name* *value* ] | [--nonet] |
[--path *paths* ] | [--load-trace] | [--catalogs] | [--xinclude] |
[--profile] | [--dumpextensions] | [--nowrite] | [--nomkdir] |
[--writesubtree] | [--nodtdattr]] [ *stylesheet* ] [ *file1* ] [ *file2* ]
[ *....* ]

14.6.3. Command line options

-V or --version

Show the version of libxml and libxslt used.

-v or --verbose

Output each step taken by xsltproc in processing the stylesheet and the document.

-o or --output file

Direct output to the file named file. For multiple outputs, also known as “chunking”, -o directory/ directs the output files to a specified directory. The directory must already exist.

--timing

Display the time used for parsing the stylesheet, parsing the document and applying the stylesheet and saving the result. Displayed in milliseconds.

--repeat

Run the transformation 20 times. Used for timing tests.

--debug

Output an XML tree of the transformed document for debugging purposes.

--novalid

Skip loading the document’s DTD.

--noout

Do not output the result.

--maxdepth value

Adjust the maximum depth of the template stack before libxslt concludes it is in an infinite loop. The default is 500.

--html

The input document is an HTML file.

--param name value

Pass a parameter of name name and value value to the stylesheet. You may pass multiple name/value pairs up to a maximum of 32. If the value being passed is a string rather than a node identifier, use --stringparam instead.

--stringparam name value

Pass a paramenter of name name and value value where value is a string rather than a node identifier. (Note: The string must be utf-8.)

--nonet

Do not use the Internet to fetch DTD’s, entities or documents.

--path paths

Use the list (separated by space or column) of filesystem paths specified by paths to load DTDs, entities or documents.

--load-trace

Display to stderr all the documents loaded during the processing.

--catalogs

Use the SGML catalog specified in SGML_CATALOG_FILES to resolve the location of external entities. By default, xsltproc looks for the catalog specified in XML_CATALOG_FILES. If that is not specified, it uses /etc/xml/catalog.

--xinclude

Process the input document using the Xinclude specification. More details on this can be found in the Xinclude specification: http://www.w3.org/TR/xinclude/

--profile --norman

Output profiling information detailing the amount of time spent in each part of the stylesheet. This is useful in optimizing stylesheet performance.

--dumpextensions

Dumps the list of all registered extensions to stdout.

--nowrite

Refuses to write to any file or resource.

--nomkdir

Refuses to create directories.

--writesubtree path

Allow file write only within the path subtree.

--nodtdattr

Do not apply default attributes from the document’s DTD.

14.6.4. Xsltproc return values

xsltproc returns a status number that can be quite useful when calling it within a script.

0: normal

1: no argument

2: too many parameters

3: unknown option

4: failed to parse the stylesheet

5: error in the stylesheet

6: error in one of the documents

7: unsupported xsl:output method

8: string parameter contains both quote and double-quotes

9: internal processing error

10: processing was stopped by a terminating message

11: could not write the result to the output file

14.6.5. Ulteriori informazioni su xsltproc

pagina web di libxml: http://www.xmlsoft.org/

Pagina W3C XSLT: http://www.w3.org/TR/xslt